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2005 IEEE International 48th Midwest Symposium on Circuits and systems, MWSCAS 2005

作者： Teli, Purvi S. Abdel-Aty-Zohdy, Hoda S. Line Vogel, F. Ewing, Robert L. Microelectronics System Design Laboratory Department of Electrical and System Engineering Oakland University Rochester MI 48309 GraphiTech Inc. St. Clair Shores MI 48080 Air Force Research Laboratory Information Directorate Wright-Patterson AFB OH 45433

ISBN: (纸本)0780391977

Intelligent power management for dry cell batteries may be accomplished by external circuitry which is connected to the individual power cells. In comparison, the presented Graphite circuit model, along with lead-acid battery technology facilitates the power management of wet cells in sealed packaging. This paper reiterates the Piezo ElectroChemical Transducer (PECT) effect based on the intercalation of graphite with sulfuric acid;Introduces a first attempt at developing a dynamic circuit model which will facilitate for a wide range of smart PECT applications. The paper also addresses the usage of PECT effect device for smart battery management, which operates in sulfuric acid environment. The developed dynamic impedance circuit model of PECT effect device can be used further to understand the changes in resistance and reactance properties of PECT device with the change in the temperature, voltage, current, stages, type of graphite and the concentration of sulfuric acid of electrochemical intercalation of graphite with sulfuric acid. © 2005 IEEE.

关键词： Photoelectrochemical cells

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Bio-inspired integrated circuits for signal perception and processing

Bio-inspired integrated circuits for signal perception and p...

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2003 Nanotechnology Conference and Trade Show - Nanotech 2003

作者： Abdel-Aty-Zohdy, Hoda S. Ewing, Robert L. Microelectronics System Design Lab Department of Electrical Engineering Rochester MI 48309 United States Information Directorate Air Force Research Laboratory Wright-Patterson AFB OH 45433 United States

ISBN: (纸本)0972842209

Bio-inspired systems utilizing neural networks (NNs) and genetic algorithms (GAs) are presented for communications, networking information dissemination, and real-time control in signal perception and processing (SPP). VLSI and nano circuits and systems will provide affordable, reproducible, and reliable front-end high performance SPP. Sample applications are presented for integrated intelligent E-Nose systems, and Communication systems which include: i-Self-Organizing feature Map for discovery, ii- Recurrent Dynamic Neural Networks (NNs), with output neurons feedback and feed forward arrays for noisy signals, iii- Reinforcement NNs for applications with only key features, rather than a known model, iv- Spiking NNs that adjust their synapses subject to changes in the environment, and v- Genetic Algorithms for characterization and optimization.

关键词： Integrated circuits

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An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update

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IEEE Journal of Solid-State Circuits 2024年第5期59卷 1612-1627页

作者： Yue, Jinshan Liu, Yongpan Feng, Xiaoyu He, Yifan Wang, Jingyu Yuan, Zhe Zhan, Mingtao Liu, Jiaxin Su, Jian-Wei Chung, Yen-Lin Wu, Ping-Chun Hong, Li-Yang Chang, Meng-Fan Sun, Nan Dou, Chunmeng Li, Xueqing Liu, Ming Yang, Huazhong Tsinghua University Department of Electronic Engineering Beijing100084 China Chinese Academy of Sciences Institute of Microelectronics Beijing100029 China National Tsing Hua University Department of Electrical Engineering Hsinchu314040 Taiwan Frontier Institute of Chip and System State Key Laboratory of Integrated Chips and Systems Fudan University Shanghai200433 China

Computing-in-memory (CIM) chips have demonstrated the potential high energy efficiency for low-power neural network (NN) processors. Even with energy-efficient CIM macros, the existing system-level CIM chips still lack deep exploration on sparsity and large models, which prevents a higher system energy efficiency. This work presents a CIM NN processor with more sufficient support of sparsity and higher utilization rate. Three key innovations are proposed. First, a set-associate blockwise sparsity strategy is designed, which simultaneously saves execution time, power, and storage space. Second, a ping-pong weight update mechanism is proposed for a higher utilization rate, enabling simultaneous execution of CIM and write operations. Third, an efficient CIM macro is implemented with adaptive analog-digital converter (ADC) precision for better sparsity utilization and performance-accuracy trade-off. The 65-nm fabricated chip shows 9.5-TOPS/W system energy efficiency at 4-bit precision, with 6.25times actual improvement compared with a state-of-the-art CIM chip. Besides, this work supports high CIM execution accuracy on the ImageNet dataset. © 1966-2012 IEEE.

关键词： Neural networks

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VLSI design and implementation of an improved squaring circuit by combinational logic

VLSI design and implementation of an improved squaring circu...

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Asilomar Conference on Signals, systems & Computers

作者： H.S. Abdel-Aty-Zohdy A.A. Hiasat Microelectronics System Design LaboratoryDepartment of Electrical and Systems Engineering Oakland University Rochester MI USA

An improved VLSI squaring circuit, for a Viterbi algorithm, is designed and implemented in the n-well CMOS 2/spl mu/m process. It is faster and more area efficient than conventional and table look-up approaches. In addition it compensates for inaccuracies and noise. The new design is based on combinational logic and the implemented chip reduces the IC area by more than 40% and increases the speed by 100%, as compared to other published designs (Eshraghi et al., 1994). design considerations, performance evaluations, and test results are presented.

关键词： Very large scale integration Logic design Combinational circuits CMOS logic circuits Viterbi algorithm microelectronics Laboratories design engineering systems engineering and theory CMOS process

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Dynamic scheduling issues in SMT architectures

Dynamic scheduling issues in SMT architectures

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International Parallel and Distributed Processing Symposium, IPDPS 2003

作者： Shin, Chulho Lee, Seong-Won Gaudiot, Jean-Luc System Design Technology Laboratory Samsung Electronics Corporation Korea Republic of Dept. of Electrical Engineering - Systems University of Southern California United States Dept. of Electrical Engineering and Computer Science University of California Irvine United States

ISBN: (纸本)0769519261

Simultaneous multithreading (SMT) attempts to attain higher processor utilization by allowing instructions from multiple independent threads to coexist in a processor and compete for shared resources. Previous studies have shown, however, that its throughput may be limited by the number of threads. A reason is that a fixed thread scheduling policy cannot be optimal for the varying mixes of threads it may face in an SMT processor. Our adaptive dynamic thread scheduling (ADTS) was previously proposed to achieve higher utilization by allowing a detector thread to make use of wasted pipeline slots with nominal hardware and software costs. The detector thread adaptively switches between various fetch policies. Our previous study showed that a single fixed thread scheduling policy presents much room (some 30%) for improvement compared to an oracle-scheduled case. In this paper, we take a closer look at ADTS. We implemented the functional model of the ADTS and its software architecture to evaluate various heuristics for determining a better fetch policy for a next scheduling quantum. We report that performance could be improved by as much as 25%. © 2003 IEEE.

关键词： Scheduling

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Neural networks for pattern discovery and optimization in signal processing and applications

Neural networks for pattern discovery and optimization in si...

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Canadian Conference on electrical and Computer engineering (CCECE)

作者： H.S. Abdel-Aty-Zohdy M.A. Zondy Microelectronics System Design Laboratory Electrical and Systems Engineering Oakland University Rochester MI USA Center for Advanced Automation Electrical and Systems Engineering Oakland University Rochester MI USA

The article is intended to advance both conceptual and implementation techniques of supervised and discovery-driven neural networks in noisy time varying signal processing applications. Successful neural networks and their significance in applications are based on; selection of proper theoretical algorithms for learning, appropriate selection of the sequencing of signal processing tasks, and efficient VLSI system implementation. We present a pattern discovery self organizing feature map (SOFM), followed by a recurrent dynamic neural network (RDNN) algorithm for signal representation and processing. This approach combines the benefits of RDNNs with its SOFM counter part. Preliminary designs, implementations, test results and validation of silicon-chips for each of the above neural network approach are also presented.

关键词： Neural networks Intelligent networks Signal processing Signal processing algorithms Multidimensional signal processing Organizing systems engineering and theory Very large scale integration Recurrent neural networks Stochastic processes

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Artificial neural network electronic nose for volatile organic compounds

Artificial neural network electronic nose for volatile organ...

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Great Lakes Symposium on VLSI

作者： H.S. Abdel-Aty-Zohdy Microelectronics System Design Lab Department of Electrical and Systems Engineering Oakland University Rochester MI USA

Advanced microsystems that include, sensors, interface-circuits, and pattern-recognition integrated monolithically or in a hybrid module are needed for civilian, military, and space applications. These include: automotive, medical applications, environmental engineering, and manufacturing automation. ASICs with Artificial Neural Networks (ANN) are considered in this paper, with the objective of recognizing air-borne volatile organic compounds, especially alcohols, ethers, esters, halocarbons, NH/sub 3/, NO/sub 2/, and other warfare agent simulants. The ASIC inputs are connected to the outputs from array-distributed sensors which measure three-features for identifying each of four chemicals. A Specialized Reinforcement Neural Network (RNN) learning approach is chosen for the chemicals classification problem. Hardware implementation of the RNN is presented for 2 /spl mu/m CMOS process, MOSIS chip. design implementation and evaluation are also presented.

关键词： Artificial neural networks Electronic noses Sensor arrays Automotive engineering Chemical sensors Recurrent neural networks Medical services Biomedical equipment Biomedical engineering Manufacturing automation

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VLSI implementation of a feature mapping neural network

VLSI implementation of a feature mapping neural network

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： E.T. Carlen H.S. Abdel-Aty-Zohdy Microelectronics Systems Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

Modification of Kohonen's self-organizing feature map algorithm and its dedicated parallel hardware implementation are the focus of this paper. This work is motivated by the need to implement a 5/spl times/5 neural network using digital standard cells and high level VLSI system design tools. The neural net considered is a two layered, feed forward architecture that learns relationships among unknown input data patterns. The prototype system consists of 25 processing units (neurons). Each processing unit operates at 10 MHz. Communication among processing units is accomplished using a broadcast bus. Performance of the system is estimated to be 110,000 iterations per second.< >

关键词： Very large scale integration Neural networks Unsupervised learning Image coding Computer architecture microelectronics Laboratories design engineering systems engineering and theory Focusing

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design and implementation of a fast and compact residue-based semi-custom VLSI arithmetic chip

Design and implementation of a fast and compact residue-base...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： A.A. Hiasat H.S. Abdel-Aty-Zohdy Department of Electrical and Systems Engineering Microelectronics Systems Design Laboratory Oakland University Rochester MI USA

design and implementation of a residue-based adder/subtractor/multiplier arithmetic TinyChip for the moduli set (2/sup n/-1,2/sup n/,2/sup n/+1) is addressed in this paper. The unit realization adopts CMOS semi-custom VLSI design, using Octtools-5.0 with the standard cell MSU2-3 library. The implemented chip has the advantage of reduced delay time and hardware requirements. Thus, it can support real-time one and two dimensional signal processing applications. The design does not have dynamic range limitations due to the absence of memory, therefore, this implementation can be expanded for better reliability. Performance of the system is estimated to be 18 million residue arithmetic operations per second on 2 /spl mu/m process.

关键词： Very large scale integration Arithmetic Signal processing algorithms Dynamic range Libraries Hardware Signal processing Logic Algorithm design and analysis microelectronics

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Signal perception and processing with bio-inspired sub-micro-systems

Signal perception and processing with bio-inspired sub-micro...

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2002 45th Midwest Symposium on Circuits and systems

作者： Abdel-Aty-Zohdy, Hoda S. Ewing, Robert L. Microelectronics System Design Lab. Department of Electrical Engineering Oakland University Rochester MI 48309 United States Information Directorate Air Force Research Laboratory Wright-Patterson AFB OH 45433 United States

Bio-inspired systems utilizing neural networks and genetic algorithms are presented in this paper for applications in pattern discovery, identification, classification, and optimum choices for Signal Perception and Processing (SPP), Sample overview applications are presented for: (I) Integrated Intelligent E-Nose systems, and (II) Communication systems dealing with: (1) Connection admission control;(2) Network congestion;(3) Resource management;(4) Priorities and constrains of service control;and (5) Application-specific network adaptation. Bio-inspired systems include: i-Self-Organizing feature Map for discovery, ii- Recurrent Dynamic Neural Networks (NNs), with output neurons feedback and feed forward arrays for noisy signals, iii- Reinforcement NNs for applications with only key features, rather than a known model, iv- Spiking NNs that adjust their synapses subject to changes in the environment, and v- Genetic Algorithms for characterization and optimization. This paper summarizes alternative combinations and structures of novel bio-inspired, VLSIC embedded systems for detection and quantification of bio-chemical agents, and optimum performance of SPP.

关键词： Signal processing

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