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Midwest Symposium on Circuits and systems (MWSCAS)

作者： H.S. Abdel-Aty-Zohdy R.L. Ewing Microelectronics System Design Laboratory Electrical and Systems Engineering Oakland University Rochester MI USA U.S. Air Force Research Laboratory Dayton OH USA

Intelligent information processing (IIP) or the smart processing of signals in communication systems and data measurements from multi-sensor systems are needed for advanced microautonomous applications. A balanced combination of efficient algorithms, fast networks, and collaboration of the different technologies are required for smaller, faster, and more efficient system-on-a-chip applications. In this paper we present guidelines/approach for intelligent information processing using neural networks (NNs) and genetic algorithms (GAs) which are capable of learning through discovery and/or reinforcement with features optimization through chromosome mutations of GAs. Specific details about a special application for electronic-nose (EN) implementation to discriminate among four chemicals, using reinforcement NN implemented tiny-chip and a GA system implementation is presented with test results.

关键词： Intelligent networks Information processing Neural networks Signal processing Collaboration system-on-a-chip Guidelines Genetic algorithms Biological cells Genetic mutations

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A genetic algorithm tracking model for product deployment in telecom services

A genetic algorithm tracking model for product deployment in...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： L. Murphy H.S. Abdel-Aty-Zohdy M. Hashem-Sherif Microelectronics System Design Laboratory Electrical and Systems Engineering Oakland University Rochester MI USA AT and T Bell Laboratories Inc. Middletown NJ USA

Genetic algorithms (GA) are designed to search for, discover and emphasize good solutions by applying selection and crossover techniques, inspired by nature, to supply solutions to engineering systems. Genetic algorithms operate on pieces of information like nature does on genes in the course of evolution. All individuals of one generation are evaluated by a fitness function. This paper presents an approach to implement a genetic algorithm to depict a recently developed "Integrated Model" for defect tracking for product deployment in telecommunication systems by means of a solution space representing target variables. The genetic algorithm inputs these target values as dynamic input measurements. From these measurements, the best possible fused values are found for the target variables. The goal of the genetic algorithm is dynamically to update the parameters applied to the input measurements to find the optimum solution for the defect tracking model system. Focus will be given to one dimension of sensor input measurements consisting of three four-bit binary sensor inputs varying within a given range of data points. The genetic algorithm is applied to these inputs by means of a 64 6-bit random member binary population using the "half-sibling and a clone" (HSAC) technique of crossover and mutation. The population members are evaluated using a fitness function where the fittest individuals are retained to survive and produce offspring for the next generation and the remainder is discarded. Genetic diversity is maintained through using a roulette wheel technique. The simulation tool MATLAB will be used to simulate the genetic algorithm. The genetic algorithm will be completed in VLSI using Verilog and the Mentor Graphics tools. The first stage components have been designed and completed using the Mentor Graphics toolset

关键词： Genetic algorithms Telecommunication services Mathematical model Target tracking Graphics Algorithm design and analysis Genetic engineering design engineering systems engineering and theory Cloning

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A recurrent dynamic neural network approach and implementation, for noise-contaminated signal representation

A recurrent dynamic neural network approach and implementati...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： H.S. Abdel-Aty-Zohdy M.A. Zohdy Microelectronics System Design Lab Electrical and Systems Engineering Oakland University Rochester MI USA Center for Advanced Automation Electrical and Systems Engineering Oakland University Rochester MI USA

This paper presents a new Recurrent Dynamic Neural Network (RDNN) approach and its implementation in order to solve noisy signal representation, processing, and compression. Essentially, the neural net solves, in a systematic recurrent way, simultaneous sets of uncertain and even noise corrupted linear or nonlinear equations, by seeking a corresponding minimum energy state. The VLSIC hardware design and implementation are built around asymmetric Cellular Neural Network (CNN) architecture. Digital semi-custom circuit design is used to implement each CNN building block, using CMOS 2-/spl mu/m n-well technology, and employing available standard cell library. The overall dimensions of the implemented CNN is 3.1/spl times/2.5 mm/sup 2/. Time domain simulation using IRSIM, gave an expected throughput rate of 33 M operations per second. The perceived advantages over traditional approaches are: robustness of computation, ability to confront dynamic (time-varying), as well as noisy signals, flexibility in implementation, and quick turn-around design time.

关键词： Neural networks Recurrent neural networks Cellular neural networks CMOS technology Signal representations Circuit noise Nonlinear equations Energy states Neural network hardware Circuit synthesis

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Modeling and simulation for on-chip power grid networks by locally dominant krylov subspace method

Modeling and simulation for on-chip power grid networks by l...

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2008 International Conference on Computer-Aided design, ICCAD

作者： Yan, Boyuan Tan, Sheldon X.-D. Chen, Gengsheng Wu, Lifeng Department of Electrical Engineering University of California Riverside CA 92521 United States ASIC and System State-Key-Lab Microelectronics Dept. Fudan Univeristy Shanghai 200433 China Cadence Design Systems Inc. San Jose CA 95134 United States

ISBN: (纸本)9781424428205

Fast analysis of power grid networks has been a challenging problem for many years. The huge size renders circuit simulation inefficient and the large number of inputs further limits the application of existing Krylov-subspace macromodeling algorithms. However, strong locality has been observed that two nodes geometrically far have very small electrical impact on each other because of the exponential attenuation. However, no systematic approaches have been proposed to exploit such locality. In this paper, we propose a novel modeling and simulation scheme, which can automatically identify the dominant inputs for a given observed node in a power grid network. This enables us to build extremely compact models by projecting the system onto the locally dominant Krylov subspace corresponding to those dominant inputs only. The resulting simulation can be very fast with the compact models if we only need to view the responses of a few nodes under many different inputs. Experimental results show that the proposed method can have at least 100X speedup over SPICE-like simulations on a number of large power grid networks up to 1M nodes.

关键词： Circuit simulation

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Research on workflow recognition for liver rupture repair surgery

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Mathematical Biosciences and engineering 2024年第2期21卷 1844-1856页

作者： Men, Yutao Zhao, Zixian Chen, Wei Wu, Hang Zhang, Guang Luo, Feng Yu, Ming Tianjin Key Laboratory for Advanced Mechatronic System Design and Intelligent Control School of Mechanical Engineering Tianjin University of Technology Tianjin300384 China Medical Support Technology Research Department Systems Engineering Institute Academy of Military Sciences People’s Liberation Army Tianjin300161 China National Demonstration Center for Experimental Mechanical and Electrical Engineering Education Tianjin University of Technology Tianjin300384 China

Liver rupture repair surgery serves as one tool to treat liver rupture, especially beneficial for cases of mild liver rupture hemorrhage. Liver rupture can catalyze critical conditions such as hemorrhage and shock. Surgical workflow recognition in liver rupture repair surgery videos presents a significant task aimed at reducing surgical mistakes and enhancing the quality of surgeries conducted by surgeons. A liver rupture repair simulation surgical dataset is proposed in this paper which consists of 45 videos collaboratively completed by nine surgeons. Furthermore, an end-to-end SA-RLNet, a self attention-based recurrent convolutional neural network, is introduced in this paper. The self-attention mechanism is used to automatically identify the importance of input features in various instances and associate the relationships between input features. The accuracy of the surgical phase classification of the SA-RLNet approach is 90.6%. The present study demonstrates that the SA-RLNet approach shows strong generalization capabilities on the dataset. SA-RLNet has proved to be advantageous in capturing subtle variations between surgical phases. The application of surgical workflow recognition has promising feasibility in liver rupture repair surgery. ©2024 the Author(s), licensee AIMS Press. This is an open access article distributed under the terms of the Creative Commons.

关键词： Image classification

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Plasticity recurrent spiking neural networks for olfactory pattern recognition

Plasticity recurrent spiking neural networks for olfactory p...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： J.N. Allen H.S. Abdel-Aty-Zohdy R.L. Ewing Microelectronics System Design Laboratory Department of Electrical and System Engineering Oakland University Rochester MI USA Information Directorate Air Force Research Laboratory OH USA

This paper introduces a novel spiking neural network methodology, and applies it to an odorant learning and detection application. Spike-time dependent plasticity can support coding schemes that are based on spatio-temporal spike patterns. Spiking (or pulsed) neural networks (SNNs) are models which explicitly take into account the timing of inputs. The network input and output are usually represented as series of spikes (delta function or more complex shapes). Plasticity SNNs have an advantage of being able to recurrently process information. Spike-time dependent plasticity can enhance signal transmission by selectively strengthening synaptic connections that transmit precisely timed spikes at the expense of those synapses that transmit poorly timed spikes. Complete theory describes the spiking network's digital implementation. Theory is verified using simulation of a biologically plausible odor environment with 1023 odor receptor inputs. Stochastic on-chip learning uses sampling and a correlation filter to learn odors despite noisy environment conditions. Simulation and Verilog chip design are tested on a field programmable gate array. A scalable field programmable gate array implementation with 1024 inputs, 1 output, and expansion capability for unlimited outputs is synthesized into 87,062 gates

关键词： Neural networks Recurrent neural networks Olfactory Pattern recognition Biological system modeling Field programmable gate arrays Timing Shape Stochastic processes Sampling methods

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Polymorphic Architecture for an Electronic Nose (eNose)

Polymorphic Architecture for an Electronic Nose (eNose)

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： R.L. Ewing H.S. Abdel-Aty-Zohdy J.R. Morrison Information Directorate U.S. Air Force Research Laboratory OH USA Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

Bioinspired evolvable techniques significantly increase the functionality of autonomous low-power detection systems by enabling them to learn, adapt and self-reconfigure through use of programmable BioFET devices. Electronic artificial noses or sniffers as bioinspired devices are under development that produces holograms stored within three-dimensional protein memory structures enabling automated real-time detection and classification of odors, vapors and contamination within gases.

关键词： Electronic noses Laboratories Protein engineering Chemical technology Sensor arrays Neural networks Leak detection Gases Computerized monitoring FETs

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Wavelet-multifractal processing of signals

Wavelet-multifractal processing of signals

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IEEE Asia-Pacific Conference on Circuits and systems

作者： K. Soemintapura A.Z.R. Langi Laboratory for Signals and Systems Department of Electrical Engineering Institute of Technology Bandung Laboratory of Microelectronics Design IURC Microelectronics Institute of Technology Bandung Bandung West Java Indonesia

This research develops a new approach in processing multimedia signals (i.e., speech, audio, and images) using wavelets and multifractals. Processing multimedia signals is critical in many modern telecommunication and information systems. Nonstationary behaviours have been the most important characteristics of multimedia signals because they carry signal information. Unfortunately nonstationary parts are difficult to process effectively using traditional tools such as Fourier transforms. In contrast, wavelets and multifractality not only reveal that nonstationary parts are sufficient to represent natural images, but also can be used to reconstruct such signals. The general objectives of this research are to develop the wavelet and multifractal concepts into a new signal-processing framework, to obtain more effective and efficient signal representation. If the objectives can be achieved, the results of the proposed research can be a breakthrough in nonstationary signal processing, as fundamental as the well known Fourier approach in stationary signal processing.

关键词： Signal processing Feature extraction Fractals Signal analysis Laboratories microelectronics Signal synthesis Character recognition Data mining Signal design

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Application of novel hierarchical approach to formal verification of digital ICs

Application of novel hierarchical approach to formal verific...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： F.A. El-Licy H.S. Abdel-Aty-Zohdy Department of Information and Computer Science Institute of Statistical Studies and Research Cairo University Egypt Microelectronics System Design Laboratory Electrical and Systems Engineering Oakland University MI USA

A hierarchical approach for the abstraction of digital VLSICs is presented. Circuit layout is hierarchically abstracted into logical constructs of binary tree structures, which may be manipulated to extract circuit functionality for the purpose of verifying design correctness. VLSIC design specification in the form of HDL is hierarchically decomposed to generate logical formulae for the given specification. By comparing the above, a verification report is obtained

关键词： Formal verification Logic design Binary trees Hardware design languages Production Very large scale integration electrical capacitance tomography Combinational circuits Data structures Boolean functions

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Efficient test generation for built-in self-test boundary-scan template

Efficient test generation for built-in self-test boundary-sc...

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1991 IEEE VLSI Test Symposium: Chip-to-system Test Concerns for the 90''s, VTEST 1991

作者： Nagvajara, P. Karpovsky, M.G. Levitin, L.B. Dept. of Electr. and Comput. Eng. Drexel Univ. PhiladelphiaPA United States Research Laboratory for Design and Testing of Computer and Communication Systems Department of Electrical Computer and System Engineering Boston University United States

An analysis and design of a pseudorandom pattern generator, (PRPG), based on a linear recurrence, for built-in self-test (BIST) boundary scan design is presented. The authors present for the case when r≥s, a design of an s-stage PRPG capable of producing 2s-1 distinct r-bit patterns within 2s-1 clock pulses independent of the hardware realization of the PRPG. For the case when rr distinct r-bit patterns and the expected number T(N) of distinct patterns given a number N of clock pulses were presented. The proposed theoretical average N(T) was shown to be close to the experimental average values Nex(T). Hence, the value N(T) or T(N) can be used as a benchmark for evaluating the efficiency of a BIST boundary scan test generation. © 1991 IEEE.

关键词： Built-in self test

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