检索结果-内蒙古大学图书馆

arXiv 2024年

作者： Yang, Jichang Chen, Hegan Chen, Jia Wang, Songqi Wang, Shaocong Yu, Yifei Chen, Xi Wang, Bo Zhang, Xinyuan Cui, Binbin Li, Yi Lin, Ning Xu, Meng Li, Yi Xu, Xiaoxin Qi, Xiaojuan Wang, Zhongrui Zhang, Xumeng Shang, Dashan Wang, Han Liu, Qi Cheng, Kwang-Ting Liu, Ming Department of Electrical and Electronic Engineering the University of Hong Kong Hong Kong ACCESS – AI Chip Center for Emerging Smart Systems InnoHK Centers Hong Kong Science Park Hong Kong Laboratory of Microelectronic Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China State Key Laboratory of Integrated Chips and Systems Frontier Institute of Chip and System Fudan University Shanghai200433 China Institute of the Mind the University of Hong Kong Hong Kong University of Chinese Academy of Sciences Beijing100049 China School of Integrated Circuits Hubei Key Laboratory for Advanced Memories Huazhong University of Science and Technology Wuhan430074 China Department of Electronic and Computer Engineering the Hong Kong University of Science and Technology Hong Kong

Human brains image complicated scenes when reading a novel. Replicating this imagination is one of the ultimate goals of AI-Generated Content (AIGC). However, current AIGC methods, such as score-based diffusion, are still deficient in terms of rapidity and efficiency. This deficiency is rooted in the difference between the brain and digital computers. Digital computers have physically separated storage and processing units, resulting in frequent data transfers during iterative calculations, incurring large time and energy overheads. This issue is further intensified by the conversion of inherently continuous and analog generation dynamics, which can be formulated by neural differential equations, into discrete and digital operations. Inspired by the brain, we propose a time-continuous and analog in-memory neural differential equation solver for score-based diffusion, employing emerging resistive memory. The integration of storage and computation within resistive memory synapses surmount the von Neumann bottleneck, benefiting the generative speed and energy efficiency. The closed-loop feedback integrator is time-continuous, analog, and compact, physically implementing an infinite-depth neural network. Moreover, the software-hardware co-design is intrinsically robust to analog noise. We experimentally validate our solution with 180 nm resistive memory in-memory computing macros. Demonstrating equivalent generative quality to the software baseline, our system achieved remarkable enhancements in generative speed for both unconditional and conditional generation tasks, by factors of 64.8 and 156.5, respectively. Moreover, it accomplished reductions in energy consumption by factors of 5.2 and 4.1. Our approach heralds a new horizon for hardware solutions in edge computing for generative AI applications. © 2024, CC BY-NC-SA.

关键词： Diffusion

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Continuous-Time Digital Twin with Analogue Memristive Neural Ordinary Differential Equation Solver

arXiv

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arXiv 2024年

作者： Chen, Hegan Yang, Jichang Chen, Jia Wang, Songqi Wang, Shaocong Wang, Dingchen Tian, Xinyu Yu, Yifei Chen, Xi Lin, Yinan He, Yangu Wu, Xiaoshan Li, Yi Zhang, Xinyuan Lin, Ning Xu, Meng Li, Yi Zhang, Xumeng Wang, Zhongrui Wang, Han Shang, Dashan Liu, Qi Cheng, Kwang-Ting Liu, Ming Department of Electrical and Electronic Engineering The University of Hong Kong Hong Kong ACCESS – AI Chip Center for Emerging Smart Systems InnoHK Centers Hong Kong Science Park Hong Kong Institute of the Mind The University of Hong Kong Hong Kong Key Laboratory of Microelectronic Devices & Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China University of Chinese Academy of Sciences Beijing100049 China School of Integrated Circuits Hubei Key Laboratory for Advanced Memories Huazhong University of Science and Technology Wuhan430074 China State Key Laboratory of Integrated Chips and Systems Frontier Institute of Chip and System Fudan University Shanghai200433 China Department of Electronic and Computer Engineering The Hong Kong University of Science and Technology Hong Kong

Digital twins, the cornerstone of Industry 4.0, replicate real-world entities through computer models, revolutionising fields such as manufacturing management and industrial automation. Recent advances in machine learning provide data-driven methods for developing digital twins using discrete-time data and finite-depth models on digital computers. However, this approach fails to capture the underlying continuous dynamics and struggles with modelling complex system behaviour. Additionally, the architecture of digital computers, with separate storage and processing units, necessitates frequent data transfers and Analogue-Digital (A/D) conversion, thereby significantly increasing both time and energy costs. Here, we introduce a memristive neural ordinary differential equation (ODE) solver for digital twins, which is capable of capturing continuous-time dynamics and facilitates the modelling of complex systems using an infinite-depth model. By integrating storage and computation within analogue memristor arrays, we circumvent the von Neumann bottleneck, thus enhancing both speed and energy efficiency. We experimentally validate our approach by developing a digital twin of the HP memristor, which accurately extrapolates its nonlinear dynamics, achieving a 4.2-fold projected speedup and a 41.4-fold projected decrease in energy consumption compared to state-of-the-art digital hardware, while maintaining an acceptable error margin. Additionally, we demonstrate scalability through experimentally grounded simulations of Lorenz96 dynamics, exhibiting projected performance improvements of 12.6-fold in speed and 189.7-fold in energy efficiency relative to traditional digital approaches. By harnessing the capabilities of fully analogue computing, our breakthrough accelerates the development of digital twins, offering an efficient and rapid solution to meet the demands of Industry 4.0. © 2024, CC BY-NC-SA.

关键词： Energy utilization

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Unleashing the Power of Edge-Cloud Generative AI in Mobile Networks: A Survey of AIGC Services

arXiv

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arXiv 2023年

作者： Xu, Minrui Du, Hongyang Niyato, Dusit Kang, Jiawen Xiong, Zehui Mao, Shiwen Han, Zhu Jamalipour, Abbas Kim, Dong In Shen, Xuemin Leung, Victor C.M. Poor, H. Vincent The School of Computer Science and Engineering Nanyang Technological University Singapore639798 Singapore The School of Automation Guangdong University of Technology Key Laboratory of Intelligent Information Processing and System Integration of IoT Ministry of Education Guangzhou510006 China Guangdong-HongKong-Macao Joint Laboratory for Smart Discrete Manufacturing Guangzhou510006 China The Pillar of Information Systems Technology and Design Singapore University of Technology and Design Singapore487372 Singapore The Department of Electrical and Computer Engineering Auburn University AuburnAL36849-5201 United States The Department of Electrical and Computer Engineering University of Houston HoustonTX77004 United States The Department of Computer Science and Engineering Kyung Hee University Seoul446-701 Korea Republic of The School of Electrical and Information Engineering University of Sydney SydneyNSW2006 Australia The Department of Electrical and Computer Engineering Sungkyunkwan University Suwon16419 Korea Republic of The Department of Electrical and Computer Engineering University of Waterloo WaterlooONN2L 3G1 Canada The College of Computer Science and Software Engineering Shenzhen University Shenzhen518061 China The Department of Electrical and Computer Engineering The University of British Columbia VancouverBCV6T 1Z4 Canada The Department of Electrical and Computer Engineering Princeton University PrincetonNJ08544 United States

Artificial Intelligence-Generated Content (AIGC) is an automated method for generating, manipulating, and modifying valuable and diverse data using AI algorithms creatively. This survey paper focuses on the deployment of AIGC applications, e.g., ChatGPT and Dall-E, at mobile edge networks, namely mobile AIGC networks, that provide personalized and customized AIGC services in real time while maintaining user privacy. We begin by introducing the background and fundamentals of generative models and the lifecycle of AIGC services at mobile AIGC networks, which includes data collection, training, fine-tuning, inference, and product management. We then discuss the collaborative cloud-edge-mobile infrastructure and technologies required to support AIGC services and enable users to access AIGC at mobile edge networks. Furthermore, we explore AIGC-driven creative applications and use cases for mobile AIGC networks. Additionally, we discuss the implementation, security, and privacy challenges of deploying mobile AIGC networks. Finally, we highlight some future research directions and open issues for the full realization of mobile AIGC networks. © 2023, CC BY.

关键词： Life cycle

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Efficient and accurate neural field reconstruction using resistive memory

arXiv

引用

arXiv 2024年

作者： Yu, Yifei Wang, Shaocong Zhang, Woyu Zhang, Xinyuan Wu, Xiuzhe He, Yangu Yang, Jichang Zhang, Yue Lin, Ning Wang, Bo Chen, Xi Wang, Songqi Zhang, Xumeng Qi, Xiaojuan Wang, Zhongrui Shang, Dashan Liu, Qi Cheng, Kwang-Ting Liu, Ming Department of Electrical and Electronic Engineering The University of Hong Kong Hong Kong Hong Kong ACCESS – AI Chip Center for Emerging Smart Systems InnoHK Centers Hong Kong Science Park Hong Kong Hong Kong Institute of Mind The University of Hong Kong Hong Kong Hong Kong Key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China Laboratory of Microelectronic Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China University of Chinese Academy of Sciences Beijing100049 China Frontier Institute of Chip and System Fudan University Shanghai200433 China Department of Electronic and Computer Engineering The Hong Kong University of Science and Technology Hong Kong Hong Kong

Human beings construct perception of space by integrating sparse observations into massively interconnected synapses and neurons, offering a superior parallelism and efficiency. Replicating this capability in AI finds wide applications in medical imaging, AR/VR, and embodied AI, where input data is often sparse and computing resources are limited. However, traditional signal reconstruction methods on digital computers face both software and hardware challenges. On the software front, difficulties arise from storage inefficiencies in conventional explicit signal representation. Hardware obstacles include the von Neumann bottleneck, which limits data transfer between the CPU and memory, and the limitations of CMOS circuits in supporting parallel processing. We propose a systematic approach with software-hardware co-optimizations for signal reconstruction from sparse inputs. Software-wise, we employ neural field to implicitly represent signals via neural networks, which is further compressed using low-rank decomposition and structured pruning. Hardware-wise, we design a resistive memory-based computing-in-memory (CIM) platform, featuring a Gaussian Encoder (GE) and an MLP Processing Engine (PE). The GE harnesses the intrinsic stochasticity of resistive memory for efficient input encoding, while the PE achieves precise weight mapping through a Hardware-Aware Quantization (HAQ) circuit. We demonstrate the system’s efficacy on a 40nm 256Kb resistive memory-based in-memory computing macro, achieving 31.5×, 35.5×, and 47.2× energy efficiency improvements and 10.8×, 38.8×, and 6.2× parallelism improvements without compromising reconstruction quality in tasks like 3D CT sparse reconstruction, novel view synthesis, and novel view synthesis for dynamic scenes. This work advances the AI-driven signal restoration technology and paves the way for future efficient and robust medical AI and 3D vision applications. Copyright © 2024, The Authors. All rights reserved.

关键词： Signal reconstruction

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Dynamic neural network with memristive CIM and CAM for 2D and 3D vision

arXiv

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arXiv 2024年

作者： Zhang, Yue Zhang, Woyu Wang, Shaocong Lin, Ning Yu, Yifei He, Yangu Wang, Bo Jiang, Hao Lin, Peng Xu, Xiaoxin Qi, Xiaojuan Wang, Zhongrui Zhang, Xumeng Shang, Dashan Liu, Qi Cheng, Kwang-Ting Liu, Ming Department of Electrical and Electronic Engineering The University of Hong Kong Hong Kong Key Laboratory of Microelectronic Devices & Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100049 China ACCESS – AI Chip Center for Emerging Smart Systems InnoHK Centers Hong Kong Science Park Hong Kong Institute of the Mind The University of Hong Kong Hong Kong Key Lab of Fabrication Technologies for Integrated Circuits Chinese Academy of Sciences Beijing100049 China State Key Laboratory of Integrated Chips and Systems Frontier Institute of Chip and System Fudan University Shanghai200433 China University of Chinese Academy of Sciences Beijing100049 China College of Computer Science and Technology Zhejiang University Zhejiang310027 China Department of Electronic and Computer Engineering The Hong Kong University of Science and Technology Hong Kong

The brain is dynamic, associative and efficient. It reconfigures by associating the inputs with past experiences, with fused memory and processing. In contrast, AI models are static, unable to associate inputs with past experiences, and run on digital computers with physically separated memory and processing. We propose a hardware-software co-design, a semantic memory-based dynamic neural network (DNN) using memristor. The network associates incoming data with the past experience stored as semantic vectors. The network and the semantic memory are physically implemented on noise-robust ternary memristor-based Computing-In-Memory (CIM) and Content-Addressable Memory (CAM) circuits, respectively. We validate our co-designs, using a 40nm memristor macro, on ResNet and PointNet++ for classifying images and 3D points from the MNIST and ModelNet datasets, which not only achieves accuracy on par with software but also a 48.1% and 15.9% reduction in computational budget. Moreover, it delivers a 77.6% and 93.3% reduction in energy consumption. © 2024, CC BY.

关键词： Memristors

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Two-dimensional materials for future information technology: status and prospects

引用

Science China(Information Sciences) 2024年第6期67卷 1-147页

作者： Hao QIU Zhihao YU Tiange ZHAO Qi ZHANG Mingsheng XU Peifeng LI Taotao LI Wenzhong BAO Yang CHAI Shula CHEN Yiqi CHEN Hui-Ming CHENG Daoxin DAI Zengfeng DI Zhuo DONG Xidong DUAN Yuhan FENG Yu FU Jingshu GUO Pengwen GUO Yue HAO Jun HE Xiao HE Jingyi HU Weida HU Zehua HU Xinyue HUANG Ziyang HUANG Ali IMRAN Ziqiang KONG Jia LI Qian LI Weisheng LI Lei LIAO Bilu LIU Can LIU Chunsen LIU Guanyu LIU Kaihui LIU Liwei LIU Sheng LIU Yuan LIU Donglin LU Likuan MA Feng MIAO Zhenhua NI Jing NING Anlian PAN Tian-Ling REN Haowen SHU Litao SUN Yue SUN Quanyang TAO Zi-Ao TIAN Dong WANG Hao WANG Haomin WANG Jialong WANG Junyong WANG Wenhui WANG Xingjun WANG Yeliang WANG Yuwei WANG Zhenyu WANG Yao WE... Department of Applied Physics The Hong Kong Polytechnic University Key Laboratory for Micro-Nano Physics and Technology of Hunan Province College of Materials Science and EngineeringHunan University College of Integrated Circuits Zhejiang University Shenzhen Geim Graphene Center Shenzhen Key Laboratory of Layered Materials for Value-Added ApplicationsTsinghua-Berkeley Shenzhen Institute & Institute of Materials ResearchTsinghua Shenzhen International Graduate SchoolTsinghua University State Key Laboratory of Extreme Photonics and Instrumentation College of Optical Science and EngineeringInternational Research Center for Advanced PhotonicsZijingang CampusZhejiang University National Key Laboratory of Materials for Integrated Circuits Shanghai Institute of Microsystem and Information TechnologyChinese Academy of Sciences CAS Key Laboratory of Nanophotonic Materials and Devices & Key Laboratory of Nanodevices and Applications i-LabSuzhou Institute of Nano-Tech and Nano-Bionics (SINANO)Chinese Academy of Sciences College of Chemistry and Chemical Engineering Hunan University Key Laboratory of Quantum State Construction and Manipulation (Ministry of Education) Department of PhysicsRenmin University of China School of Integrated Circuits Beijing National Research Center for Information Science and Technology (BNRist)Tsinghua University School of Electronic Science and Engineering Nanjing University The State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology Shaanxi Joint Key Laboratory of GrapheneSchool of MicroelectronicsXidian University Key Laboratory of Artificial Micro- and Nano-Structures of Ministry of Education School of Physics and TechnologyWuhan University School of Integrated Circuits Huazhong University of Science and Technology Center for Nanochemistry (CNC) Beijing Science and Engineering Center for NanocarbonsBeijing National Laboratory for Molecular SciencesCollege of Chemistry and Molecular EngineeringPeking University State Key Laboratory for Artificial Microstruct

Over the past 70 years, the semiconductor industry has undergone transformative changes,largely driven by the miniaturization of devices and the integration of innovative structures and materials. Two-dimensional(2D) materials like transition metal dichalcogenides(TMDs) and graphene are pivotal in overcoming the limitations of silicon-based technologies, offering innovative approaches in transistor design and functionality, enabling atomic-thin channel transistors and monolithic 3D integration. We review the important progress in the application of 2D materials in future information technology, focusing in particular on microelectronics and optoelectronics. We comprehensively summarize the key advancements across material production, characterization metrology, electronic devices, optoelectronic devices, and heterogeneous integration on silicon. A strategic roadmap and key challenges for the transition of 2D materials from basic research to industrial development are outlined. To facilitate such a transition, key technologies and tools dedicated to 2D materials must be developed to meet industrial standards, and the employment of AI in material growth, characterizations, and circuit design will be essential. It is time for academia to actively engage with industry to drive the next 10 years of 2D material research.

关键词： two-dimensional (2D) materials information technology production technology standardization of characterization microelectronic devices optoelectronic devices multi-functional integration

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Enhancement of sensing performance for yeast cell using tapered optical fibre

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AIP Conference Proceedings 2024年第1期2898卷

作者： Norhafizah Burham Nur Nadia Bachok Naimah Mat Isa Norhana Arsad Photonics Technology Laboratory Department of Electrical Electronic and Systems Engineering Faculty of Engineering and Built Environment Universiti Kebangsaan Malaysia 43600 UKM Bangi Selangor Malaysia Integrated Microelectronics System and Applications (IMSaA) School of Electrical Engineering College of Engineering Universiti Teknologi MARA 40450 Shah Alam Selangor Malaysia School of Electrical Engineering College of Engineering Universiti Teknologi MARA 40450 Shah Alam Selangor Malaysia

This paper demonstrates a simple optical sensor to sense yeast cells using a multimode tapered fibre optic. The sensitivity of various yeast cell concentrations is analysed by comparing two devices which are a spectrometer and an optical power meter. The experiment starts with tapering the optical fibre using a Vytran glass processing workstation to achieve waist diameter and length of 40 µm and 20 mm. Various yeast concentrations of 5% – 25% were used to observe the maximum absorption peak and sensitivity using the optical power meter and spectrometer. The result shows that the maximum absorption wavelength for yeast is 650 nm at 5% concentration. The sensitivity of detecting yeast is 0.005 a.u/% and 0.8931 dBm/% and was analysed by plotting the absorbance peak and output power meter. The growth and sensitivity of live yeast cells can be detected and monitored using an optical sensor and can be applied for food technology applications.

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Random resistive memory-based deep extreme point learning machine for unified visual processing

arXiv

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arXiv 2023年

作者： Wang, Shaocong Gao, Yizhao Li, Yi Zhang, Woyu Yu, Yifei Wang, Bo Lin, Ning Chen, Hegan Zhang, Yue Jiang, Yang Wang, Dingchen Chen, Jia Dai, Peng Jiang, Hao Lin, Peng Zhang, Xumeng Qi, Xiaojuan Xu, Xiaoxin So, Hayden Wang, Zhongrui Shang, Dashan Liu, Qi Cheng, Kwang-Ting Liu, Ming Department of Electrical and Electronic Engineering The University of Hong Kong Hong Kong Key Laboratory of Microelectronic Devices & Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China ACCESS - AI Chip Center for Emerging Smart Systems InnoHK Centers Hong Kong Science Park Hong Kong University of Chinese Academy of Sciences Beijing100049 China Frontier Institute of Chip and System Fudan University Shanghai200433 China College of Computer Science and Technology Zhejiang University Zhejiang310027 China Department of Electronic and Computer Engineering The Hong Kong University of Science and Technology Hong Kong

Visual sensors, including 3D LiDAR, neuromorphic DVS sensors, and conventional frame cameras, are increasingly integrated into edge-side intelligent machines. Realizing intensive multi-sensory data analysis directly on edge intelligent machines is crucial for numerous emerging edge applications, such as augmented and virtual reality and unmanned aerial vehicles, which necessitates unified data representation, unprecedented hardware energy efficiency and rapid model training. However, multi-sensory data are intrinsically heterogeneous, causing significant complexity in the system development for edge-side intelligent machines. In addition, the performance of conventional digital hardware is limited by the physically separated processing and memory units, known as the von Neumann bottleneck, and the physical limit of transistor scaling, which contributes to the slowdown of Moore's law. These limitations are further intensified by the tedious training of models with ever-increasing sizes. In this study, we propose a novel hardware-software co-design, random resistive memory-based deep extreme point learning machine (DEPLM), that offers efficient unified point set analysis. Data-wise, the multi-sensory data are unified as point sets and can be processed universally. Software-wise, most weights of deep extreme point learning machines are exempted from training, which significantly reduce training complexity. Hardware-wise, nanoscale resistive memory not only enables collocation of memory and processing, mitigating the von Neumann bottleneck and the slowdown of Moore's law, but also leverages the inherent programming stochasticity for generating the random and sparse weights of the DEPLM, which also lessens the impact of read noise. We demonstrate the system's versatility across various data modalities and two different learning tasks. Compared to a conventional digital hardware-based system, our co-design system achieves 5.90×, 21.04×, and 15.79× energy efficiency improv

关键词： Cost reduction

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Pruning random resistive memory for optimizing analogue AI

arXiv

引用

arXiv 2023年

作者： Li, Yi Wang, Songqi Zhao, Yaping Wang, Shaocong Zhang, Woyu He, Yangu Lin, Ning Cui, Binbin Chen, Xi Zhang, Shiming Jiang, Hao Lin, Peng Zhang, Xumeng Qi, Xiaojuan Wang, Zhongrui Xu, Xiaoxin Shang, Dashan Liu, Qi Cheng, Kwang-Ting Liu, Ming Department of Electrical and Electronic Engineering The University of Hong Kong Hong Kong Laboratory of Microelectronic Devices & Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China ACCESS – AI Chip Center for Emerging Smart Systems InnoHK Centers Hong Kong Science Park Hong Kong State Key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China Frontier Institute of Chip and System Fudan University Shanghai200433 China College of Computer Science and Technology Zhejiang University Zhejiang310027 China Department of Electronic and Computer Engineering The Hong Kong University of Science and Technology Hong Kong University of Chinese Academy of Sciences Beijing100049 China Institute of Mind The University of Hong Kong Hong Kong

The rapid advancement of artificial intelligence (AI) has been marked by the large language models exhibiting human-like intelligence. However, these models also present unprecedented challenges to energy consumption and environmental sustainability, which are exacerbated by the increasing number of users and the development of even larger models. One promising solution is to revisit analogue computing, a technique that predates digital computing and exploits emerging analogue electronic devices, such as resistive memory, which features in-memory computing, high scalability, and nonvolatility that addresses the von Neumann bottleneck, slowdown of Moore’s law, and volatile DRAM of conventional digital hardware. However, analogue computing still faces the same challenges as before: programming nonidealities and expensive programming due to the underlying devices physics. Therefore, leveraging the efficiency advantage while mitigating the programming disadvantage of analogue computing with resistive memory is a major open problem in AI hardware and electronics communities. Here, we report a universal solution, software-hardware co-design using structural plasticity-inspired edge pruning to optimize the topology of a randomly weighted analogue resistive memory neural network. Software-wise, the topology of a randomly weighted neural network is optimized by pruning connections rather than precisely tuning resistive memory weights. Hardware-wise, we reveal the physical origin of the programming stochasticity using transmission electron microscopy, which is leveraged for large-scale and low-cost implementation of an overparameterized random neural network containing high-performance sub-networks. We implemented the co-design on a 40nm 256K resistive memory macro, observing 17.3% and 19.9% accuracy improvements in image and audio classification on FashionMNIST and Spoken digits datasets, as well as 9.8% (2%) improvement in PR (ROC) in image segmentation on DRIVE datasets, r

关键词： Energy utilization

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P-66: Simulation and Optimization of In-Situ Integration Ultraviolet HEMT-LED Enabled by P-GaN Selective Epitaxy Growth

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SID Symposium Digest of Technical Papers 2023年第1期54卷

作者： Jingyang Zhang Wei Huang Zhaojun Liu Department of Electronic and Electrical Engineering Southern University of Science and Technology Shenzhen Guangdong China 518055 A State Key Laboratory of ASIC and System Shanghai Institute of Intelligent Electronics & Systems School of Microelectronics Fudan University Shanghai China 200433

Based on previous work, the ultraviolet HEMT-LED we fabricated by selective epitaxy growth, this paper further performed simulation to explore the most appropriate p-GaN selection size. P-GaN grown by Selective Epitaxy Growth (SEG) can not only be employed as a junction termination to reduce the electric field crowding of the gate of HEMT, but also form an active region by contacting with 2-dimentional electron gas (2DEG). The simulation results provide an effective reference for the design of p-GaN grown by SEG, and further pave the way for the realization of the idea of integration through the selection of growth methods.

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