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Interfacial Defects: Probing and Manipulating the Interfacial Defects of InGaAs Dual‐Layer Metal Oxides at the Atomic Scale (Adv. Mater. 2/2018)

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Advanced Materials 2018年第2期30卷

作者： Xing Wu Chen Luo Peng Hao Tao Sun Runsheng Wang Chaolun Wang Zhigao Hu Yawei Li Jian Zhang Gennadi Bersuker Litao Sun Kinleong Pey Shanghai Key Laboratory of Multidimensional Information Processing Department of Electrical Engineering East China Normal University 500 Dongchuan Road Shanghai 200241 China SEU‐FEI Nano‐Pico Center Key Laboratory of MEMS of Ministry of Education School of Electronic Science and Engineering Southeast University Nanjing 210096 P. R. China Institute of Microelectronics School of Electronics Engineering and Computer Science Peking University 5 Yiheyuan Road Haidian District Beijing 100871 China The Aerospace Corporation P.O. Box 92957 M2/244 Los Angeles CA 90009 USA Singapore University of Technology and Design 8 Somapah Road 487372 Singapore

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design and application of an enhanced GA 57

Design and application of an enhanced GA

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2014 IEEE 57th International Midwest Symposium on Circuits and systems, MWSCAS 2014

作者： Elgothamy, Hatem Zohdy, Mohamed A. Abdel-Aty-Zohdy, Hoda S. Microelectronics and Bio-Inspired Systems Design Lab Department of Electrical and Computer Engineering Oakland University RochesterMI United States

ISBN: (纸本)9781479941346

This paper introduces an enhanced Genetic Algorithm GA that is faster and more efficient than the standard one. A simple 3D convex surface is optimized using different methods, Brute-Force, standard GA, and the enhanced GA. The enhanced GA is able to find the global minima within a certain range by using the least possible number of calculations, which, means less processing time and is robust to parameter selections. Special software was developed using Java for this purpose;also, MS-Excel was used to represent the data map as charts. © 2014 IEEE.

关键词： Genetic algorithms

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25th Annual Computational Neuroscience Meeting CNS-2016, Seogwipo City, South Korea, July 2-7, 2016 Abstracts

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BMC NEUROSCIENCE 2016年第1期17卷 1-112页

作者： [Anonymous] Computational Neurobiology Laboratory The Salk Institute for Biological Studies San Diego USA UNIC CNRS Gif sur Yvette France The European Institute for Theoretical Neuroscience (EITN) Paris France ATR Computational Neuroscience Laboratories Kyoto Japan Krembil Research Institute University Health Network Toronto Canada Department of Physiology University of Toronto Toronto Canada Department of Medicine (Neurology) University of Toronto Toronto Canada Department of Physics University of New Hampshire Durham USA Department of Neurophysiology Nencki Institute of Experimental Biology Warsaw Poland Department of Theory Wigner Research Centre for Physics of the Hungarian Academy of Sciences Budapest Hungary Department of Mathematical Sciences KAIST Daejoen Republic of Korea Department of Mathematics University of Houston Houston USA Department of Biochemistry & Cell Biology and Institute of Biosciences and Bioengineering Rice University Houston USA Department of Biology and Biochemistry University of Houston Houston USA Grupo de Neurocomputación Biológica Dpto. de Ingeniería Informática Escuela Politécnica Superior Universidad Autónoma de Madrid Madrid Spain Department of Biological Sciences University of Southern California Los Angeles USA Center for Neuroscience Korea Institute of Science and Technology Seoul South Korea Department of Neurology Albert Einstein College of Medicine Bronx USA Center for Neuroscience KIST Seoul South Korea Department of Neuroscience University of Science and Technology Daejon South Korea Systems Neuroscience Group QIMR Berghofer Medical Research Institute Herston Australia Department of Psychology Yonsei University Seoul South Korea Department of Psychiatry Kyung Hee University Hospital at Gangdong Seoul South Korea Department of Psychiatry Veterans Administration Boston Healthcare System and Harvard Medical School Brockton USA Department of Electrical and Electronic Engineering The University of Melbourne Parkvil

A1 Functional advantages of cell-type heterogeneity in neural circuits Tatyana O. Sharpee A2 Mesoscopic modeling of propagating waves in visual cortex Alain Destexhe A3 Dynamics and biomarkers of mental disorders Mitsuo Kawato F1 Precise recruitment of spiking output at theta frequencies requires dendritic h-channels in multi-compartment models of oriens-lacunosum/moleculare hippocampal interneurons Vladislav Sekulić, Frances K. Skinner F2 Kernel methods in reconstruction of current sources from extracellular potentials for single cells and the whole brains Daniel K. Wójcik, Chaitanya Chintaluri, Dorottya Cserpán, Zoltán Somogyvári F3 The synchronized periods depend on intracellular transcriptional repression mechanisms in circadian clocks. Jae Kyoung Kim, Zachary P. Kilpatrick, Matthew R. Bennett, Kresimir Josić O1 Assessing irregularity and coordination of spiking-bursting rhythms in central pattern generators Irene Elices, David Arroyo, Rafael Levi, Francisco B. Rodriguez, Pablo Varona O2 Regulation of top-down processing by cortically-projecting parvalbumin positive neurons in basal forebrain Eunjin Hwang, Bowon Kim, Hio-Been Han, Tae Kim, James T. McKenna, Ritchie E. Brown, Robert W. McCarley, Jee Hyun Choi O3 Modeling auditory stream segregation, build-up and bistability James Rankin, Pamela Osborn Popp, John Rinzel O4 Strong competition between tonotopic neural ensembles explains pitch-related dynamics of auditory cortex evoked fields Alejandro Tabas, André Rupp, Emili Balaguer-Ballester O5 A simple model of retinal response to multi-electrode stimulation Matias I. Maturana, David B. Grayden, Shaun L. Cloherty, Tatiana Kameneva, Michael R. Ibbotson, Hamish Meffin O6 Noise correlations in V4 area correlate with behavioral performance in visual discrimination task Veronika Koren, Timm Lochmann, Valentin Dragoi, Klaus Obermayer O7 Input-location dependent gain modulation in cerebellar nucleus neurons Maria Psarrou, Maria Schilstra, Neil Davey, Benjamin Torben-Ni

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Low Temperature Co-fired Ceramic Package for Lab-on-CMOS Applied in Cell Viability Monitoring

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Procedia engineering 2015年 120卷 1079-1082页

作者： Niina Halonen Joni Kilpijärvi Maciej Sobocinski Timir Datta-Chaudhuri Antti Hassinen Someshekar B. Prakash Peter Möller Pamela Abshire Elisabeth Smela Sakari Kellokumpu Anita Lloyd Spetz Microelectronics and Materials Physics Laboratories Department of Electrical Engineering P.O. Box 4500 FI-90014 University of Oulu Finland Laboratory for MicroTechnologies Department of Mechanical Engineering and the Institute for Systems Research A. James Clark School of Engineering University of Maryland College Park MD 20742 USA Integrated Biomorphic Information System Laboratory Department of Electrical & Computer Engineering and the Institute for Systems Research University of Maryland College Park MD 20742 USA Faculty of Biochemistry and Molecular Medicine University of Oulu P.O. Box 5400 FI-90014 University of Oulu Finland Advanced Design Organization Intel Corporation Hillsboro USA Division of Applied Sensor Science Department of Physics Chemistry and Biology Linköping University SE-58183 Linköping Sweden

Lab-on-CMOS chips (LOCMOS) are sophisticated miniaturized analysis tools based on integrated circuit (IC) microchips performing various laboratory functions. We have developed a low temperature co-fired ceramic (LTCC) package for a LOCMOS application regarding cytotoxicity assessment of nanomaterials. The LTCC packaged capacitance sensor chip is designed for long-term cell viability monitoring during nanoparticle exposure. The introduced LTCC package utilizes the flip chip bonding technique, and it is biocompatible as well as able to withstand the environmental conditions required to maintain mammalian cell culture directly on the surface of a complementary metal oxide semiconductor (CMOS) integrated circuit.

关键词： Lab-on-CMOS low temperature co-fired ceramics electronics packaging cytotoxicity assesment capacitance sensing

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26th Annual Computational Neuroscience Meeting (CNS*2017): Part 1

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BMC Neurosci 2017年第SUPPL 1期18卷 58-58页

作者： Sue Denham Panayiota Poirazi Erik De Schutter Karl Friston Ho Ka Chan Thomas Nowotny Dongqi Han Sungho Hong Sophie Rosay Tanja Wernle Alessandro Treves Sarah Goethals Romain Brette Tomas Van Pottelbergh Rodolphe Sepulchre Alex D. Bird Hermann Cuntz Pedro J. Gonçalves Jan-Matthis Lueckmann Giacomo Bassetto Marcel Nonnenmacher Jakob H. Macke Audrey J. Sederberg Jason N. MacLean Stephanie E. Palmer Ulisse Ferrari Christophe Gardella Olivier Marre Thierry Mora Emina Ibrahimovic Martin Müller Jean-Pascal Pfister Tushar Chauhan Timothée Masquelier Alexandre Montlibert Benoit R. Cottereau Moritz Helias Jannis Schuecker David Dahmen Sven Goedeke Alexandre Hyafil Ainhoa Hermoso-Mendizabal Pavel E. Rueda-Orozco Santiago Jaramillo David Robbe Jaime de la Rocha Marie Rooy Fani Koukouli David DiGregorio Uwe Maskos Boris Gutkin Andrey Yu Verisokin Darya V. Verveyko Dmitry E. Postnov Willy Wong Omid Talakoub Robert Chen Milos Popovic Dmitriy Lisitsyn Eric Drebitz Iris Grothe Sunita Mandon Andreas Kreiter Udo Ernst Peter A. Robinson Xuelong Zhao Kevin M. Aquino John D. Griffiths Grishma Mehta-Pandejee Natasha Gabay James MacLaurin Somwrita Sarkar Tim Kunze Jens Haueisen Thomas R. Knösche Subutai Ahmad Yuwei Cui Marcus Lewis Jeff Hawkins Simona Olmi Spase Petkoski Fabrice Bartolomei Maxime Guye Viktor Jirsa Hazem Toutounji Daniel Durstewitz Matteo Cantarelli Adrian Quintana Boris Marin Matt Earnshaw Padraig Gleeson Robert Court Robert McDougal R. Angus Silver Salvador Dura-Bernal Stephen Larson William W. Lytton Giovanni Idili Lorenzo Posani Simona Cocco Karel Ježek Rémi Monasson School of Psychology Faculty of Health & Human Sciences Plymouth University Plymouth Devon PL4 8AA UK Institute of Molecular Biology and Biotechnology (IMBB) Foundation for Research and Technology-Hellas (FORTH) Heraklion Crete Greece Okinawa Institute of Science and Technology Graduate University Okinawa Japan Wellcome Trust Centre for Neuroimaging Institute of Neurology UCL London WC1N 3BG UK School of Engineering and Informatics University of Sussex Brighton BN1 9QJ UK Graduate School Okinawa Institute of Science and Technology Okinawa 904-0495 Japan Computational Neuroscience Unit Okinawa Institute of Science and Technology Okinawa 904-0495 Japan Cognitive Neuroscience Area Scuola Internazionale Superiore di Studi Avanzati Trieste 34136 Italy Kavli Institute for Systems Neuroscience NTNU Trondheim 7030 Norway Institut de la Vision Sorbonne Universités UPMC Univ Paris 06 INSERM CNRS Paris 75012 France Department of Engineering University of Cambridge Cambridge Cambridgeshire CB2 1PZ UK Ernst Strüngmann Institute for Neuroscience Max Planck Society Frankfurt Germany Frankfurt Institute for Advanced Studies Frankfurt Germany Neural Systems Analysis Research Center Caesar An Associate of the Max Planck Society Bonn Germany Max Planck Institute for Biological Cybernetics Tübingen Germany Bernstein Center for Computational Neuroscience Tübingen Germany Present Address: Biomedical Engineering Department Georgia Institute of Technology Atlanta GA 30306 USA Department of Neurobiology University of Chicago Chicago IL 60637 USA Department of Organismal Biology and Anatomy University of Chicago Chicago IL 60637 USA Committee on Computational Neuroscience University of Chicago Chicago IL 60637 USA Institut de la Vision Sorbonne Universités INSERM Paris France Laboratoire de Physique Statistique Ecole Normale Supérieure Paris France Institute of Molecular Life Sciences University of Zürich 8057 Zürich Switzerland Institute of Neuroinformatics Univer

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Performance Assessment and Optimization of Motion Planning in a Surgical Trainer for Potential Space Applications

Performance Assessment and Optimization of Motion Planning i...

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IEEE Aerospace Conference

作者： Aakarsh Rao Minsik Hong Akash Shankaran Wolfgang Fink Jerzy Rozenblit Model Based Design Laboratory Department of Electrical & Computer Engineering University of Arizona Visual and Autonomous Exploration Systems Research Laboratory Systems Departments of Electrical & Computer Engineering Biomedical Engineering Systems & Industrial Engineering Aerospace & Mechanical Engineering Ophthalmology & Vision Science Universi Department of Surgery University of Arizona

ISBN: (纸本)9781479916191

Medical surgeries in the space environment, including long term space travel (e.g., to Mars) and permanent presence on other planetary bodies (e.g., Moon and Mars), are posing an inherent logistical, and in the absence of appropriately trained personnel (i.e., surgeons), even a potentially life-threatening challenge. As a potential mitigation the use of an existing surgical trainer tool that would allow crewmembers to acquire basic surgical skills is proposed, and to train space station personnel both in space and on the Moon and Mars to hone these skills long-term. Furthermore, this tool would potentially allow for tele-conducted surgeries, akin to the da Vinci Surgical System, controlled from Earth but executed onboard, e.g., the International Space Station. On Earth the surgical trainer can be used to train surgeons and flight surgeons. The efficiency of any surgical training system plays a significant role in its reduction of operative risks and stress associated with insufficient experience of the trainee. The primary goal of such systems is to raise the trainee to a higher level of proficiency without putting patients at risk in the operating room. The prototype for the computer Assisted Surgical Trainer (CAST) being developed at the University of Arizona realizes an optimal motion-planning algorithm. The underlying system consists of mechanical fixtures equipped with encoders and DC motors. This hardware provides a means to accurately track the tip movements of laparoscopic instruments used in minimally invasive surgery. Furthermore it provides haptic and visual feedback to trainees by using a PID controller and augmented reality visualization. Examples of surgical guidance and the improvement of surgeon performance over time using CAST are presented.

关键词： Surgery Instruments Training Visualization Haptic interfaces Space stations Aerospace electronics

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A new balanced-to-single-ended (BTSE) power divider

A new balanced-to-single-ended (BTSE) power divider

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2014 IEEE International Wireless Symposium, IWS 2014

作者： Wu, Lin-Sheng Guo, Yong-Xin Qiu, Liang-Feng Mao, Jun-Fa Key Laboratory of Ministry of Education of Design and EMC of High-Speed Electronic Systems Shanghai Jiao Tong University Shanghai 200240 China Department of Electrical and Computer Engineering National University of Singapore Singapore 117576 Singapore Research Institute Suzhou City 215123 Jiangsu Province China

ISBN: (纸本)9781479934034

A balanced-to-single-ended (BTSE) power divider is proposed in this paper. Its input is a differential pair while both the outputs are single-ended ports. It can replace the cascade of a balun and a conventional power divider. The characteristics requirements of a two-way BTSE power divider with equal power division are first derived, and then a prototype is designed for 2.0 GHz. In order to construct the component compactly, a short-ended four-wire coupled line and T-shaped sections are utilized to realize a -90° transmission line and a phase inverter, respectively. The developed prototype occupies an area of 0.077 λg2, where λg is the guided wavelength of central frequency. It provides all the desired performances within the operating bandwidth of 25%, with low insertion loss and good balance also achieved. © 2014 IEEE.

关键词： Timing circuits

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A new balanced-to-single-ended (BTSE) power divider

A new balanced-to-single-ended (BTSE) power divider

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IEEE International Wireless Symposium (IWS)

作者： Lin-Sheng Wu Yong-Xin Guo Liang-Feng Qiu Jun-Fa Mao Department of Electrical and Computer Engineering National University of Singapore Singapore Singapore Key Laboratory of Ministry of Education of Design and EMC of High-Speed Electronic Systems Shanghai Jiao Tong University Shanghai China

A balanced-to-single-ended (BTSE) power divider is proposed in this paper. Its input is a differential pair while both the outputs are single-ended ports. It can replace the cascade of a balun and a conventional power divider. The characteristics requirements of a two-way BTSE power divider with equal power division are first derived, and then a prototype is designed for 2.0 GHz. In order to construct the component compactly, a short-ended four-wire coupled line and T-shaped sections are utilized to realize a -90° transmission line and a phase inverter, respectively. The developed prototype occupies an area of 0.077 λ g 2 , where λ g is the guided wavelength of central frequency. It provides all the desired performances within the operating bandwidth of 25%, with low insertion loss and good balance also achieved.

关键词： Power dividers Power transmission lines Impedance Prototypes Microwave filters Inverters Ports (computers)

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Automatic complex instruction identification for efficient application mapping onto ASIPs

Automatic complex instruction identification for efficient a...

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IEEE Latin American Symposium on Circuits and systems (LASCAS)

作者： Alexandre S. Nery Nadia Nedjah Felipe M. G. França Lech Jozwiak Henk Corporaal Department of Electrical Engineering - Electronic Systems Eindhoven University of Technology The Netherlands Department of Electronics Engineering and Telecommunications Universidade do Estado do Rio de Janeiro Brazil LAM - Computer Architecture and Microelectronics Laboratory Universidade Federal do Rio de Janeiro Brazil

Instruction Set Customization is a well-known technique to enhance the performance and efficiency of Application-Specific Processors (ASIPs). An extensive application profiling can indicate which parts of a given application, or class of applications, are most frequently executed, enabling the implementation of such frequently executed parts in hardware as custom instructions. However, a naive ad hoc instruction set customization process may identify and select poor instruction extension candidates, which may not result in a significantly improved performance with low circuit-area and energy footprints. In this paper we propose and discuss an efficient instruction set customization method and automatic tool, which exploit the maximal common subgraphs (common operation patterns) of the most frequently executed basic blocks of a given application. The speed results from our tool for a VLIW ASIP are provided for a set of benchmark applications. The average execution time reduction ranges from 30% to 40%, with only a few custom instructions.

关键词： VLIW Hardware Ray tracing Program processors Registers Libraries Convolution

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A framework for automatic custom instruction identification on multi-issue ASIPs

A framework for automatic custom instruction identification ...

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IEEE International Conference on Industrial Informatics (INDIN)

作者： Alexandre S. Nery Nadia Nedjah Felipe M. G. França Lech Jozwiak Henk Corporaal LAM - Computer Architecture and Microelectronics Laboratory COPPE Universidade Federal do Rio de Janeiro Brazil Department of Electrical Engineering - Electronic Systems Eindhoven University of Technology The Netherlands Universidade do Estado do Rio de Janeiro Rio de Janeiro RJ BR

Custom Instruction Identification is an important part in the design of efficient Application-Specific Processors (ASIPs). It consists of profiling of a given application to find patterns of basic operations that are frequently executed. Operations of such patterns can be implemented together as a single custom instruction to speedup the execution of the application. Because of the problem's high complexity, several methods have been proposed for specific single-issue (RISC) processors and architectures, limiting the shape and size of custom instructions that can actually be identified and, possibly, implemented. In this paper, we propose and discuss an efficient custom instruction set identification method and corresponding automatic tool for multi-issue VLIW ASIPs, which search for the common operation patterns of the most frequently executed basic blocks of a given application, with different sizes and shapes. The speedup results for the custom instructions identified by our tool are provided for a set of benchmark applications. The speedup is up to 68%, with only a few custom instructions used.

关键词： VLIW Program processors Libraries Registers Ray tracing Hardware Shape

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