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Transport of Mars-Crossing Asteroids from the Quasi-Hilda Region

Physical Review Letters 2005年第23期94卷 231102-231102页

作者： Michael Dellnitz Oliver Junge Martin W. Lo Jerrold E. Marsden Kathrin Padberg Robert Preis Shane D. Ross Bianca Thiere Faculty of Computer Science Electrical Engineering and Mathematics University of Paderborn D-33095 Paderborn Germany Navigation and Mission Design Jet Propulsion Laboratory California Institute of Technology M/S 301-140L 4800 Oak Grove Drive Pasadena California 91109 USA Control and Dynamical Systems California Institute of Technology MC 107-81 Pasadena California 91125 USA Department of Aerospace and Mechanical Engineering University of Southern California Los Angeles California 90089 USA

We employ set oriented methods in combination with graph partitioning algorithms to identify key dynamical regions in the Sun-Jupiter-particle three-body system. Transport rates from a region near the 3∶2 Hilda resonance into the realm of orbits crossing Mars’ orbit are computed. In contrast to common numerical approaches, our technique does not depend on single long term simulations of the underlying model. Thus, our statistical results are particularly reliable since they are not affected by a dynamical behavior which is almost nonergodic (i.e., dominated by strongly almost invariant sets).

关键词： .graph orbits partitioning week ending Asteroids Preis Mars-Crossing Quasi-Hilda

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Toward multimodal human-robot cooperation and collaboration

Toward multimodal human-robot cooperation and collaboration

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Collection of Technical Papers - AIAA 1st Intelligent systems Technical Conference

作者： Perzanowski, Dennis Brock, Derek Bugajska, Magdalena Thomas, Scott Sofge, Donald Adams, William Skubic, Marjorie Blisard, Sam Cassimatis, Nicholas Trafton, J. Gregory Schultz, Alan C. Naval Research Laboratory Washington DC 20375 University of Missouri Columbia MO 65211 Rensselaer Polytechnic Institute Troy NY 12180 Intelligent Multimodal/Multimedia Systems Code 5512 Interface Design and Evaluation Code 5513 Intelligent Systems Code 5515 Electrical and Computer Engineering Department Department of Cognitive Science

ISBN: (纸本)156347719X

Our multimodal interface integrates speech recognition, natural language understanding, spatial reasoning and human cognitive models for completing specific tasks and for perspective-taking in locative oriented tasks. With natural language and gestures, we believe human-robot interaction and communication is facilitated. Instead of concentrating on the various modalities of the interface, users can concentrate on the task at hand. Likewise, by incorporating human cognitive models for handling spatial information and perspective-taking, as well as for specific task completion, a better match with the expectations that humans acquire from their human-human interactions should be obtained, further facilitating cooperation and collaboration in human-robot interactions.

关键词： Speech recognition

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Glitching power reduction through supply voltage adaptation mechanism for low power array structure design

Glitching power reduction through supply voltage adaptation ...

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IEEE International Symposium on Circuits and systems (ISCAS)

作者： Sangjin Hong Shu-Shin Chin M. Sadasivam Mobile Systems Design Laboratory Department of Electrical and Computer Engineering Stony Brook University-SUNY Stony Brook NY USA

A novel supply voltage switching mechanism for reducing power dissipation of array structures is presented. With this mechanism, the supply voltage levels are successively activated by external clock signal in the direction of signal propagation. The mechanism eliminates power dissipated by the glitches while the speed of the array structure can be maintained. The mechanism is easily incorporated so that no circuit change in the existing array structure is required.

关键词： Power supplies Voltage Adaptive arrays Logic Switches Power dissipation Pipelines Registers Delay Clocks

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FPGA emulation of quantum circuits

FPGA emulation of quantum circuits

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IEEE International Conference on Computer design: VLSI in Computers and Processors, (ICCD)

作者： A.U. Khalid Z. Zilic K. Radecka Microelectronics and Computer Systems Laboratory McGiN University RRP Montreal QUE Canada Department of Electrical and Computer Engineering Concordia University Montreal QUE Canada

Quantum computing offers immense speedup in performing tasks such as data encryption and searching. The quantum algorithms can be modeled using classical computing devices, however classical computer simulations cannot deal efficiently with the parallelism present in quantum algorithms. The quantum circuit model for quantum algorithms is sufficient to describe the known quantum algorithms. Using analogies between quantum and digital circuits, we design the emulator of quantum algorithms in FPGAs that allows efficient experimentation with new quantum algorithms. This paper concentrates on new techniques for modeling quantum circuits, including the entanglement and probabilistic computing realization, as well as the critical issues in the required precision of computing.

关键词： Field programmable gate arrays Emulation Quantum computing Cryptography Concurrent computing Computer simulation Parallel processing Digital circuits Algorithm design and analysis Quantum entanglement

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VLSI design of high-throughput processing element for real-time particle filtering

VLSI design of high-throughput processing element for real-t...

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International Symposium on Signals, Circuits and systems, SCS 2003

作者： Chin, Shu-Shin Hong, Sangjin Mobile Systems Design Laboratory Department of Electrical and Computer Engineering State University of New York at Stony Brook Stony BrookNY11794-2350 United States

ISBN: (纸本)0780379799

This paper presents a VLSI ASIC design of a high-throughput processing element for real-time particle filtering applications. The implementation is based on robust and efficient fixed-point processing algorithms. The high-throughput is achieved through two-level pipelining and preserving the inherent parallelism. The pipeline depth is balanced among sub-units to reduce clock loading via reduction of unnecessary registers. The processing element can be used as a standalone particle filter or a part of parallel particle filters for high-speed and/or larger particles. © 2003 IEEE.

关键词： Monte Carlo methods

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A DC current measurement circuit for on-chip applications

A DC current measurement circuit for on-chip applications

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IEEE International Symposium on Circuits and systems (ISCAS)

作者： C.K.L. Tam G.W. Roberts Microelectronics and Computer Systems Laboratory Department of Electrical and Computer Engineering McGill University Montreal QUE Canada

A robust and highly scalable technique for measuring DC currents is described. The circuit consists largely of digital electronics except for a comparator and a passive RC filter. This simple structure is able to force a voltage at a circuit node while measuring the current that flows into it. The technique has been successfully demonstrated using a prototype constructed using a 0.35/spl mu/m CMOS chip.

关键词： Current measurement Circuit testing Voltage Pulse measurements Force measurement Pulse circuits Feedback circuits Application software Prototypes Integrated circuit testing

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Exploring the biocomputing frontier

Exploring the biocomputing frontier

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： R.L. Ewing H.S. Abdel-Aty-Zohdy L. Liou J.B. Moncrief Information Directorate US Air Force Research Laboratory OH USA Microelectronics System Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

Stop thinking that the universe is best described by Boolean order operations, consider the world of biocomputing. The idea in exploring the multidimensional characteristics of biocomputing systems involves multilevel protein logic interaction with hybrid digital systems (bio/digital/analog systems). In the protein biocomputing world, all models are multilevel and nonlinear exponential in nature. These biocomputing systems are linearized by boundary limited frequency, time response and dimensional ranges. The protein model and its correct development is probably the most difficult aspect for biocomputing issues. Previous protein models were not dealing with 2 and 3 dimensional models, while the current protein models are now faced with high frequency design, due to the emergence of bio-nanodevices. These future biocomputing devices will be chemical sensors, fluidic computer systems, optical switches, nanoactuators, self-repairing polymorphic computing systems, cognitive processors and biorobotics

关键词： Frequency Optical computing Multidimensional systems Logic Digital systems Time factors Protein engineering Chemical sensors Optical switches Nanoscale devices

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Collaborative QoS architecture between DiffServ and 802.11e Wireless LAN

Collaborative QoS architecture between DiffServ and 802.11e ...

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57th IEEE Semiannual Vehicular Technology Conference (VTC2003)

作者： Park, Seyong Kim, Kyungtae Kim, Doug C. Choi, Sunghyun Hong, Sangjin Mobile Systems Design Laboratory Department of Electrical Engineering Stt. Univ. New York at Stony Brook Stony Brook NY 11794-2350 United States Multimedia/Wireless Networking Lab. School of Electrical Engineering Seoul National University Seoul 151-744 Korea Republic of

As the multimedia applications such as Voice over IP (VoIP) and Audio/Visual (AV) streaming across the Internet emerge, many are working on the network architecture to extend such applications to the wireless networking domain. The emerging IEEE 802.11e Quality-of-Service (QoS)-enabled Wireless LAN (WLAN) is considered a strong candidate for the air interface for such multimedia applications thanks to the IP-centric network paradigm along with its inherent high-speed transmission capability. This paper provides an integrated wired/wireless network architecture interfacing QoS between user level traffic over IP using Differentiated Service (DiffServ) and transport level traffic using IEEE 802.11e WLAN. Our study investigates the correlations in end-to-end traffic management between DiffServ and 802.11e, and presents the hierarchical QoS signaling interface between DiffServ and 802.11e, in terms of traffic classifying, shaping and policing.

关键词： Mobile computing

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Application of novel hierarchical approach to formal verification of digital ICs

Application of novel hierarchical approach to formal verific...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： F.A. El-Licy H.S. Abdel-Aty-Zohdy Department of Information and Computer Science Institute of Statistical Studies and Research Cairo University Egypt Microelectronics System Design Laboratory Electrical and Systems Engineering Oakland University MI USA

A hierarchical approach for the abstraction of digital VLSICs is presented. Circuit layout is hierarchically abstracted into logical constructs of binary tree structures, which may be manipulated to extract circuit functionality for the purpose of verifying design correctness. VLSIC design specification in the form of HDL is hierarchically decomposed to generate logical formulae for the given specification. By comparing the above, a verification report is obtained

关键词： Formal verification Logic design Binary trees Hardware design languages Production Very large scale integration electrical capacitance tomography Combinational circuits Data structures Boolean functions

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Layout-aware analog system synthesis based on symbolic layout description and combined block parameter exploration, placement and global routing

Layout-aware analog system synthesis based on symbolic layou...

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IEEE Computer Society Annual Symposium on VLSI

作者： Hua Tang Hui Zhang A. Doboli VLSI Systems Design Laboratory Electrical and Computer Engineering Department State University of New York Stony Brook NY USA

ISBN: (纸本)0769519040

This paper presents a new methodology for layout-aware synthesis of analog systems. The methodology combines block parameter exploration, block placement and global interconnect routing while maintaining an accurate perspective on the layout parasitics. An original system representation (called Layout Constraint Graphs - LCG) was developed for synthesis. The paper discusses how block parameter exploration, placement and global routing are expressed in terms of the LCG graph. AC and transient performances of each explored solution are obtained using SPICE simulations. Experiments show the generality of the synthesis methodology by providing results for several applications including filters and converters.

关键词： Routing Signal synthesis Circuit synthesis design optimization Circuit simulation Wire Laboratories Integrated circuit interconnections SPICE design automation

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