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IEE Colloquium on Data Compression: Methods and Implementations (Ref. No. 1999/150)

作者： S. Mahapatra J.L. Nunez C. Foregrino-Thribe S. Jones Loughborough University Electronic Systems Design Laboratory Department of Electronic and Electrical Engineering Loughborough University Loughborough Leicestershire UK

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Implementation aspects of turbo-decoders for future radio applications

Implementation aspects of turbo-decoders for future radio ap...

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IEEE Conference on Vehicular Technology (VTC)

作者： F. Berens A. Worm H. Michel N. Wehn Advanced System Technology Geneva Applications Laboratory ST Microelectronics N.V. Geneva Switzerland Department of Electrical Engineering Institute of Microelectronic Systems University of Kaiserslautern Kaiserslautern Germany

Turbo codes will most likely be employed in future radio systems as a channel coding scheme for high-rate data services. However, turbo decoding is a comparatively complex task. To obtain efficient decoder implementations, the system design space has to be explored on multiple levels. In this paper, we span the system design space for turbo codes and describe a method of exploration, while focusing on the implementation-dependent part. The design decisions taken during exploration are rated regarding complexity, throughput and power consumption. The second part of our paper evaluates sample software and hardware implementations of a 2 Mbit/s turbo decoder.

关键词： Iterative decoding Turbo codes Hardware Viterbi algorithm Space technology Throughput Energy consumption Convolutional codes Iterative algorithms Computer architecture

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Implementation of programmable digital sigmoid function circuit for neuro-computing

Implementation of programmable digital sigmoid function circ...

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1998 Midwest Symposium on Circuits and systems, MWSCAS 1998

作者： Al-Nsour, Mahmoud Abdel-Aty-zohdy, Hoda S. Department of Electrical and Systems Engineering Microelectronics Systems Design Laboratory Oakland University RochesterMI48309-4401 United States

ISBN: (纸本)0818689145

A programmable digital sigmoid function generator circuit has been designed and implemented. The circuit is based on second order approximation of the nonlinear sigmoid function and utilizing its characteristics. It offers an easy way of changing the steepness of the function in the transition state. In addition, the squaring function operation was implemented using combinational logic. This offers a compact realization of the system as a parallel bit architecture. The maximum output error is.047 and the average error is within 0.01. Simulations show that the circuit operates satisfactorily up to 50 MHz. The digital VLSI circuit has been fabricated using MOSIS/AMI N-well 1.2 μm CMOS double metal process. It occupies an area of 900×450 μm2. © 1999 IEEE.

关键词： Timing circuits

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Verification system interface for VLSI combinational circuits

Verification system interface for VLSI combinational circuit...

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1998 Midwest Symposium on Circuits and systems, MWSCAS 1998

作者： El-Licy, Fatma A. Abdel-Aty-zohdy, Hoda S. Department of Electrical and Systems Engineering Microelectronics System Design Laboratory Oakland University RochesterMI48309-4401 United States

ISBN: (纸本)0818689145

A proof of correctness of a given VLSIC system design is established by proving the consistency and implication of the implemented design with respect to the specified design. The set of conditions that establish such consistency is termed verification conditions (VCs). This paper presents an automatic interface system for the verification of VLSI combinational circuits in which VCs are synthesized from circuit definition. This interface will allow a top down specification of the design (written in a given HDL language) to be parsed into binary tree structure representation. Also, a logical construct is built up from the physical layout specifications of the implemented design (extracted as SPICE file). The top down parse tree along with bottom up logic constructs form the basic building block structure of the front end of the interface system. VCs are then synthesized from the outcomes of the front end through a preprocessor. The back end of the interface system constitutes the preprocessor and a set of designators and modules for manipulating mathematical and logical operations. It provides an environment in which a theorem prover can be used to create a formal proof schema for the VCs which satisfy partial correctness of the circuit under consideration. © 1999 IEEE.

关键词： Specifications

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Wavelet-multifractal processing of signals

Wavelet-multifractal processing of signals

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IEEE Asia-Pacific Conference on Circuits and systems

作者： K. Soemintapura A.Z.R. Langi Laboratory for Signals and Systems Department of Electrical Engineering Institute of Technology Bandung Laboratory of Microelectronics Design IURC Microelectronics Institute of Technology Bandung Bandung West Java Indonesia

This research develops a new approach in processing multimedia signals (i.e., speech, audio, and images) using wavelets and multifractals. Processing multimedia signals is critical in many modern telecommunication and information systems. Nonstationary behaviours have been the most important characteristics of multimedia signals because they carry signal information. Unfortunately nonstationary parts are difficult to process effectively using traditional tools such as Fourier transforms. In contrast, wavelets and multifractality not only reveal that nonstationary parts are sufficient to represent natural images, but also can be used to reconstruct such signals. The general objectives of this research are to develop the wavelet and multifractal concepts into a new signal-processing framework, to obtain more effective and efficient signal representation. If the objectives can be achieved, the results of the proposed research can be a breakthrough in nonstationary signal processing, as fundamental as the well known Fourier approach in stationary signal processing.

关键词： Signal processing Feature extraction Fractals Signal analysis Laboratories microelectronics Signal synthesis Character recognition Data mining Signal design

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Artificial neural network electronic nose for volatile organic compounds

Artificial neural network electronic nose for volatile organ...

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Great Lakes Symposium on VLSI

作者： H.S. Abdel-Aty-Zohdy Microelectronics System Design Lab Department of Electrical and Systems Engineering Oakland University Rochester MI USA

Advanced microsystems that include, sensors, interface-circuits, and pattern-recognition integrated monolithically or in a hybrid module are needed for civilian, military, and space applications. These include: automotive, medical applications, environmental engineering, and manufacturing automation. ASICs with Artificial Neural Networks (ANN) are considered in this paper, with the objective of recognizing air-borne volatile organic compounds, especially alcohols, ethers, esters, halocarbons, NH/sub 3/, NO/sub 2/, and other warfare agent simulants. The ASIC inputs are connected to the outputs from array-distributed sensors which measure three-features for identifying each of four chemicals. A Specialized Reinforcement Neural Network (RNN) learning approach is chosen for the chemicals classification problem. Hardware implementation of the RNN is presented for 2 /spl mu/m CMOS process, MOSIS chip. design implementation and evaluation are also presented.

关键词： Artificial neural networks Electronic noses Sensor arrays Automotive engineering Chemical sensors Recurrent neural networks Medical services Biomedical equipment Biomedical engineering Manufacturing automation

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CMOS inverter current and delay model incorporating interconnect effects

CMOS inverter current and delay model incorporating intercon...

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IEEE International Symposium on Circuits and systems (ISCAS)

作者： M. Hafed N. Rumin Microelectronics and Computer Systems Laboratory Department of Electrical and Computer Engineering McGill University Montreal Canada

We present a new model for predicting the switching current and delay in a CMOS inverter with an RC load. The model exploits the ability of an inverter model to predict accurately the current peak time, t/sub m/, as a function of inverter size, input slope and capacitive load. An iterative procedure computes the effective capacitance presented by the RC load, using an empirical model for the output voltage of the RC load driven by a reference inverter. Not only is the resulting model accurate but computationally efficient as well so that a two to three order speed up over HSPICE is achieved.

关键词： Inverters Delay effects Semiconductor device modeling Voltage Shape Capacitance Current supplies MOS devices Integrated circuit interconnections Pulse shaping methods

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A 1.8 V 900 MHz CMOS RF receiver

A 1.8 V 900 MHz CMOS RF receiver

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IEEE Asia-Pacific Conference on Circuits and systems

作者： S. Wang R. Sheen O.T.-C. Chen Kuang-Chung Tao Signal and Media Laboratories Department o Electrical Engineering National Chung Cheng University Chiayi Taiwan High Frequency Circuits Design Department Microelectronics Systems Design Tech. Division Industrial Technology and Research Institute Hsinchu Taiwan

A 1.8 V 900 MHz CMOS RF receiver which integrates a low-noise amplifier, two down-conversion mixers, and a local oscillator has been developed. In this receiver, the single-ended two-stage low-noise amplifier is realized with a power gain of 11.6 dB and a noise figure of 3.8 dB at 900 MHz. Its 1 dB compression point is around -9 dBm. The down-conversion mixer with a single-ended RF input is designed with a conversion gain of -4 dB and the 1 dB compression point of -6 dBm. The local oscillator is implemented by using a phased-locked loop which can provide stable high-frequency oscillation signals. The proposed RF receiver was fabricated by using TSMC 0.6 /spl mu/m single-poly-triple-metal CMOS technology with a die size of 2.4 mm/spl times/1.8 mm.

关键词： Radio frequency Low-noise amplifiers RF signals Impedance Circuit noise Radiofrequency amplifiers Local oscillators CMOS technology Gain Integrated circuit technology

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THIN-FILM TRANSISTOR MODELING

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International Journal of High Speed Electronics and systems 1998年第3期9卷 703-723页

作者： BENJAMIN IÑIGUEZ TOR A. FJELDLY MICHAEL S. SHUR Microelectronics Laboratory DICE Université Catholique de Louvain (UCL) Louvain-la-Neuve B-1348 Belgium Center for Technology at Kjeller Norwegian University of Science and Technology N-2027 Kjeller Norway Electrical Computer and Systems Engineering Department Rensselaer Polytechnic Institute Troy NY 12180-3590 USA

We review recent physics-based, analytical DC models for amorphous silicon (a-Si), polysilicon (poly-Si), and organic thin film transistors (TFTs), developed for the design of novel ultra high-resolution, large area displays using advanced short-channel TFTs. In particular, we emphasize the modeling issues related to the main short-channel effects, such as self-heating (a-Si TFTs) and kink effect (a-Si and poly-Si TFTs), which are present in modern TFTs. The models have been proved to accurately reproduce the DC characteristics of a-Si:H with gate lengths down to 4 μm and poly-Si TFTs with gate lengths down to 2 μm. Because the scalability of the models and the use of continuous expressions for describing the characteristics in all operating regimes, the models are suitable for implementation in circuit simulators such as SPICE.

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1-wavelength loop type dielectric chip antennas

1-wavelength loop type dielectric chip antennas

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Antennas and Propagation Society International Symposium

作者： H. Tanidokoro N. Konishi E. Hirose Y. Shinohara H. Arai N. Goto Microelectronics Research Laboratory Central Research Institute Mitsubishi Material Corporation Chichibu Saitama Japan Diviaion of Electrical and Computer Engineering Faculty fo Engineering Yokohama National University Yokohama Kanagawa Japan Department of Electronics and Systems. Faculty of Engineering Takushoku University Hachioji Tokyo Japan

We propose a 1-wavelength loop type dielectric chip antenna that meets the demand for antennas with unidirectional radiation patterns for portable communication devices. The structure of the proposed antenna is shown. The radiating element printed loop is on the top of the cube. A feeding strip line is on one of the vertical face of the cube and a shorted plate parallel to the feeding strip line is on the same face. The conductive plane is on the bottom of the cube. By printing all of conductive elements on a ceramic cube this novel antenna is easy to fabricate.

关键词： Ceramics Finite difference methods Time domain analysis Dielectric loss measurement Directive antennas Antenna radiation patterns Conductors Permittivity Thick films Antenna measurements

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