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7th International Conference on Neural Information Processing systems, NIPS 1994

作者： Coggins, Richard Jabri, Marwan Flower, Barry Pickard, Stephen Systems Engineering and Design Automation Laboratory Department of Electrical Engineering J03 University of Sydney 2006 Australia

An analogue VLSI neural network has been designed and tested to perform cardiac morphology classification tasks. Analogue techniques were chosen to meet the strict power and area requirements of an Implantable Cardioverter Defibrillator (ICD) system. The robustness of the neural network architecture reduces the impact of noise, drift and offsets inherent in analogue approaches. The network is a 10:6:3 multi-layer perceptron with on chip digital weight storage, a bucket brigade input to feed the Intracardiac Electrogram (ICEG) to the network and has a winner take all circuit at the output. The network was trained in loop and included a commercial ICD in the signal processing path. The system has successfully distinguished arrhythmia for different patients with better than 90% true positive and true negative detections for dangerous rhythms which cannot be detected by present ICDs. The chip was implemented in 1.2um CMOS and consumes less than 200nW maximum average power in an area of 2.2 × 2.2mm2 © NIPS *** rights reserved.

关键词： Network architecture

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Introduction to Shannon Sampling and Interpolation Theory 1

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丛书名： Springer Texts in electrical engineering

1000年

作者： Robert J. Marks

ISBN: (数字)9781461397083

ISBN: (纸本)9781461397106

Much of that which is ordinal is modeled as analog. Most computational engines on the other hand are dig- ital. Transforming from analog to digital is straightforward: we simply sample. Regaining the original signal from these samples or assessing the information lost in the sampling process are the fundamental questions addressed by sampling and interpolation theory. This book deals with understanding, generalizing, and extending the cardinal series of Shannon sampling theory. The fundamental form of this series states, remarkably, that a bandlimited signal is uniquely specified by its sufficiently close equally spaced samples. The contents of this book evolved from a set of lecture notes prepared for a graduate survey course on Shannon sampling and interpolation theory. The course was taught at the department of electrical engineering at the University of Washington, Seattle. Each of the seven chapters in this book includes a list of references specific to that chapter. A sequel to this book will contain an extensive bibliography on the subject. The author has also opted to include solutions to selected exercises in the Appendix.

关键词： electrical engineering Math. Applications in Chemistry Computational Intelligence Models and Principles

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Improved supervision of NN's AOA determination with limited 1-D phased-array training data

Improved supervision of NN's AOA determination with limited ...

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2011 IEEE National Aerospace and Electronics Conference, NAECON 2011

作者： Van Sickle, Kevin Abdel-Aty-Zohdy, Hoda S. Microelectronics and Bio-Inspired Systems Design Lab. Department of Electrical and Computer Engineering Oakland University Rochester MI United States

ISBN: (纸本)9781457710407

A sixteen-channel linear phased array radar is calibrated by means of Artificial Neural Network (ANN). Limited data are used to train the various layers of the network, for Angle of Arrival (AOA) determinacy. This is designed to increase speed of operation and to prevent over fitting. The designed simulator generates time-series data sets representing continuous span of AOA. The generated datasets are used in multilayer feedforward NNs to find the phase, which is then used as inputs to Spiking Neural Network (SNN) o determine AOA. SNNs are used for hardware implementation feasibility. The designed simulator improved the accuracy of AOA determination, and opens the door for a wide variety of radar classification applications © 2011 IEEE.

关键词： Neural networks

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Ordered vector quantization for neural network pattern classification 3

Ordered vector quantization for neural network pattern class...

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1993 3rd IEEE-SP Workshop on Neural Networks for Signal Processing, NNSP 1993

作者： Owsley, L. Atlas, L. Interactive Systems Design Laboratory Department of Electrical Engineering University of Washington SeattleWA98195 United States

ISBN: (纸本)0780309286

The accurate classification of time sequences of vectors is a common goal in signal processing. Vector quantization (VQ) has commonly been used to help encode vectors for subsequent classification. The authors depart from this past approach proposing the use of VQ codebook indices, as opposed to codebook vectors. It is shown that one-dimensional ordering of these indices markedly improves the neural-network-based classification accuracy of acoustic time-frequency patterns. The needs for and extensions of multidimensional codebook indices are described. © 1993 IEEE.

关键词： Vector quantization

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A wide input range analog multiplier for neuro-computing

A wide input range analog multiplier for neuro-computing

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： M. Al-Nsour H.S. Abdel-Aty-Zohdy Microelectronics Systems Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MN USA Microelectronics Systems Design Laboratory Department of Electrical and Systems Engineering Oakland University Rochester MI USA

A wide input range 4-quadrant analog multiplier design and its VLSI implementation are presented. The design is based on the squaring law operation of saturated NMOS transistors. The circuit is realized by using 12 NMOS and 2 PMOS transistors. The multiplier accepts two signed inputs in the range of /spl plusmn/4 V. The simulated corner frequency is found to be at 85 MHz. N-well 2 /spl mu/m CMOS double metal process is utilized. It occupies 99/spl times/160 /spl mu/m/sup 2/. Statistical linear regression showed that the multiplier has less than 1% overall error. By extending the input range and minimizing the silicon area, this design has high potential in evolving neuro-computing applications.

关键词： MOSFETs Silicon Neural networks Neurons Intrusion detection Threshold voltage Circuit analysis design optimization microelectronics Laboratories

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Dimensions in the Bat algorithm with adaptive position update (APU-BA) for short Fiber Bragg grating optimal design

Dimensions in the Bat algorithm with adaptive position updat...

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2016 IEEE National Aerospace and Electronics Conference and Ohio Innovation Summit, NAECON-OIS 2016

作者： Al-Muraeb, Ahmed Abdel-Aty-Zohdy, Hoda Microelectronics and Bio-Inspired Systems Design Lab Department of Electrical and Computer Engineering Oakland University RochesterMI48309-4401 United States

ISBN: (纸本)9781509034413

Based on our work [1] we present a study for dimensions (number of FBG sections) in our novel APU-BA. C-band single-wavelength, and eye-safe dual-wavelength Triangular Spectrum Fiber Bragg Gratings (TS-FBG) of chosen lengths are considered. Setting the dimensions in APU-BA (and any swarm-based optimization algorithm) is critical. Optimum number of dimensions is reported. © 2016 IEEE.

关键词： Refractive index

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CMN: a co-designed neural architecture search for efficient computing-in-memory-based mixture-of-experts

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Science China(Information Sciences) 2024年第10期67卷 100-114页

作者： Shihao HAN Sishuo LIU Shucheng DU Mingzi LI Zijian YE Xiaoxin XU Yi LI Zhongrui WANG Dashan SHANG Department of Electrical and Electronic Engineering The University of Hong Kong ACCESS-AI Chip Center for Emerging Smart Systems InnoHK Centers Key Lab of Fabrication Technologies for Integrated Circuits Chinese Academy of Sciences Laboratory of Microelectronics Devices and Integrated Technology Institute of MicroelectronicsChinese Academy of Sciences University of Chinese Academy of Sciences School of Microelectronics Southern University of Science and Technology

Artificial intelligence(AI) has experienced substantial advancements recently, notably with the advent of large-scale language models(LLMs) employing mixture-of-experts(MoE) techniques, exhibiting human-like cognitive skills. As a promising hardware solution for edge MoE implementations, the computing-in-memory(CIM) architecture collocates memory and computing within a single device, significantly reducing the data movement and the associated energy consumption. However, due to diverse edge application scenarios and constraints, determining the optimal network structures for MoE, such as the expert's location,quantity, and dimension on CIM systems remains elusive. To this end, we introduce a software-hardware co-designed neural architecture search(NAS) framework, CIM-based MoE NAS(CMN), focusing on identifying a high-performing MoE structure under specific hardware constraints. The results of the NYUD-v2 dataset segmentation on the RRAM(SRAM) CIM system reveal that CMN can discover optimized MoE configurations under energy, latency, and performance constraints, achieving 29.67×(43.10×) energy savings,175.44×(109.89×) speedup, and 12.24× smaller model size compared to the baseline MoE-enabled Visual Transformer, respectively. This co-design opens up an avenue toward high-performance MoE deployments in edge CIM systems.

关键词： mixture-of-experts computing-in-memory neural architecture search resistive random-access memory static random-access memory

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On the potential of lateral BJTs and SiGe HBTs in advanced CMOS technologies

On the potential of lateral BJTs and SiGe HBTs in advanced C...

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Pacific Rim Meeting on Electrochemical and Solid State Science 2020, PRiME 200

作者： Suligoj, Tomislav Žilak, Josip Osrečki, Željko Koričić, Marko Micro and Nano Electronics Laboratory Department of Electronics Microelectronics Computer and Intelligent Systems Faculty of Electrical Engineering and Computing University of Zagreb Croatia

ISBN: (纸本)9781607689003

The potential of lateral bipolar transistors, based on Horizontal Current Bipolar Transistor (HCBT), in scaled CMOS technologies are examined by TCAD simulations. Thorough and consistent simulations show that SiGe HCBT can achieve fT/fmax of 358/490 GHz outperforming standard vertical-current HBT with fT/fmax of 348/423 GHz, assuming the same intrinsic transistor doping profile. By optimizing the extrinsic base shape and width, the characteristics of SiGe HCBT can be further improved. SiGe HCBTs in bulk silicon substrates result in better performance comparing to the transistors in SOI substrates. © The Electrochemical Society

关键词： Si-Ge alloys

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HISTOGRAM-BASED DISTORTION AND GAIN TRACKING TESTING OF AN 8-BIT PCM MIXED ANALOG-DIGITAL IC CHIP 35

HISTOGRAM-BASED DISTORTION AND GAIN TRACKING TESTING OF AN 8...

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35TH MIDWEST SYMP ON CIRCUITS AND systems

作者： TONER, MF ROBERTS, GW Microelectronics and Computer Systems Laboratory Department of Electrical Engineering McGill University 3480 University Street Montreal H3A 2A7 Canada

ISBN: (纸本)0780305108

The effective number of bits of a linear Analog-to-Digital Converter (ADC) can be computed using the code density histogram method. In this article, the technique is adapted to test an oversampling or Sigma-Delta (ΣΔ) converter. It is assumed that the device under test includes a ΣΔ modulator, a decimator, and a μ-law compressor. The analog stimulus to the device under test is supplied by a precision signal generator, and the code density histogram of the 8-bit μ-law compressed output of the ADC is analyzed to determine whether the converter is performing within its specifications. This paper presents simulation results which were obtained using a very simple model for the ADC and additive white Gaussian noise. © 1992 IEEE.

关键词： Timing circuits

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Wireless Acoustic Sensor Networks and Edge Computing for Rapid Acoustic Monitoring

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IEEE/CAA Journal of Automatica Sinica 2019年第1期6卷 64-74页

作者： Zhengguo Sheng Saskia Pfersich Alice Eldridge Jianshan Zhou Daxin Tian Victor C.M.Leung the Department of Engineering and Design University of Sussex Infineon Technologies AG the Department of Music University of Sussex Beijing Advanced Innovation Center for Big Data and Brain Computing (BDBC) Beijing Key Laboratory for Cooperative Vehicle Infrastructure Systems & Safety ControlSchool of Transportation Science and EngineeringBeihang University the Department of Electrical and Computer Engineering The University of British Columbia

Passive acoustic monitoring is emerging as a promising solution to the urgent, global need for new biodiversity assessment methods. The ecological relevance of the soundscape is increasingly recognised, and the affordability of robust hardware for remote audio recording is stimulating international interest in the potential for acoustic methods for biodiversity *** scale of the data involved requires automated methods,however, the development of acoustic sensor networks capable of sampling the soundscape across time and space and relaying the data to an accessible storage location remains a significant technical challenge, with power management at its core. Recording and transmitting large quantities of audio data is power intensive,hampering long-term deployment in remote, off-grid locations of key ecological interest. Rather than transmitting heavy audio data, in this paper, we propose a low-cost and energy efficient wireless acoustic sensor network integrated with edge computing structure for remote acoustic monitoring and in situ *** and computation of acoustic indices are carried out directly on edge devices built from low noise primo condenser microphones and Teensy microcontrollers, using internal FFT hardware support. Resultant indices are transmitted over a ZigBee-based wireless mesh network to a destination *** tests of audio quality, indices computation and power consumption demonstrate acoustic equivalence and significant power savings over current solutions.

关键词： Acoustic sensor networks edge computing energy efficiency

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