咨询与建议

限定检索结果

文献类型

  • 9 篇 会议
  • 3 篇 期刊文献

馆藏范围

  • 12 篇 电子文献
  • 0 种 纸本馆藏

日期分布

学科分类号

  • 4 篇 工学
    • 2 篇 电气工程
    • 1 篇 电子科学与技术(可...
    • 1 篇 信息与通信工程
    • 1 篇 计算机科学与技术...
    • 1 篇 核科学与技术
    • 1 篇 软件工程

主题

  • 6 篇 large scale inte...
  • 2 篇 cmos process
  • 2 篇 timing
  • 2 篇 design engineeri...
  • 2 篇 circuit testing
  • 1 篇 sensor systems
  • 1 篇 circuit analysis
  • 1 篇 computer science
  • 1 篇 magnetic tunneli...
  • 1 篇 circuit simulati...
  • 1 篇 lighting control
  • 1 篇 nickel target
  • 1 篇 magnetic switchi...
  • 1 篇 production syste...
  • 1 篇 sociotechnical s...
  • 1 篇 alpha-particles
  • 1 篇 packaging
  • 1 篇 computational co...
  • 1 篇 substrates
  • 1 篇 manufacturing pr...

机构

  • 1 篇 risc processor d...
  • 1 篇 design methodolo...
  • 1 篇 remap ucla ca
  • 1 篇 lsi memory divis...
  • 1 篇 design system de...
  • 1 篇 design automatio...
  • 1 篇 department of co...
  • 1 篇 advanced cmos te...
  • 1 篇 manufacturing en...
  • 1 篇 solid state memo...
  • 1 篇 system ulsi engi...
  • 1 篇 department of en...
  • 1 篇 whirl pool-bath ...
  • 1 篇 system engineeri...
  • 1 篇 semiconductor te...
  • 1 篇 advanced lsi tec...
  • 1 篇 toshiba america ...
  • 1 篇 camera system de...
  • 1 篇 design departmen...
  • 1 篇 system lsi desig...

作者

  • 2 篇 k. ogawa
  • 1 篇 heemin park
  • 1 篇 yong-chun kim
  • 1 篇 sato m
  • 1 篇 hanagata t
  • 1 篇 n. kojima
  • 1 篇 k. yamane
  • 1 篇 y. ohtaguro
  • 1 篇 h. nagao
  • 1 篇 kitamura f
  • 1 篇 mani b. srivasta...
  • 1 篇 h. kano
  • 1 篇 k. bessho
  • 1 篇 miyazaki h
  • 1 篇 c. fukumoto
  • 1 篇 mori h
  • 1 篇 m. shoji
  • 1 篇 yonemoto t
  • 1 篇 f. kitamura
  • 1 篇 shin-dug kim

语言

  • 11 篇 英文
  • 1 篇 其他
检索条件"机构=Microprocessor Design Department System LSI Design Division"
12 条 记 录,以下是1-10 订阅
排序:
design and Implementation of a Wireless Sensor Network for Intelligent Light Control
Design and Implementation of a Wireless Sensor Network for I...
收藏 引用
International Symposium on Information Processing in Sensor Networks (IPSN)
作者: Heemin Park Jeff Burke Mani B. Srivastava System LSI Division Samsung Electronics Camera Processor Design Yongin si South Korea REMAP UCLA Los Angeles CA USA NESL/EE Department UCLA Los Angeles CA USA
We present the design and implementation of the Illuminator, a preliminary sensor network-based intelligent light control system for entertainment and media production. Unlike most sensor network applications, which f... 详细信息
来源: 评论
A novel nonvolatile memory with spin torque transfer magnetization switching: spin-ram
A novel nonvolatile memory with spin torque transfer magneti...
收藏 引用
International Electron Devices Meeting (IEDM)
作者: M. Hosomi H. Yamagishi T. Yamamoto K. Bessho Y. Higo K. Yamane H. Yamada M. Shoji H. Hachino C. Fukumoto H. Nagao H. Kano Solid State Memories Research Laboratory Information Technologies Laboratories Sony Corporation Atsugi Kanagawa Japan Semiconductor Technology Development Group Semiconductor Solution Network Company Sony Corporation Atsugi Kanagawa Japan Semiconductor Technology Development Group Semiconductor Solution Network Company Sony Corporation Memory Design Section 3 LSI Library Design DepartmentSystem LSI Products Division 1 Sony Semiconductor Kyushu Corporation Atsugi Kanagawa Japan
A novel nonvolatile memory utilizing spin torque transfer magnetization switching (STS), abbreviated spin-RAM hereafter, is presented for the first time. The spin-RAM is programmed by magnetization reversal through an... 详细信息
来源: 评论
Low-power design methodology and applications utilizing dual supply voltages  00
Low-power design methodology and applications utilizing dual...
收藏 引用
2000 Asia and South Pacific design Automation Conference, ASP-DAC 2000
作者: Usami, Kimiyoshi Igarashi, Mutsunori Design Methodology Department System LSI Design Division Toshiba Corporation 580-1 Horikawa-cho Saiwai-ku Kawasaki 210-8520 Japan
This paper describes a gate-level power minimization methodology using dual supply voltages. Gates and flip-flops off the critical paths are made to operate at the reduced supply voltage to save power. Core technologi... 详细信息
来源: 评论
Repeater insertion method and its application to a 300 MHz 128-bit 2-way superscalar microprocessor
Repeater insertion method and its application to a 300 MHz 1...
收藏 引用
Asia and South Pacific design Automation Conference
作者: N. Kojima Y. Paramwswar C. Klingner Y. Ohtaguro M. Matsui S. Iwasa T. Teruyama T. Shimazawa H. Takeda K. Hashizume H. Tago M. Yamada Design Methodology Department System LSI Design Div Toshiba Corporation Semiconductor Company Kawasaki Japan Toshiba America Electrical Components Inc. San Jose CA USA System ULSI Engineering Laboratory Toshiba Corporation Semiconductor Company Kawasaki Japan RISC Processor Development Department Microprocessor Div Toshiba Corporation Semiconductor Company Kawasaki Japan Microprocessor Design Department System LSI Design Division Toshiba Corporation Semiconductor Company Kawasaki Japan Advanced LSI Technology Development Department Toshiba Microelectronics Corporation Kawasaki Japan
Interconnect delay is dominant in today's high speed Vlsi circuits and there have been various studies on ways to resolve it. A repeater insertion tool "RePertory" has been developed to solve the interco... 详细信息
来源: 评论
Find all solutions of piecewise-linear resistive circuits using an LP test
收藏 引用
IEEE Transactions on Circuits and systems I: Fundamental Theory and Applications 2000年 第7期47卷 1115-1120页
作者: K. Yamamura K. Yomogita Department of Electrical ElectronicCommunication EngineeringFaculty of Science and Engineering Chuo University Tokyo Japan Design System Department LSI Division OKI Electric Industry Company Limited Tokyo Japan
An efficient algorithm is proposed for finding all solutions of piecewise-linear (PWL) resistive circuits using linear programming (LP). This algorithm is based on a simple test (termed the LP test) for nonexistence o... 详细信息
来源: 评论
A low-power cache system for embedded processors
A low-power cache system for embedded processors
收藏 引用
Midwest Symposium on Circuits and systems (MWSCAS)
作者: Gi-Ho Park Kil-Whan Lee Jang-Soo Lee Tack-Don Han Shin-Dug Kim Yong-Chun Kim Seh-Woong Jeong Kwang-Yup Lee Research Institute of ASIC Design Yonsei University Seoul South Korea Department of Computer Science Yonsei University Seoul South Korea MCU Team System LSI Division Samsung Electronics Company Limited Yongin si South Korea Department of Computer Engineering Seokyeong University Seoul South Korea
A low-power cache structure for embedded processors, called a cooperative cache system, is presented in this paper. The cooperative cache system reduces power consumption of the cache system by virtue of the structura... 详细信息
来源: 评论
Intermodulation analysis of mixer circuits based on frequency domain relaxation method
Intermodulation analysis of mixer circuits based on frequenc...
收藏 引用
Custom Integrated Circuits Conference (CICC)
作者: A. Ushida Y. Yamagami Y. Nishio M. Takahashi K. Ogawa Department of Electrical and Electronic Engineering University of Tokushima Tokushima Japan Custom DA Section Design Automation Department LSI System Development Division SONY Company Limited Atsugi Kanagawa Japan
There are many communication circuits driven by multi-tone signals such as modulators and mixers. If the output frequency components are largely different to each other, the brute force numerical method will take an e... 详细信息
来源: 评论
A study of fully silicided 0.18 /spl mu/m CMOS ESD protection devices
A study of fully silicided 0.18 /spl mu/m CMOS ESD protectio...
收藏 引用
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)
作者: T. Suzuki S. Mitarai S. Ito H. Monma N. Higashi Advanced CMOS Technology Department LSI Group Fujitsu Laboratories Limited Kuwana-gun Mie Japan Manufacturing Engineering Division LSI Group Fujitsu Laboratories Limited Kuwana-gun Mie Japan System LSI Design Dep Fujitsu VLSI Limited Kuwana-gun Mie Japan
We studied the optimization of an ESD protection circuit based on MM and HBM test results using a test element group (TEG) created in a fully silicided 0.1 /spl mu/m CMOS process. We concluded that the change in drain... 详细信息
来源: 评论
PASTEL: A parameterized memory characterization system
PASTEL: A parameterized memory characterization system
收藏 引用
design, Automation and Test in Europe Conference (DATE98)
作者: Ogawa, K Kohno, M Kitamura, F Design Automation Department System LSI Division Semiconductor Company Sony Japan
PASTEL is a parameterized memory characterization system which extracts the characteristics of ASIC on-chip-memories such as delay, timing and power consumption which are important in lsi logic design. PASTEL is a ful... 详细信息
来源: 评论
PASTEL: a parameterized memory characterization system  98
PASTEL: a parameterized memory characterization system
收藏 引用
design, Automation and Test in Europe Conference and Exhibition
作者: K. Ogawa M. Kohno F. Kitamura Design Automation Department System LSI Division Semiconductor Company Japan
PASTEL is a parameterized memory characterization system which extracts the characteristics of ASIC on-chip-memories such as delay, timing and power consumption which are important in lsi logic design. PASTEL is a ful... 详细信息
来源: 评论