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1993 computer Architectures for Machine Perception, CAMP 1993

作者： Eshaghian, Mary M. Nash, J. Greg Shaaban, Muhammad E. Shu, David B. Department of Computer and Information Science New Jersey Institute of Technology NewarkNJ United States Centar Los AngelesCA United States Department of Electrical Engineering-Systems University of Southern California Los AngelesCA United States Hughes Research Laboratories MalibuCA United States

ISBN: (纸本)0818654201

The authors present a set of heterogeneous algorithms for computer vision tasks using the image understanding architecture (IUA). The full-scale IUA developed jointly by Hughes Research Labs and University of Massachusetts at Amherst is a multiple level heterogeneous architecture. Each level is constructed to perform tasks most suitable to its mode of processing. The lowest level called CAAPP is an SIMD bit-serial mesh. The second level is an MIMD organization of numerically powerful digital signal processing chips. At the top level there are fewer number of MIMD general purpose processors. The authors propose a set of algorithms utilizing multiple levels of this organization, concurrently. The problems studied include Hugh transform-line detection, finding geometric properties of images, and high level image understanding tasks such as object matching. © 1993 IEEE.

关键词： Digital signal processing

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Generalized agreement between concurrent fail-stop processes 7th

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7th International Workshop on Distributed Algorithms, WDAG 1993

作者： Burns, James E. Cruz, Rolando I. Loui, Michael C. College of Computing Georgia Institute of Technology AtlantaGA30332 United States ATS&T Bell Laboratories NapervilleIL60566 United States Department of Electrical and Computer Engineering Coordinated Science Laboratory University of Illinois at Urbane-Champaign UrbanaIL61801 United States Bell Communications Research Red BankNJ07701 United States

ISBN: (纸本)9783540572718

For a system of concurrent processes that can fail by stopping, we study a generalization of the traditional binary agreement problem having more than two possible input values. We provide bounds on the number of possible inputs for which agreement is possible in a system of n concurrent processes that communicate using read-modify-write operations on m shared memory cells of sizes r1,…,rm. Let V be the set of input values. We present an agreement protocol for two processes with (formula presented), where rm=maxj,{rj}. For m=1 and m=2, we prove that this upper bound on |V| is the best possible. A protocol for n processes is fully resilient if it tolerates up to n−1 failures;a fully resilient protocol is wait-free, because no process needs to wait for any other. In a write-once protocol, each memory cell changes value at most once during each execution of the protocol. We present a fully resilient write-once agreement protocol for (formula presented). We show that no fully resilient write-once agreement protocol exists when (formula presented) and n≥m. © Springer-Verlag Berlin Heidelberg 1993.

关键词： Memory architecture

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Heterogeneous algorithms for image understanding architecture

Heterogeneous algorithms for image understanding architectur...

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computer Architectures for Machine Perception (CAMP)

作者： M.M. Eshaghian J.G. Nash M.E. Shaaban D.B. Shu Department of Computer and Information Science New Jersey Institute of Technology Newark NJ USA Department of Electrical Engineering-Systems University of Southern California Los Angeles CA USA Centar Los Angeles CA USA Hughes Research Laboratories Inc. Malibu CA USA

关键词： computer architecture computer vision Concurrent computing Parallel processing Parallel architectures Supercomputers Switches Information science laboratories Object detection

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Predictability of load/store instruction latencies 26

Predictability of load/store instruction latencies

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IEEE/ACM International Symposium on Microarchitecture (MICRO)

作者： Santosh G. Abraham Rabin A. Sugumar Daniel Windheiser B. R. Rau Rajiv Gupta Computer Science Department Colorado State University Fort Collins CO USA Division of Health Sciences and Technology Harvard and MIT Cambridge MA USA Department of Electrical Engineering M.I.T. Cambridge MA USA Hewlett Packard Laboratories 1501 Page Mill Road Bldg. 3U-7 Palo Alto CA

ISBN: (纸本)9780818652806

Presents a model of coarse grain dataflow execution. The authors present one top down and two bottom up methods for generation of multithreaded code, and evaluate their effectiveness. The bottom up techniques start from a fine-grain dataflow graph and coalesce this into coarse-grain clusters. The top down technique generates clusters directly from the intermediate data dependence graph used for compiler optimizations. The authors discuss the relevant phases in the compilation process. They compare the effectiveness of the strategies by measuring the total number of clusters executed, the total number of instructions executed, cluster size, and number of matches per cluster. It turns out that the top down method generates more efficient code, and larger clusters. However the number of matches per cluster is larger for the top down method, which could incur higher cluster synchronization costs.< >

关键词： Yarn Size measurement Parallel processing Delay Hardware computer science Costs Hybrid power systems computer architecture Registers

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Heterogeneous algorithms for image understanding architecture

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Parallel Algorithms and Applications 1993年第4期1卷 273-284页

作者： Eshaghian, Mary M. Greg Nash, J. Shaaban, Muhammad E. Shu, David B. Department of Computer and Information Science New Jersey Institute of Technology Newark New Jersey United States Cenlar Los Angeles California United States Department of Electrical Engineering-Syslems University of Southern California Los Angeles California United States Hughes Research Laboratories Malibu California United States

In this paper, we present a set of heterogeneous algorithms for computer vision tasks using the Image Understanding Architecture [IUA]. The full-scale IUA developed jointly by Hughes Research Labs and University of Massachusetts at Amherst is a multiple level heterogeneous architecture. Each level is constructed to perform tasks most suitable to its mode of processing. The lowest level called CAAPP is an SIMD bit-serial mesh. The second level is an MIMD organization of numerically powerful digital signal processing chips. At the top level there are fewer number of MIMD general purpose processors. We propose a set of algorithms utilizing multiple levels of this organization, concurrently. The problems studied include Hough Transform-line detection, finding geometric properties of images, and high level image understanding tasks such as object matching. © 1993, Gordon aad Breach science Publishers S.A. All rights reserved. © 1993, Taylor & Francis Group, LLC. All rights reserved.

关键词： Heterogeneous computing parallel image computing vlsi architectures

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An approach to the direct analysis of transient stability

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European Transactions on electrical Power 1993年第3期3卷 241-248页

作者： Djukanovic, M.B. Sobajic, D.J. Pao, Y.‐H. Miodrag B. Djukanovic (1959) received his B.S. M.Sc. and Ph.D. degrees in Electrical Engineering from the University of Belgrade/Yugoslavia in 1982 1985 and 1992 respectively specializing in electric power systems. In 1984 he joined the Electrical Engineering Institute “Nikola Tesla” in Belgrade where he was working on the scientific studies in the field of power systems planning operation and control. In 1985 and 1990 he was appointed as a research scholar at the Royal Institute of Technology Stockholm and Case Western Reserve University Cleveland Ohio. His major in- terests are in the area of power system analysis steady-state and dynamic security and application of neural networks in electric power systems. (Electrical Engineering Institute “Nicola Tesla” ul. Koste Glavinica 8A YU-11000 Belgrad T +3811/2351-619 Fax + 3811/2351-823) Dejan J. Sobajic (1949) received the B.S.E.E. and the M.S.E.E. degrees from the University of Belgrade/Yugoslavia in 1972 and 1976 respectively and the Ph.D. degree from Case Western Reserve University Cleveland Ohio in 1988. At present he is with the Department of Electrical Engineering and Applied Physics Case Western Reserve University Cleveland. He is also the Engineering Manager of A1 WARE Inc. Cleveland. His current research interests include power system operation and control neuralnet systems and adaptive control. He is a member of the IEEE Task Force on Neural-Network Applications in Power Systems and of the IEEE Intelligent Controls Committee. He is the Chairman of the International Neural-Networks Society Special Interest Group on Power Engineering. (Case Western Reserve University Department of Electrial Engineering and Computer Sciences Glennan Building Ohio 44 106 USA T + 1216/421-2380 Fax +1216/368-8776) Yoh-Han Pao (1922) has been a Professor of Electrical Engineering and Computer Science at Case Westem Reserve University (CWRU) Cleveland Ohio since 1967. He has served as chairman of the University's Electrical Engineering Department

The Transient Energy Function (TEF) method has been intensely investigated over the last decade as a reliable and accurate tool for transient stability assessment of multimachine power systems. In this paper we propose the Potential Energy Boundary Surface (PEBS) based method for direct analysis of transient stability. The critical value of transient energy and the Critical Clearing Time (T_CCT) are evaluated without the need for successive calculation and memorization of the system kinetic and potential energy values along the sustained fault trajectory. The method is used for determination of output features in the training phase of the neural‐net based transient security assessment. The proposed approach is tested on the well‐known ten‐generator New England test system demonstrating the validity and accuracy of obtained results. Copyright © 1993 John Wiley & Sons, Ltd.

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A microfabricated floating-element shear stress sensor using wafer-bonding technology

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Journal of Microelectromechanical Systems 1992年第2期1卷 89-94页

作者： Shajii, Javad Ng, Kay-Yip Schmidt, Martin A. Microsystems Technology Laboratories Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology Cambridge MA USA

A microfabricated floating-element (120 μm × 140 μm × 5 μm) liquid shear stress sensor has been developed using wafer-bonding technology. The sensor has been designed for high shear stresses (1-100 kPa) and high-pressure environments (up to 6600 psi) and utilizes a piezoresistive transduction scheme. Analytical and finite-element method (FEM) modeling have been performed to predict the sensor response. The sensor has been tested for both its mechanical integrity in high-pressure environments and its output response in the controlled environment of a cone and plate viscometer. The processing steps in the fabrication of the sensor, the analytical and FEM modeling, the experimental procedures, and the results of the experiments are described.

关键词： Piezoelectric transducers

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An Integrated Airgap-Capacitor Pressure Sensor and Digital Readout with Sub-100 Attofarad Resolution

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Journal of Microelectromechanical Systems 1992年第3期1卷 121-129页

作者： Kung, Joseph T. Lee, Hae-Sueung Microsystems Technology Laboratories Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology Cambridge MA 02139 United States Microsystems Technology Laboratories Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology Cambridge MA 02139 United States

The fabrication and charaterization of an integrated airgap-capacitor pressure sensor is presented. The capacitor fabrication process uses standard IC processing to create NMOS circuits, and an added polysilicon layer to create poly-to-n 4- capacitors with a 0.6-pm-thick dielectric using deposited oxide. Subsequent processing is used to etch the oxide under the polysilicon from the back of the substrate (formed using bulk etching), to produce deformable, parallel-plate, airgap capacitors on the front-side alongside MOS circuits. Sensor chips are fabricated using 100 x 100 μm, 100 fF airgap capacitors with on-chip circuitry. The sensor chip is a part of a capacitive measurement system that uses a charge-redistribu-tion sense technique to achieve very high capacitance resolution. The pressure sensor chips were characterized versus applied pressure in the 0–240 kPa (0–35 psi) range using optical phase measurement interferometry to measure deflection and shape, and charge-redistribution sense techniques to measure capacitance change. Measurements indicate a sensitivity of 0.93 mV/kPa (6.40 mV/psi) with a deflection of 10 nm/kPa (70 nm/psi) from 0–69 kPa (0–10 psi). Standard deviations indicate a static pressure resolution of 0.54 kPa (0.078 psi), which translates to 30 attofarads at a sampling frequency of 11 kHz. © 1992 IEEE

关键词： MOS capacitors Circuits Sensor phenomena and characterization Fabrication Air gaps Capacitive sensors Semiconductor device measurement MOS devices Dielectrics Sensor systems

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A computer-aided design system for microelectromechanical systems (MEMCAD)

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Journal of Microelectromechanical Systems 1992年第1期1卷 3-13页

作者： Senturia, Stephen D. Harris, Robert M. Johnson, Brian P. Kim, Songmin Nabors, Keith Shulman, Matthew A. White, Jacob K. Microsystems Technnlnov Laboratories Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology Cambridge MA 02139 United States Power Products Division Systems Technology Division IBM Corp. Endicott. Cambridge NY United States Microsystems Technology Laboratories Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology MA 07139 United States Research Laboratory of Electronics Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology Cambridge MA 02139 United States Microsystems Technology Laboratories Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology Cambridge Redmond. MA. United States Microsoft Corp. WA 98052 United States

The authors describe the MIT Microelectromechanical computer-Aided Design system (MEMCAD), in which selected commercial software packages are linked with specialized database and numerical programs to allow designers to quickly perform both mechanical and electrical analyses of structures either described directly, or derived from the design specification (mask data plus process flow). The system architecture, the various modules, and their present status are described, and present system performance is demonstrated with several examples.

关键词： Electromechanical Devices

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Stabilization of squeezing with a nonlinear fiber interferometer

Stabilization of squeezing with a nonlinear fiber interferom...

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1992 Quantum Electronics and Laser science Conference

作者： Doerr, C.R. Bergman, K. Shirasaki, M. Haus, H.A. Department of Electrical Engineering and Computer Science Research Laboratory of Electronics Massachusetts Institute Technology Cambridge 02139 MA United States Optoelectronic Systems Laboratory Fujitsu Laboratories Ltd. Kawasaki 211 Japan

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