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Asia-Pacific Conference on Software Engineering

作者： Shinobu Saito Kenji Takahashi Yasuyuki Hamada Jan Vermeulen Computer and Data Science Laboratories NTT Tokyo Japan Innovation NTT Security Holidings Sunnyvale CA USA Services NTT Americas Charlotte NC USA

ISBN: (纸本)9781665455381

As companies run their business (e.g., sales, pro-curement), they conduct a set of business processes that include activities and flows connecting them. There exist an enormous number of patterns of business processes, or process-patterns. This industrial paper proposes a new technique, RP2A (Rare Process-Pattern Analysis), to examine process-patterns for finding operational problems such as compliance violations. The technique analyzes system execution data (= event log and user information) stored in the system related to the processes. By a combination of process-pattern search and activity search, RP2A discovers potential problem process-patterns in terms of execution frequency. We also report an industrial case study carried out using the technique. By analyzing the system execution data corrected from the 6-month system operation, we identified all 373 process-patterns, and 32 potential problem process-patterns out of them. Then, 4 domain experts in the industry verified the 32 process-patterns and found that 18 process-patterns, namely more than half of them (56% (=18/32)) contain actual problems. Almost problems are violations of internal policies which even the domain experts did not recognize. The technique succeeded in finding a kind of unknown problems in the business processes.

关键词： Industries Systems operation Companies Search problems Business Software engineering

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Pruning randomly initialized neural networks with iterative randomization 21

Pruning randomly initialized neural networks with iterative ...

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Proceedings of the 35th International Conference on Neural Information Processing Systems

作者： Daiki Chijiwa Shin'ya Yamaguchi Yasutoshi Ida Kenji Umakoshi Tomohiro Inoue NTT Computer and Data Science Laboratories NTT Corporation NTT Social Informatics Laboratories NTT Corporation

ISBN: (纸本)9781713845393

Pruning the weights of randomly initialized neural networks plays an important role in the context of lottery ticket hypothesis. Ramanujan et al. [23] empirically showed that only pruning the weights can achieve remarkable performance instead of optimizing the weight values. However, to achieve the same level of performance as the weight optimization, the pruning approach requires more parameters in the networks before pruning and thus more memory space. To overcome this parameter inefficiency, we introduce a novel framework to prune randomly initialized neural networks with iteratively randomizing weight values (IteRand). Theoretically, we prove an approximation theorem in our framework, which indicates that the randomizing operations are provably effective to reduce the required number of the parameters. We also empirically demonstrate the parameter efficiency in multiple experiments on CIFAR-10 and ImageNet.

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data-Efficient Error Mitigation for Physical and Algorithmic Errors in a Hamiltonian Simulation

arXiv

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arXiv 2025年

作者： Hakkaku, Shigeo Suzuki, Yasunari Tokunaga, Yuuki Endo, Suguru NTT Computer and Data Science Laboratories NTT Corporation 3-9-11 Midori-cho Musashino Tokyo180-8585 Japan NTT Research Center for Theoretical Quantum Physics NTT Corporation 3-1 Morinosato-Wakamiya Atsugi243-0198 Japan JST PRESTO 4-1-8 Honcho Saitama Kawaguchi332-0012 Japan

Quantum dynamics simulation via Hamilton simulation algorithms is one of the most crucial applications in the quantum computing field. While this task has been relatively considered the target in the fault-tolerance era, the experiment for demonstrating utility by an IBM team simulates the dynamics of an Ising-type quantum system with the Trotter-based Hamiltonian simulation algorithm with the help of quantum error mitigation [1]. In this study, we propose the data-efficient 1D extrapolation method to mitigate not only physical errors but also algorithmic errors of Trotterized quantum circuits in both the near-term and early fault-tolerant eras. Our proposed extrapolation method uses expectation values obtained by Trotterized circuits, where the Trotter number is selected to minimize both physical and algorithmic errors according to the circuit’s physical error rate. We also propose a method that combines the data-efficient 1D extrapolation with purification QEM methods, which improves accuracy more at the expense of multiple copies of quantum states or the depth of the quantum circuit. Using the 1D transverse-field Ising model, we numerically demonstrate our proposed methods and confirm that our proposed extrapolation method suppresses both statistical and systematic errors more than the previous extrapolation method. © 2025, CC0.

关键词： Ising model

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Stimulated emission from superradiant atoms in waveguide QED

Stimulated emission from superradiant atoms in waveguide QED

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CLEO: science and Innovations, S and I 2022

作者： Asaoka, Rui Gea-Banacloche, Julio Tokunaga, Yuuki Koshino, Kazuki Computer and Data Science Laboratories NTT Corporation Musashino180-8585 Japan Department of Physics University of Arkansas FayettevilleAR72701 United States College of Liberal Arts and Sciences Tokyo Medical and Dental University Ichikawa272-0827 Japan

We investigate the stimulated emission from superradiant atoms coupled to a waveguide induced by a coherent-state pulse. We provide the dynamical properties of this system and also evaluate the system as a amplifier. ... 详细信息

ISBN: (纸本)9781557528209

关键词： Stimulated emission

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WIT-Greedy: Hardware System Design of Weighted ITerative Greedy Decoder for Surface Code

WIT-Greedy: Hardware System Design of Weighted ITerative Gre...

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Asia and South Pacific Design Automation Conference

作者： Wang Liao Yasunari Suzuki Teruo Tanimoto Yosuke Ueno Yuuki Tokunaga Photon Science Center the University of Tokyo Japan NTT Computer and Data Science Laboratories Japan Faculty of Information Science and Electrical Engineering Kyushu University Japan Graduate School of Information Science and Technology the University of Tokyo Japan

Large error rates of quantum bits (qubits) are one of the main difficulties in the development of quantum computing. Performing quantum error correction (QEC) with surface codes is considered the most promising approach to reduce the error rates of qubits effectively. To perform error correction, we need an error-decoding unit, which estimates errors in the noisy physical qubits repetitively, to create a robust logical qubit. While complicated graph-matching problems must be solved within a strict time restriction for the error decoding, several hardware implementations that satisfy the restriction at a large code distance have been proposed. However, the existing decoder designs are still challenging in reducing the logical error rate. This is because they assume that the error rates of physical qubits are uniform while they have large variations in practice. According to our numerical simulation based on the quantum chip with the largest qubit number, neglecting the non-uniform error properties of a real quantum chip in the decoding process induces significant degradation of the logical error rate and spoils the benefit of QEC. To take the non-uniformity into account, decoders need to solve matching problems on a weighted graph, but they are difficult to solve using the existing designs without exceeding the time limit of decoding. Therefore, a decoder that can treat both the non-uniform physical error rates and the large surface code is strongly demanded. In this paper, we propose a hardware design of decoding units for the surface code that can treat the non-identical error properties with small latency at a large code distance. The key idea of our design is 1) constructing a look-up table for calculating the shortest paths between nodes in a weighted graph and 2) enabling parallel processing during decoding. The implementation results in field programmable gate array (FPGA) indicate that our design scales up to code distance 11 within a microsecond-level delay,

关键词： Codes Error analysis Qubit Hardware Decoding Delays Table lookup

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Pruning Randomly Initialized Neural Networks with Iterative Randomization

arXiv

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arXiv 2021年

作者： Chijiwa, Daiki Yamaguchi, Shinya Ida, Yasutoshi Umakoshi, Kenji Inoue, Tomohiro NTT Computer and Data Science Laboratories NTT Corporation Japan NTT Social Informatics Laboratories NTT Corporation Japan

Pruning the weights of randomly initialized neural networks plays an important role in the context of lottery ticket hypothesis. Ramanujan et al. [26] empirically showed that only pruning the weights can achieve remarkable performance instead of optimizing the weight values. However, to achieve the same level of performance as the weight optimization, the pruning approach requires more parameters in the networks before pruning and thus more memory space. To overcome this parameter inefficiency, we introduce a novel framework to prune randomly initialized neural networks with iteratively randomizing weight values (IteRand). Theoretically, we prove an approximation theorem in our framework, which indicates that the randomizing operations are provably effective to reduce the required number of the parameters. We also empirically demonstrate the parameter efficiency in multiple experiments on CIFAR-10 and ImageNet. The code is available at https://***/dchiji-ntt/iterand. Copyright © 2021, The Authors. All rights reserved.

关键词： Machine learning

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A Proposal to Find Mutually Contributable Business or Life Activities Using Conformance Checking 26

A Proposal to Find Mutually Contributable Business or Life A...

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26th International Conference on Knowledge-Based and Intelligent Information and Engineering Systems, KES 2022

作者： Kaiya, Haruhiko Misawa, Tomoya Ogata, Shinpei Saito, Shinobu Nakagawa, Hiroyuki Takeuchi, Hironori Kanagawa University Hiratsuka259-1293 Japan Shinshu University Nagano380-8553 Japan NTT Computer and Data Science Laboratories Tokyo108-0023 Japan Osaka University Suita565-0871 Japan Musashi University Tokyo176-8534 Japan

We propose a method to comprehensively find a pair of business or life activities, which can mutually contribute to each other. We assume that the activities with synchronized processes can mutually contribute to each other. A process model of an activity is thus compared to a log of another activity for measuring whether the activities can synchronize their processes to a certain extent using a conformance checking technique. The threshold of the extent is defined on the basis of a randomly generated log containing the same events as those in the compared log. We tentatively evaluated the method through a case study, and confirmed that the method seemed to be valid. © 2022 The Authors. Published by Elsevier B.V.

关键词： Conformance checking Cross-organizational process Process mining Sharing process

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Experimental demonstration of a high-fidelity virtual two-qubit gate

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Physical Review Research 2024年第1期6卷 013235-013235页

作者： Akhil Pratap Singh Kosuke Mitarai Yasunari Suzuki Kentaro Heya Yutaka Tabuchi Keisuke Fujii Yasunobu Nakamura Department of Applied Physics Graduate School of Engineering The University of Tokyo Bunkyo-ku Tokyo 113-8656 Japan Graduate School of Engineering Science Osaka University 1-3 Machikaneyama Toyonaka Osaka 560-8531 Japan NTT Computer and Data Science Laboratories NTT Corporation Musashino 180-8585 Japan RIKEN Center for Quantum Computing (RQC) Wako Saitama 351-0198 Japan

We experimentally demonstrate a virtual two-qubit gate and characterize it using quantum process tomography (QPT). The virtual two-qubit gate decomposes an actual two-qubit gate into single-qubit unitary gates and projection gates in quantum circuits for expectation-value estimation. We implement projection gates via midcircuit measurements. The deterministic sampling scheme reduces the number of experimental circuit evaluations required for decomposing a virtual two-qubit gate. We also apply quantum error mitigation to suppress the effect of measurement errors and improve the average gate fidelity of a virtual controlled-Z (CZ) gate to fav=0.9938±0.0002. Our results highlight a practical approach to implement virtual two-qubit gates with high fidelities, which are useful for simulating quantum circuits using fewer qubits and implementing two-qubit gates on a distant pair of qubits.

关键词： Quantum algorithms Quantum algorithms & computation Quantum benchmarking Quantum circuits Quantum computation Quantum gates Quantum nondemolition measurement Quantum simulation

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Q3DE: A Fault-Tolerant Quantum computer Architecture for Multi-Bit Burst Errors by Cosmic Rays 22

Q3DE: A Fault-Tolerant Quantum Computer Architecture for Mul...

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Proceedings of the 55th Annual IEEE/ACM International Symposium on Microarchitecture

作者： Yasunari Suzuki Takanori Sugiyama Tomochika Arai Wang Liao Koji Inoue Teruo Tanimoto NTT Computer and Data Science Laboratories NTT Corporation Musashino Tokyo Japan and JST PRESTO Honcho Kawaguchi Saitama Japan Research Center for Advanced Science and Technology (RCAST) The University of Tokyo Meguro-ku Tokyo Japan NTT Computer and Data Science Laboratories NTT Corporation Musashino Tokyo Japan and School of Science The University of Tokyo Hongo Bunkyo-ku Tokyo Japan Photon Science Center The University of Tokyo Yayoi Bunkyo-ku Tokyo Japan Faculty of Information Science and Electrical Engineering Kyushu University Fukuoka Japan JST PRESTO Honcho Kawaguchi Saitama Japan and Faculty of Information Science and Electrical Engineering Kyushu University Fukuoka Japan

ISBN: (纸本)9781665462723

Demonstrating small error rates by integrating quantum error correction (QEC) into an architecture of quantum computing is the next milestone towards scalable fault-tolerant quantum computing (FTQC). Encoding logical qubits with superconducting qubits and surface codes is considered a promising candidate for FTQC architectures. In this paper, we propose an FTQC architecture, which we call Q3DE, that enhances the tolerance to multi-bit burst errors (MBBEs) by cosmic rays with moderate changes and overhead. There are three core components in Q3DE: in-situ anomaly DEtection, dynamic code DEformation, and optimized error DEcoding. In this architecture, MBBEs are detected only from syndrome values for error correction. The effect of MBBEs is immediately mitigated by dynamically increasing the encoding level of logical qubits and re-estimating probable recovery operation with the rollback of the decoding process. We investigate the performance and overhead of the Q3DE architecture with quantum-error simulators and demonstrate that Q3DE effectively reduces the period of MBBEs by 1000 times and halves the size of their region. Therefore, Q3DE significantly relaxes the requirement of qubit density and qubit chip size to realize FTQC. Our scheme is versatile for mitigating MBBEs, i.e., temporal variations of error properties, on a wide range of physical devices and FTQC architectures since it relies only on the standard features of topological stabilizer codes.

关键词： quantum computing quantum error correction fault-tolerant quantum computing

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Virtual entanglement purification via noisy entanglement

arXiv

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arXiv 2024年

作者： Yamamoto, Kaoru Matsuzaki, Yuichiro Suzuki, Yasunari Tokunaga, Yuuki Endo, Suguru NTT Computer and Data Science Laboratories NTT Corporation Musashino180-8585 Japan Department of Electrical Electronic and Communication Engineering Faculty of Science and Engineering Chuo University 1-13-27 Kasuga Bunkyo-ku Tokyo112-8551 Japan JST PRESTO 4-1-8 Honcho Kawaguchi Saitama332-0012 Japan

Distributed quantum computation (DQC) is a promising approach for scalable quantum computing, where high-fidelity non-local operations among remote devices are required for universal quantum computation. These operations are typically implemented through state and gate teleportation with the consumption of high-fidelity entanglement prepared via entanglement purification. However, noisy local operations and classical communication (LOCC) limit the fidelity of purified entanglement, thereby degrading the quality of non-local operations. Meanwhile, circuit knitting and cutting, which simulate non-local operations by preparing separable states along with LOCC, has been considered for DQC as an alternative. Although this approach needs no entanglement among remote devices, it requires excessive circuit runs. Here, we present a protocol utilizing virtual operations that purifies noisy entanglement at the level of expectation values. Our protocol offers the following advantages over conventional methods: surpasses the fidelity limit of entanglement purification in the presence of noise in LOCC, requires fewer sampling shots than circuit knitting, and exhibits robustness against infidelity fluctuations in shared noisy Bell states, unlike probabilistic error cancellation. Our protocol bridges the gap between the entanglement-based and circuit-knitting DQC methods, offering a flexible approach to achieve further scalability despite hardware limitations. Copyright © 2024, The Authors. All rights reserved.

关键词： Quantum computers

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