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GPU acceleration of subgraph isomorphism search in large scale graph

Journal of Central South University 2015年第6期22卷 2238-2249页

作者：杨博卢凯高颖慧王小平徐凯 Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology College of Computer National University of Defense Technology Department of Electronic Science and Engineering National University of Defense Technology

A novel framework for parallel subgraph isomorphism on GPUs is proposed, named GPUSI, which consists of GPU region exploration and GPU subgraph matching. The GPUSI iteratively enumerates subgraph instances and solves the subgraph isomorphism in a divide-and-conquer fashion. The framework completely relies on the graph traversal, and avoids the explicit join operation. Moreover, in order to improve its performance, a task-queue based method and the virtual-CSR graph structure are used to balance the workload among warps, and warp-centric programming model is used to balance the workload among threads in a warp. The prototype of GPUSI is implemented, and comprehensive experiments of various graph isomorphism operations are carried on diverse large graphs. The experiments clearly demonstrate that GPUSI has good scalability and can achieve speed-up of 1.4–2.6 compared to the state-of-the-art solutions.

关键词： parallel graph isomorphism GPU backtrack paradigm

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Computing Must and May Alias to Detect Null Pointer Dereference

Computing Must and May Alias to Detect Null Pointer Derefere...

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作者： Ma, Xiaodong Wang, Ji Dong, Wei National Laboratory for Parallel and Distributed Processing China

ISBN: (纸本)3540884785

This paper presents a novel algorithm to detect null pointer dereference errors. The algorithm utilizes both of the must and may alias information in a compact way to improve the precision of the detection. Using may alias information obtained by a fast flow- and context- insensitive analysis algorithm, we compute the must alias generated by the assignment statements and the must alias information is also used to improve the precision of the may alias. We can strong update more expressions using the must alias information, which will reduce the false positives of the detection for null pointer dereference. We have implemented our algorithm in the SUIF2 compiler infrastructure and the experiments results are as expected. © Springer-Verlag Berlin Heidelberg 2008.

关键词： Information use

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PartialRC: A Partial Recomputing Method for Efficient Fault Recovery on GPGPUs

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Journal of Computer Science & Technology 2012年第2期27卷 240-255页

作者：徐新海杨学军薛京灵林宇斐林一松 National Laboratory for Parallel and Distributed Processing School of ComputerNational University of Defense Technology Programming Languages and Compilers Group School of Computer Science and Engineering University of New South Wales

GPGPUs are increasingly being used to as performance accelerators for HPC （High Performance Computing） applications in CPU/GPU heterogeneous computing systems, including TianHe-1A, the world＇s fastest supercomputer in the TOP500 list, built at NUDT （national University of Defense Technology） last year. However, despite their performance advantages, GPGPUs do not provide built-in fault-tolerant mechanisms to offer reliability guarantees required by many HPC applications. By analyzing the SIMT （single-instruction, multiple-thread） characteristics of programs running on GPGPUs, we have developed PartialRC, a new checkpoint-based compiler-directed partial recomputing method, for achieving efficient fault recovery by leveraging the phenomenal computing power of GPGPUs. In this paper, we introduce our PartialRC method that recovers from errors detected in a code region by partially re-computing the region, describe a checkpoint-based faulttolerance framework developed on PartialRC, and discuss an implementation on the CUDA platform. Validation using a range of representative CUDA programs on NVIDIA GPGPUs against FullRC （a traditional full-recomputing Checkpoint-Rollback-Restart fault recovery method for CPUs） shows that PartialRC reduces significantly the fault recovery overheads incurred by FullRC, by 73.5% when errors occur earlier during execution and 74.6% when errors occur later on average. In addition, PartialRC also reduces error detection overheads incurred by FullRC during fault recovery while incurring negligible performance overheads when no fault happens.

关键词： GPGPU partial recomputing fault tolerance CUDA checkpointing

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Multi-Owner keyword Search over Shared Data without Secure Channels in the Cloud

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China Communications 2017年第5期14卷 124-133页

作者： Yilun Wu Xicheng Lu Jinshu Su Peixin Chen Xiaofeng Wang Bofeng Zhang College of Computer National University of Defense TechnologyChangsha 410073China National Laboratory for Parallel and Distributed Processing National University of Defense TechnologyCbangsba 410073China

Searchable encryption allows cloud users to outsource the massive encrypted data to the remote cloud and to search over the data without revealing the sensitive information. Many schemes have been proposed to support the keyword search in a public cloud. However,they have some potential limitations. First,most of the existing schemes only consider the scenario with the single data owner. Second,they need secure channels to guarantee the secure transmission of secret keys from the data owner to data users. Third,in some schemes,the data owner should be online to help data users when data users intend to perform the search,which is *** this paper,we propose a novel searchable scheme which supports the multi-owner keyword search without secure channels. More than that,our scheme is a non-interactive solution,in which all the users only need to communicate with the cloud server. Furthermore,the analysis proves that our scheme can guarantee the security even without secure channels. Unlike most existing public key encryption based searchable schemes,we evaluate the performance of our scheme,which shows that our scheme is practical.

关键词： keyword search cloud security secure channels proxy re-encryption

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Prediction of the Cyanobacteria Coverage in Time-series Images based on Convolutional Neural Network 21

Prediction of the Cyanobacteria Coverage in Time-series Imag...

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4th International Conference on Control and Computer Vision, ICCCV 2021

作者： Ye, Xiangyu Lai, Zhiquan Li, Dongsheng National Key Laboratory of Parallel and Distributed Processing Computer College National University of Defense Technology China

ISBN: (纸本)9781450390477

In recent years, the problem of lake eutrophication has become increasingly severe. The monitoring and control of cyanobacteria in lakes are of great significance. The information obtained by existing monitoring methods is relatively lagging, and it is impossible to monitor the sudden outbreak of cyanobacteria in time. Getting cyanobacteria information directly through camera images is a breakthrough. In this paper, after analyzing the characteristics of time series cyanobacteria images, we propose a block prediction scheme based on the CNN model. Experiments show that this method can quickly calculate the coverage of cyanobacteria in the monitoring image in a short time. It can also effectively distinguish cyanobacteria-rich water areas, which significantly facilitates water quality monitoring and cyanobacteria management. We can draw a chart of the changes in the coverage of cyanobacteria by analyzing multi-day time-series images. The chart helps us conduct a short-term water quality analysis to better deal with the outbreak of cyanobacteria. © 2021 ACM.

关键词： Lakes

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An optimized method for automatic test oracle generation from real-time specification

An optimized method for automatic test oracle generation fro...

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10th IEEE International Conference on Engineering of Complex Computer Systems, ICECCS 2005

作者： Wang, Xin Qi, Zhi-Chang Li, Shuhao National Laboratory for Parallel and Distributed Processing Changsha 410073 China

Test oracles are widely used to verify whether a system under test is running as desired. Since the correctness of real-time systems depends on the logical results of the computation and the time when results are produced at the same time, an optimized model checking-based method for test oracles generation is proposed to check if the system traces satisfy their real-time specifications at run time. Inspired by the idea of real-time model checking, the test oracles can be automatically generated from their specifications in the real-time logic MITL[0,d] in a simpler way and modelled by a variant of the Timed Automata. Assertions are chosen to acquire the traces of real-time systems. A case study is presented to demonstrate the usefulness of the method proposed in this paper. © 2005 IEEE.

关键词： Computer software selection and evaluation

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Improve OpenMP performance by extending BARRIER and REDUCTION constructs

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5th International Symposium on High Performance Computing, ISHPC 2003

作者： Chun, Huang Xuejun, Yang National Laboratory for Parallel and Distributed Processing China

ISBN: (纸本)3540203591

Barrier synchronization and reduction are global operations used frequently in large scale OpenMP programs. To improve OpenMP performance, we present two new directives BARRIER(0) and ALLREDUCTION to extend BARRIER and REDUCTION constructs in OpenMP API. The new extensions have been implemented on our portable OpenMP compiler on JIAJIA. Benchmark testing and experiments show that these constructs decrease the system overheads from synchronization, reduction operation and access of reduction variables on SDSM systems significantly. It is predicable that the improvement of performance can be obtained on ccNUMA systems. © Springer-Verlag Berlin Heidelberg 2003.

关键词： Application programming interfaces (API)

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Internet-based virtual computing environment(iVCE):Concepts and architecture

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Science in China(Series F) 2006年第6期49卷 681-701页

作者： LU Xicheng WANG Huaimin WANG Ji National Laboratory for Parallel and Distributed Processing Changsha 410073 China College of Computer National University of Defense Technology Changsha 410073 China

Resources over Internet have such intrinsic characteristics as growth, autonomy and diversity, which have brought many challenges to the efficient sharing and comprehensive utilization of these resources. This paper presents a novel approach for the construction of the Internet-based Virtual Computing Environment （iVCE）, whose sig- nificant mechanisms are on-demand aggregation and autonomic collaboration. The iVCE is built on the open infrastructure of the Internet and provides harmonious, transparent and integrated services for end-users and applications. The concept of iVCE is presented and its architectural framework is described by introducing three core concepts, i.e., autonomic element, virtual commonwealth and virtual executor. Then the connotations, functions and related key technologies of each components of the architecture are deeply analyzed with a case study, iVCE for Memory.

关键词： resource aggregation collaboration virtual computing environment Internet

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HyperSpring: Accurate and stable latency estimation in the hyperbolic space

HyperSpring: Accurate and stable latency estimation in the h...

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15th International Conference on parallel and distributed Systems, ICPADS '09

作者： Fu, Yongquan Wang, Yijie National Key Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology China

ISBN: (纸本)9780769539003

Predicting network latencies between Internet hosts can efficiently support large-scale Internet applications, e.g., file sharing service and the overlay construction. Several study use the Hyperbolic space to model the Internet densecore and many-tendril structure. However, existing Hyperbolic space based embedding approaches are not designed for accurate latency estimation in the distributed context. We present HyperSpring, which estimates latency by modelling a mass spring system in the Hyperbolic similar with Vivaldi. HyperSpring adopts coordinate initialization to speed up the convergence of coordinate computation, uses multiple-round symmetric updates to escape from bad local minima, and stabilizes coordinates by compensating RTT measurements to reduce the coordinate drifts. Evaluation results based on a network trace of 226 PlanetLab nodes indicate that, compared to Euclidean-space based Vivaldi, HyperSpring provides performance improvements for most nodes, and incurs slightly higher distortions for a small number of nodes. © 2009 IEEE.

关键词： Hyperbolic space Latency estimation Mass spring field

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FPQRNA: Hardware-accelerated qrna package for noncoding rna gene detecting on FPGA

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Journal of Bioinformatics and Computational Biology 2010年第4期8卷 743-761页

作者： Xia, Fei Dou, Yong Lei, Guo-Qing National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha 410073 China

Noncoding RNAs (ncRNAs) have important functional roles in biological processes and have become a central research interest in modern molecular biology. However, how to find ncRNA attracts much more attention since ncRNA gene sequences do not have strong statistical signals, unlike protein coding genes. QRNA is a powerful program and has been widely used as an efficient analysis tool to detect ncRNA gene at present. Unfortunately, the O(L ³) computing requirements and complicated data dependency greatly limit the usefulness of QRNA package with the explosion in gene database. In this paper, we present a fine-grained parallel QRNA prototype system, FPQRNA, for accelerating ncRNA gene detection application on FPGA chip. We propose a systolic-like array architecture with multiple PEs (processing Elements). We partition the tasks by columns and assign tasks to PEs for load balance. We exploit data reuse schemes to reduce the need to load matrices from external memory. The experimental results show a speedup factor of more than 18× over the QRNA - 2.0.3c software running on a PC platform with AMD Phenom 9650 Quad CPU for pairwise sequence alignment with 996 residues, however the power consumption of our FPGA accelerator is only about 30% of that of the general-purpose microprocessors. © 2010 Imperial College Press.

关键词： Bioinformatics fine-grained parallelism FPGA hardware accelerator noncoding RNA

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