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Universal enzymatic numerical P systems with small number of enzymatic variables

science China(Information sciences) 2018年第9期61卷 38-49页

作者： Zhiqiang ZHANG Tingfang WU ANDrei P■UN Linqiang PAN Key Laboratory of Image Information Processing and Intelligent Control of Education Ministry of China School of Automation Huazhong University of Science and Technology Department of Computer Science Faculty of Mathematics and Computer ScienceUniversity of Bucharest Bioinformatics Department National Institute of Research and Development for Biological Sciences School of Electric and Information Engineering Zhengzhou University of Light Industry

Numerical P systems(for short, NP systems) are distributed and parallel computing models inspired from the structure of living cells and economics. Enzymatic numerical P systems(for short, ENP systems) are a variant of NP systems, which have been successfully applied in designing and implementing controllers for mobile robots. Since ENP systems were proved to be Turing universal, there has been much work to simplify the universal systems, where the complexity parameters considered are the number of membranes, the degrees of polynomial production functions or the number of variables used in the *** the number of enzymatic variables, which is essential for ENP systems to reach universality, has not been investigated. Here we consider the problem of searching for the smallest number of enzymatic variables needed for universal ENP systems. We prove that for ENP systems as number acceptors working in the all-parallel or one-parallel mode, one enzymatic variable is sufficient to reach universality; while for the one-parallel ENP systems as number generators, two enzymatic variables are sufficient to reach *** results improve the best known results that the numbers of enzymatic variables are 13 and 52 for the all-parallel and one-parallel systems, respectively.

关键词： bio-inspired computing numerical P system mobile robot membrane controller universality

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A distributed 2D-to-3D Video Conversion System

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China Communications 2013年第5期10卷 30-38页

作者：张哲斌张吉安张学西王亦洲高文 Key Laboratory of Intelligent Information Processing Institute of Computing Technology Chinese Academy of Sciences National Engineering Laboratory for Video Technology and Key Laboratory of Machine Perception (Ministry of Education) School of Electronics Engineering and Computer Science Peking University University of Chinese Academy of Sciences

2D-to-3D video conversion is a feasible way to generate 3D programs for the current 3DTV industry. However, for large-scale 3D video production, current systems are no longer adequate in terms of the time and labor required for conversion. In this paper, we introduce a distributed 2D-to-3D video conversion system that includes a 2D-to-3D video conversion module, architecture of the parallel computation on the cloud, and 3D video coding in the system. The system enables cooperation among multiple users in the simultaneous completion of their conversion tasks so that the conversion efficiency is greatly promoted. In the experiments, we evaluate the system based on criteria related to both time consumption and video coding performance.

关键词： 3D video 2D-to-3D conversion distributed system

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科学研究的第五范式——以智能驱动的材料设计为例

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Engineering 2023年第5期24卷 126-137,I0003,I0004页

作者： Can Leng Zhuo Tang Yi-Ge Zhou Zean Tian Wei-Qing Huang Jie Liu Keqin Li Kenli Li Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense TechnologyChangsha 410073China Laboratory of Software Engineering for Complex Systems National University of Defense TechnologyChangsha 410073China National Supercomputing Center in Changsha Changsha 410082China College of Computer Science and Electronic Engineering Hunan UniversityChangsha 410082China Institute of Chemical Biology and Nanomedicine State Key Laboratory of Chemo/Biosensing and ChemometricsCollege of Chemistry and Chemical EngineeringHunan UniversityChangsha 410082China Department of Applied Physics School of Physics and ElectronicsHunan UniversityChangsha 410082China Department of Computer Science State University of New YorkNew PaltzNY 12561USA

科学正在进入一个新时代——第五范式——它被认为是知识整合到不同领域的主要特征,是基于无所不在的机器学习系统的计算社区中智能驱动的工作。在此,我们通过在天河一号超级计算机系统上构建的催化材料专门设计的典型平台案例,生动地... 详细信息

科学正在进入一个新时代——第五范式——它被认为是知识整合到不同领域的主要特征,是基于无所不在的机器学习系统的计算社区中智能驱动的工作。在此,我们通过在天河一号超级计算机系统上构建的催化材料专门设计的典型平台案例,生动地阐明了第五范式的本质,旨在促进第五范式在其他领域的培养。第五范式平台主要包括模型自动构建(原始数据提取)、指纹自动构建(神经网络特征选择)以及跨学科知识串联的重复迭代(“火山图”)。与分解一起进行的是对迭代中实现的体系结构的性能评估。通过讨论,第五范式的智能驱动平台可以极大地简化和改进研究中极其繁琐和具有挑战性的工作,并通过补偿机器学习中缺少样本和替代一些由于计算资源不足而导致的数值计算来实现数值计算与机器学习之间的相互反馈,从而加速探索过程。在数据驱动的学科中,跨学科专家的协同作用和对动态数据需求的急剧增长仍然是一个挑战。我们相信,对第五范式平台的一瞥可以为其在其他领域的应用铺平道路。

关键词：机器学习自动构建天河一号数据驱动神经网络动态数据知识整合科学研究

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Quantization improvements for LU Decomposition to Solve Linear Equations *

Quantization improvements for LU Decomposition to Solve Line...

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IEEE International Conference on Big Data and Cloud Computing (BdCloud)

作者： Lin Chen Kang He Hao Jiang Roberto Barrio Jie Liu Tiejun Li Science and Technology on Parallel and Distributed Processing Laboratory Laboratory of Software Engineering for Complex Systems National University of Defense Technology Changsha China College of Computer Science and Technology National University of Defense Technology Changsha China University of Zaragoza Zaragoza Spain

Quantization is an effective method for compressing Deep Neural Networks. Now, it is considered to accelerate the traditional HPC applications. In this article, we present a quantization method (q8gemm) using integer 8-bits(INT8) for matrix multiplication, which is implemented by block techniques to overcome the overflow problem. We choose different scales for one matrix’s each row and those for the other matrix’s each column to keep the numbers in range. With the intel advanced matrix extension cblas_gemm_s8u8s32, our q8gemm can accelerate panel-matrix multiplication in LU factorization. Furthermore, we propose a new mixed-precision solver (q8gesv 1 ) for the linear equations. Using q8gemm in INT8, q8gesv modifies LU factorization in FP32 and then utilizes GMRES iterative refinement in FP64 to bring the solution back to 64 bits accuracy. Numerical tests show that on two Intel CPU platforms with avx2 and avx512, q8gemm achieves a speedup of 1.313-1.621 over cblas_sgemm of MKL. The execution time of cblas_gemm_s8u8s32 makes up 86.78%-90.85% of the q8gemm. By means of q8gemm, our q8gesv can achieve a speedup of 1.176-1.493 over the optimized Higham’s mixed-precision algorithm utilized in the HPL-AI benchmark and a speedup of 1.1-1.459 over the LAPACKE_dsgesv function from MKL LAPACK. Meanwhile, q8gesv runs up to 2.859X faster on Intel(R) Core(TM) i5-10600KF and to 2.224X faster on Intel(R) Xeon(R) Gold 6130 than the LAPACKE_dgesv function from MKL LAPACK.

关键词： Deep learning Gold Quantization (signal) Benchmark testing

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An Effective Design to Improve the Efficiency of DPUs on FPGA

An Effective Design to Improve the Efficiency of DPUs on FPG...

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International Conference on parallel and distributed Systems (ICPADS)

作者： Yutian Lei Qingyong Deng Saiqin Long Shaohui Liu Sangyoon Oh The Key Laboratory of Hunan Province for Internet of Things and Information Security The School of Computer Science Science and Technology on Parallel and Distributed Processing Laboratory Xiangtan University Xiangtan China The Artificial Intelligence Center PengCheng Laboratory shenzhen China Ajou University Suwon-si Republic of Korea

The following topics are dealt with: cloud computing; learning (artificial intelligence); resource allocation; security of data; mobile computing; neural nets; optimisation; parallel processing; scheduling; and storag... 详细信息

ISBN: (数字)9781728190747

ISBN: (纸本)9781728183824

关键词： Deep learning Schedules Multicore processing Logic gates Throughput Acceleration Field programmable gate arrays

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Automatic generation and assessment of student assignments for parallel programming learning 10th

Automatic generation and assessment of student assignments f...

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10th International Symposium on parallel Architectures, Algorithms and Programming, PAAP 2019

作者： Luo, Zhenxiao Wang, Zelong Wu, Di Hei, Xiaojun Du, Yunfei School of Data and Computer Science Sun Yat-sen University Guangzhou China Guangdong Key Laboratory of Big Data Analysis and Processing Guangzhou510006 China School of Electronic Information and Communications Huazhong University of Science and Technology Wuhan China National Supercomputer Center in Guangzhou Guangzhou China

The course of parallel programming is becoming more and more important for the education of students majoring in computer science. However, it is not easy to learn parallel programming well due to its high theory and practice requirements. In this paper, we design and implement an automatic assignment generation and assessment system to help students learn parallel programming. The assignments can be generated according to user behaviors and thus able to guide students to learn parallel programming step by step. Besides, it can automatically generate an overall assessment of student assignments by using fuzzy string matching, which provides an approximate reference score of objective questions. Subjective questions can be assessed directly by comparing the answer to the reference answer. This system also provides a friendly user interface for students to complete online assignments and let teachers manage their question database. In our teaching practice, students can learn parallel programming more effectively with the help of such an assignment generation and assessment system. © Springer Nature Singapore Pte Ltd. 2020.

关键词： parallel programming

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A multi-layered emulation platform to verify the effectiveness of consistency control approaches about message ordering

A multi-layered emulation platform to verify the effectivene...

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International Conference on Communication Software and Networks, ICCSN

作者： Hangjun Zhou Sha Fu Key Laboratory of Science and Technology for National Defence of Parallel and Distributed P rocessing School of Computer Science National University of Defense Technology Changsha Hunan China Department of Information Management Hunan University of Finance and Economics Changsha Hunan China

It is an important issue to preserve the consistent delivering order of messages at each site in distributed Virtual Environments(DVEs). Currently, the violations of message delivery order are inclined to happen in the large-scale and frequently interactive DVEs running on Wide Area Network(WAN). The inconsistent anomalies are characterized as unpredictable, unrepeatable and uncontrollable, which results in the severe problem for the development of the consistency control approaches. Meanwhile, it is also highly expensive to directly verify the proposed approaches on WAN. Therefore, in this paper, we design and establish an original multi-layered emulation platform in LAN, which can emulate the network latency of WAN and repeat the scenarios of violations. On the platform, the designers of consistency approaches don't have to spend efforts to realize the fundamental functions of the verification, but could pay more attention to the development and optimization of the control algorithms, which is very beneficial for the improvement of message ordering approaches.

关键词： Switches Wide area networks

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RB2: Narrow the Gap between RDMA Abstraction and Performance via a Middle Layer

RB2: Narrow the Gap between RDMA Abstraction and Performance...

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IEEE Annual Joint Conference: INFOCOM, IEEE computer and Communications Societies

作者： Haifeng Sun Yixuan Tan Yongtong Wu Jiaqi Zhu Qun Huang Xin Yao Gong Zhang National Key Laboratory for Multimedia Information Processing School of Computer Science Peking University Huawei Theory Department

ISBN: (数字)9798350383508

ISBN: (纸本)9798350383515

Although the native RDMA interface allows for high throughput and low latency, its low-level abstraction raises significant programming challenges. Consequently, numerous systems encapsulate the RDMA interface into more user-friendly high-level abstractions such as Socket, MPI, and RPC. However, this ease of development often incurs considerable performance degradation. To address this trade-off, this paper introduces RB 2 , a high-performance RDMA-based distributed Ring Buffer (DRB). RB 2 serves as a middle layer that effectively conceals the low-level details of the RDMA interface while also facilitating extension to other high-level ***, it is non-trivial for DRBs to preserve the RDMA performance. We optimize the performance of RB 2 in three aspects. First, we perform micro-benchmarks to identify the pointer synchronization methods that are seemingly counter-intuitive but offer optimal performance improvements. Second, we propose an adaptive batching mechanism to alleviate the limitations of conventional fixed batching. Finally, we build an efficient memory subsystem using various optimization techniques. RB 2 outperforms SOTA designs by achieving 2.5 × to 7.5 × throughput while maintaining comparable tail latency for small messages.

关键词： Encapsulation Sockets Memory management Tail Programming Throughput Space exploration

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Density-Attentive Head Detector for Crowd Counting

Density-Attentive Head Detector for Crowd Counting

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International Conference on Data science and Business Analytics (ICDSBA)

作者： Ziyu Zhao Xingyu Shen Long Lan Xiaoyao Yin Xiang Zhang Yonggang Che Zhigang Luo College of Computer National University of Defense Technology Changsha China Institute for Quantum Information & State Key Laboratory of High Performance Computing National University of Defense Technology Changsha China Science and Technology on Parallel and Distributed Processing National University of Defense Technology Changsha China

ISBN: (数字)9781728146447

ISBN: (纸本)9781728146454

In crowd counting, regression-based method shows better performance in extreme density scenes by introduces a density map. However, the regression-based method fails to locate the positions of each head, which significantly restricts its applications. Detection-based method counts each head with their accurate locations but works only in middle or low-level density scenes. In this paper, a joint learning method, named Density-attentive Head Detector (DAHD) is developed to overcome their respective shortcomings via a multi-task training procedure. Specifically, to guarantee the sensitivity of the detector to small or partially occluded heads, we carefully equip the detector with a density map which learned from regression module. Moreover, a novel Dilated Feature Pyramid Network (DFPN) is introduced to our method to enlarge the receptive field of convolutional kernel, bringing confirmative additional benefits to identify small heads. Experiments on the popular ShanghaiTech and Mall datasets confirm the improved performance of DAHD compared with the current detection-based approaches, and a comparable performance to regression-based approaches in term of counting.

关键词： Detectors Feature extraction Object detection Faces Kernel Training Task analysis

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Eunomia: Scaling Concurrent Search Trees under Contention Using HTM

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ACM SIGPLAN Notices 2017年第8期52卷 385-399页

作者： Wang, Xin Zhang, Weihua Wang, Zhaoguo Wei, Ziyun Chen, Haibo Zhao, Wenyun Software School Fudan University China Shanghai Key Laboratory of Data Science Fudan University School of Computer Science Fudan University China Institute of Parallel and Distributed Systems Shanghai Jiao Tong University China Computer Science Department New York University United States

While hardware transactional memory (HTM) has recently been adopted to construct efficient concurrent search tree structures, such designs fail to deliver scalable performance under contention. In this paper, we first conduct a detailed analysis on an HTM-based concurrent B+Tree, which uncovers several reasons for excessive HTM aborts induced by both false and true conflicts under contention. Based on the analysis, we advocate Eunomia, a design pattern for search trees which contains several principles to reduce HTM aborts, including splitting HTM regions with version-based concurrency control to reduce HTM working sets, partitioned data layout to reduce false conflicts, proactively detecting and avoiding true conflicts, and adaptive concurrency control. To validate their effectiveness, we apply such designs to construct a scalable concurrent B+Tree using HTM. Evaluation using key-value store benchmarks on a 20-core HTM-capable multi-core machine shows that Eunomia leads to 5X-11X speedup under high contention, while incurring small overhead under low contention. © 2017 ACM.

关键词： Concurrency control

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