检索结果-内蒙古大学图书馆

4th Annual International Conference on Wireless Internet, WICON 2008

作者： Lv, Shaohe Wang, Xiaodong Zhou, Xingming National Laboratory of Parallel and Distributed Processing National University of Defense Technology ChangSha Hunan410073 China

Rate Adaptation (RA) is a mechanism to choose transmission rate based on the dynamic channel quality in wireless networks. The adaptation algorithm run solely at the sender side in 802.11 networks is studied. The key insight is the inference discrepancy in inferring the relative order of the expected performance of candidate rate, which argues that one can not always reach the correct order based on the channel state information collected exclusively by the sender itself. The consequence is wrong rate decision and significant performance loss. Therefore, a new RA structure is proposed to mitigate such effect by a novel component, rate testing. By embracing the active measurement, a lightweight and effective testing mechanism SFB, short frame burst, is proposed to detect and filter out the unsuitable transmission rate. Finally, an active measurement-based rate adaptation mechanism (AMRA) is designed and implemented. The experiments show that AMRA outperforms many other well-known RA solutions in most scenarios. Copyright © 2008 ICST.

关键词： Channel state information

来源：评论

学校读者我要写书评

暂无评论

Global EDF-based online, energy-efficient real-time scheduling in multi-core platform

Global EDF-based online, energy-efficient real-time scheduli...

引用

IEEE International Conference on Computer Science and Automation Engineering

作者： Zhang, Dongsong Chen, Fangyuan Jin, Shiyao National Laboratory of Parallel and Distributed Processing College of Computer National University of Defense Technology Changsha China

ISBN: (纸本)9781424487257

As the energy consumption becomes increasingly prominent, how to meet time constraints while reducing the energy consumption as much as possible is a fundamental problem of the real-time scheduling in multi-core systems. Most of the existing energy-efficient scheduling approaches make assumptions on the properties of the scheduled tasks. In general, the properties of a task are unknown in advance until the task arrives. Thus, these approaches for deterministic tasks are not suitable to the general tasks. To schedule general tasks without prior knowledge of their properties, we propose an online and energy-efficient scheduling algorithm, based on Global Earliest Deadline First, for hard real-time tasks in multi-core processor platform. We propose a novel approach to decrease the execution frequency of tasks, and achieve a reasonable compromise between the time constraint and saved energy. This is ensured by utilizing the slack time of tasks and the dynamic voltage/frequency scaling techniques. The evaluation results show that our algorithm is well applied to the two types of dynamic voltage/frequency scaling techniques, and out-performs the Global EDF algorithm in terms of the saved energy. Specifically, our algorithm improves the saved energy of the Global EDF algorithm by at most 10% to 15% under real discrete dynamic voltage/frequency scaling levels. © 2011 IEEE.

关键词： Real time systems

来源：评论

学校读者我要写书评

暂无评论

Evaluating the performance and accuracy impact of trace generation to the bigsim emulator

Evaluating the performance and accuracy impact of trace gene...

引用

10th IEEE International Conference on Computer and Information Technology, CIT-2010, 7th IEEE International Conference on Embedded Software and Systems, ICESS-2010, 10th IEEE Int. Conf. Scalable Computing and Communications, ScalCom-2010

作者： Che, Yonggang Xu, Chuanfu Lu, Pingjing National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

ISBN: (纸本)9780769541082

This paper quantitatively studies the trace effects to the performance and accuracy of the BigSim Emulator, a scalable parallel emulator for large-scale computers. To assess the accuracy effect we modify the emulator code to collect the predicted computation time. Four MPI programs with different computation to communication ratios are used as benchmarks. The emulation time and the predicted computation time, both when trace generation are enabled and disabled, are collected on two parallel host machines. The results show that although the BigSim Emulator only traces communication events and dependencies, trace generation still evidently degrades the emulation performance for programs with high communication to computation ratios. Trace generation also significantly affects the accuracy of the predicted computation time for communication intensive programs, which is an issue that can not be overlooked. © 2010 IEEE.

关键词： BigSim emulator MPI programs digital simulation emulator code large scale computers message passing parallel host machines parallel programming performance evaluation scalable parallel emulator trace generation accuracy impact

来源：评论

学校读者我要写书评

暂无评论

Feature preserving consolidation for unorganized point clouds

Feature preserving consolidation for unorganized point cloud...

引用

IEEE International Conference on Progress in Informatics and Computing (PIC)

作者： Li, Bao Jiang, Wei Cheng, Zhiquan Dang, Gang Jin, Shiyao National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

ISBN: (纸本)9781424467860

We introduce a novel method for the consolidation of unorganized point clouds with noise, outliers, non-uniformities as well as sharp features. This method is feature preserving, in the sense that given an initial estimation of normal, it is able to recover the sharp features contained in the original geometric data which are usually contaminated during the acquisition. The key ingredient of our approach is a weighting term from normal space as an effective complement to the recently proposed consolidation techniques. Moreover, a normal mollification step is employed during the consolidation to get normal information respecting sharp features besides the position of each point. Experiments on both synthetic and real-world scanned models validate the ability of our approach in producing denoised, evenly distributed and feature preserving point clouds, which are preferred by most surface reconstruction methods. ©2010 IEEE.

关键词： Consolidation Feature preserving Point clouds Sharp features

来源：评论

学校读者我要写书评

暂无评论

A two-phase mapping method for parallel applications simulation

A two-phase mapping method for parallel applications simulat...

引用

2009 International Conference on Computational Intelligence and Software Engineering, CiSE 2009

作者： Fang, Jianbin Xu, Chuanfu Che, Yonggang Weng, Yufen Wang, Zhenghua National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

ISBN: (纸本)9781424445073

Efficient mapping of logical processes to physical processes is one of key technologies to accelerate parallel performance simulation. Aiming at minimizing the communications between SMP nodes and between host physical processes, this paper presents a novel method named TPsmp-LP3M. It automatically extracts communication pattern of logical processes from trace and then generates a two-phase mapping from logical processes to SMP clusters. Experimental results show that TPsmp-LP3M can outperform the regular mapping method by up to 20.2%. ©2009 IEEE.

关键词： Mapping

来源：评论

学校读者我要写书评

暂无评论

Workload-awared HPC system scalability analysis based on electronic technology developing

Workload-awared HPC system scalability analysis based on ele...

引用

2012 International Conference on Mechanical and Electronic Engineering, ICMEE 2012

作者： Lin, Yufei Tang, Yuhua Zhang, Xin National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

ISBN: (纸本)9783642315152

As the electronic technology develops, the integration levels of CPUs and memories keep growing, and the speeds of communication devices are improved. The high-performance computing (HPC) systems consist of processing nodes and communication network, and their sizes are advanced by the development of electronic technology. Then the scalability of a large-scale parallel computing system, i.e. whether the computing performance is increased with the system size, becomes a major goal pursued by designers of parallel algorithms and high-performance parallel machines. parallel speedup is a popular way to measure the scalability. This paper proposes the definition of HPC system scalability based on speedup first, and then analyzes the influence of function G(P), which describes how the workload changes with processor number, on the system scalability. Through case studies, we analyze some typical programs based on our scalability theorems and the results show that our analysis approach is correct. © 2012 Springer-Verlag Berlin Heidelberg.

关键词： Scalability

来源：评论

学校读者我要写书评

暂无评论

Survey of DHT topology construction techniques in virtual computing environments

引用

Science China(Information Sciences) 2011年第11期54卷 2221-2235页

作者： ZHANG YiMing 1,2,LU XiCheng 1,2 & LI DongSheng 1,21 national laboratory for parallel and distributed processing (PDL),Changsha 410073,China 2 School of Computer,national University of Defense Technology,Changsha 410073,China 1. National Laboratory for Parallel and Distributed Processing (PDL) Changsha 410073 China2. School of Computer National University of Defense Technology Changsha 410073 China

The Internet-based virtual computing environment (iVCE) is a novel network computing *** characteristics of growth,autonomy,and diversity of Internet resources present great challenges to resource sharing in *** DHT overlay (DHT for short) technique has various advantages such as high scalability,low latency,and desirable availability,and is thus an important approach to realizing efficient resource *** construction is a key technique for structured overlays that realizes basic overlay functions including dynamic maintenance and message *** this paper,we first introduce the traditional techniques of DHT topology construction,focusing mainly on dynamic maintenance and message routing of typical DHTs,DHT indexing techniques for complex queries,and DHT grouping techniques for matching domain *** then present recent advances in DHT topology construction techniques in iVCE taking advantage of the characteristics of Internet ***,we discuss the future of DHT topology construction techniques.

关键词： virtual computing environments DHT overlays topology construction distributed indexing flexible routing

来源：评论

学校读者我要写书评

暂无评论

Link scheduling in wireless networks with successive interference cancellation

Link scheduling in wireless networks with successive interfe...

引用

International Conference on Mobile Ad-hoc and Sensor Networks

作者： Lv, Shaohe Wang, Xiaodong Zhou, Xingming National Laboratory of Parallel and Distributed Processing National University of Defense Technology Changsha Hunan 410073 China

ISBN: (纸本)9780769543154

Successive interference cancellation (SIC) is an effective technique of multipacket reception to combat interference. As not all collision are resolvable, careful transmission coordination is required. We study link scheduling in wireless networks with SIC at the physical layer. A new model, simultaneity graph (SG), is proposed to characterize the link correlation introduced by SIC. Then two new scheduling schemes are presented: 1) a slotoriented scheme which assigns a maximal feasible link set to a time slot and 2) a link-oriented scheme which assigns each link a sufficient number of slots. The performance is evaluated by simulations and the results demonstrate that the throughput gain is on average 50% and up to 110% over IEEE 802.11. The complexity of SG is only a bit higher than that of the available widely-used models (e.g., conflict graph). © 2010 IEEE.

关键词： Wireless networks

来源：评论

学校读者我要写书评

暂无评论

Representation learning on textual network with personalized Page Rank

引用

Science China(Information Sciences) 2021年第11期64卷 95-104页

作者： Teng LI Yong DOU National Laboratory for Parallel and Distributed Processing National University of Defense Technology

Representation learning on textual network or textual network embedding, which leverages rich textual information associated with the network structure to learn low-dimensional embedding of vertices, has been useful in a variety of tasks. However, most approaches learn textual network embedding by using direct neighbors. In this paper, we employ a powerful and spatially localized operation: personalized Page Rank(PPR) to eliminate the restriction of using only the direct connection relationship. Also, we analyze the relationship between PPR and spectral-domain theory, which provides insight into the empirical performance boost. From the experiment, we discovered that the proposed method provides a great improvement in linkprediction tasks, when compared to existing methods, achieving a new state-of-the-art on several real-world benchmark datasets.

关键词： representation learning network embedding PageRank textual network personalized PageRank

来源：评论

学校读者我要写书评

暂无评论

Implementing Sparse Matrix-Vector multiplication using CUDA based on a hybrid sparse matrix format

Implementing Sparse Matrix-Vector multiplication using CUDA ...

引用

2010 International Conference on Computer Application and System Modeling, ICCASM 2010

作者： Cao, Wei Lu, Yao Li, Zongzhe Wang, Yongxian Wang, Zhenghua National Key Lab. for Parallel and Distributed Processing National University of Defense Technology Changsha China

ISBN: (纸本)9781424472369

The Sparse Matrix-Vector product (SpMV) is a key operation in engineering and scientific computing. Methods for efficiently implementing it in parallel are critical to the performance of many applications. Modern Graphics processing Units (GPUs) coupled with the advent of general purpose programming environments like NVIDIA's CUDA, have gained interest as a viable architecture for data-parallel general purpose computations. Currently, SpMV implementations using CUDA based on common sparse matrix format have already appeared. Among them, the performance of implementation based on ELLPACK-R format is the best. However, in this implementation, when the maximum number of nonzeros per row does substantially differ from the average, thread is suffering from load imbalance. This paper proposes a new matrix storage format called ELLPACK-RP, which combines ELLPACK-R format with JAD format, and implements the SpMV using CUDA based on it. The result proves that it can decrease the load imbalance and improve the SpMV performance efficiently. © 2010 IEEE.

关键词： Graphics processing unit

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：