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International Joint Conference on Neural Networks

作者： Teng Li Yong Dou Jingfei Jiang Yueqing Wang Qi Lv National Laboratory for Parallel & Distributed Processing National University of Defense and Technology Changsha China

ISBN: (纸本)9781479919611

A deep belief network (DBN) is an important branch of deep learning models and has been successfully applied in many machine learning and pattern recognition fields such as computer vision and speech recognition. However, the training of billions of parameters in DBN is computationally challenging for modern central processing units (CPUs). Many studies have reported the efficient implementations of the pre-training process of DBNs for graphics processing units (GPUs), but few studies have mentioned the fine-tuning process of DBNs. In this paper, we describe an efficient DBN implementation on the GPU, including the pre-training and fine-tuning processes. Experimental results show that our proposed method on the GPU (NVIDIA Tesla K40c) achieves up to 22 speedups on the pre-training process and 33 speedups on the fine-tuning processes compared with conventional CPU (Intel Core i7-4790K) implementations. Moreover, the performance of our algorithm is superior to that of the OpenBLAS library on the CPU and the CUBLAS library on the GPU.

关键词： DBN CPUs GPU

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Area-efficient high-throughput sorted QR decomposition-based MIMO detector on FPGA

Area-efficient high-throughput sorted QR decomposition-based...

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International Conference on Computer and Communications (ICCC)

作者： Tong Zhou Song Guo Yuanwu Lei Yong Dou National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha China

This paper aimed to improve MIMO detector's performance in both throughput and cost. Thus, it presents a FPGA architecture implementation for the SQRD detection in a 4 × 4 16-QAM MIMO wireless communication systems. The exploitation of fine-grained parallelism and coarse-grained parallelism strategies are responsible for bettering the performance of the implementation. Besides, this paper proposes a method to ensure the correctness of the implementation of time-sharing modules, which is general and applicable to any MIMO detector implementation. The work results in a real-time FPGA-based implementation delivering 32 MSQRD/s with 5.2 us latency and lowering more than 50\% cost in hardware resources on a Xilinx Virtex6.

关键词： parallel processing MIMO Hardware Throughput Detectors Matrix decomposition Computer architecture

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DIPP——An LLC Replacement Policy for On-chip Dynamic Heterogeneous Multi-core Architecture

DIPP——An LLC Replacement Policy for On-chip Dynamic Hetero...

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International Conference of Young Computer Scientists, Engineers and Educators, ICYCSEE 2015

作者： Zhang Yang Xing Zuocheng Ma Xiao Science and technology on Parallel and distributed processing laboratory National University of Defense Technology

As the big data era is coming,it brings new challenges to the massive data processing.A combination of GPU and CPU on chip is the trend to release the pressure of large scale *** found that there are different memory access characteristics between GPU and *** most important one is that the programs of GPU include a large number of threads,which lead to higher access frequency in cache than the CPU *** the LRU policy favors the programs with high memory access frequency,the programs of GPU can't get the corresponding performance boost even more cache resources are *** LRU policy is not suitable for heterogeneous multi-core *** on the different characteristics of GPU and CPU programs on memory access,this paper proposes an LLC dynamic replacement policy--DIPP(Dynamic Insertion/Promotion Policy) for heterogeneous multi-core *** core idea of the replacement policy is to reduce the miss rate of the program and enhance the overall system performance by limiting the cache resources that GPU can acquire and reducing the thread interferences between *** compare the DIPP replacement policy with LRU and we conduct a classified discussion according to the program results of *** programs enhance 23.29% on the average performance(using arithmetic mean).Large working sets programs can improve 13.95%,compute-intensive programs enhance 9.66% and stream class programs improve 3.8%.

关键词： Big data Heterogeneous Multicore Replacement Policy DIPP

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SASLL: A System Annotating Semantic Label of Location

SASLL: A System Annotating Semantic Label of Location

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Symposia and Workshops on Ubiquitous, Autonomic and Trusted Computing, UIC-ATC

作者： Ruosong Yang Dianxi Shi Han Li Xiaoyun Mo School of Computer Science National Laboratory for Parallel and Distributed Processing Changsha Hunan

ISBN: (纸本)9781467372121

Nowadays GPS embedded in mobile device such as smartphones can easily identify people's physical locations. However, in daily life people are more concerned about semantic locations (such as dormitories, laboratories, shopping malls, etc.). Usually GPS positioning uses continuous sampling method, which results in a lot of semantically independent sample points. We call these points outliers. How to remove outliers from GPS data and thereby cluster meaningful semantic places is a research challenge in current field of pervasive computing. Aiming at the characteristics of this problem, we first propose a novel approach to add semantic annotations to newly discovered places every day. We use an unsupervised method to discover semantic places, which ensures accuracy of the results and reduces the amount of calculation. Secondly, we discuss the concept of outliers in GPS data collected in daily life, and then eliminate outliers using a density-based method. Moreover, we perform experiments to validate its effectiveness. Thirdly by taking advantage of rule-based inference and reverse geocoding we proposed an approach to calculate the probable semantic labels, which can help user annotate places and reduce the burden on users. Finally, we develop a local System Annotating Semantic Label of Location(SASLL) and by carrying out experiments we demonstrate the validity of our research.

关键词： Semantics Global Positioning System Clustering algorithms Smart phones Roads IEEE 802.11 Standard

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Cooperative monitoring BGP among autonomous systems

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Security and Communication Networks 2015年第10期8卷 1943-1957页

作者： Hu, Ning Wang, BaoSheng Liu, Xin National Key Laboratory for Parallel and Distributed Processing College of Computer National University of Defense Technology Changsha Hunan China

As the de facto Internet inter-domain routing protocol, BGP protocol has a number of vulnerabilities and weakness. Monitoring BGP is an effective way to improve the security of inter-domain routing. This paper presents a cooperative BGP monitoring method, which is called cooperative information sharing model (CoISM). CoISM is based on self-organization and can be used to solve some problems during BGP monitoring, such as route validation and bogus route notification delivery. CoISM provides autonomous systems with a more comprehensive information view by introducing information diffuse reflection based on initiative inquiry and making use of the relativity of monitoring information. CoISM optimizes the information transmission by leveraging the data locality caused by BGP policy and implements ISP coordination with low communication and deployment cost. More specifically, CoISM provides a self-organizing and incentive mechanism, which drives autonomous systems to coordinate independently and shares information on-demand. CoISM supports incremental deployment and can also be applied to a wide range of inter-domain cooperative management applications such as inter-domain routing failure analysis and intrusion detection. © 2014 John Wiley & Sons, Ltd.

关键词： Monitoring

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User Emotion Recognition Based on Multi-class Sensors of Smartphone

User Emotion Recognition Based on Multi-class Sensors of Sma...

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IEEE International Conference on Smart City/SocialCom/SustainCom (SmartCity)

作者： Dianxi Shi Xi Chen Jing Wei Ruosong Yang National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha Hunan China

In this paper, we study about the problem of how to recognize the user emotion based on smartphone data more really. With single data used in the previous studies, it cannot make a comprehensive response of user behavior patterns. So we collected fine-grained sensing data which could reflect user daily behavior fully from multiple dimensions based on smartphone, and then used multidimensional data feature fusion method and six classification methods such as Support Vector Machine (SVM) and Random Forests. Finally, we carried out contrast experiment with twelve volunteers' hybrid data and personal data respectively to recognized user emotion based on discrete emotion model and circumplex emotion model. The results show that the multidimensional data feature fusion method we mentioned which could reflect user behavior comprehensively present high accuracy. The initial use of the hybrid data train only have 72.73% accuracy rate, but after personal data training the accuracy rate can reach 79.78%. In the experimental of different emotion model, circumplex emotion model is better than discrete emotion model.

关键词： Emotion recognition Sensors Mobile handsets Data collection Feature extraction Support vector machines Physiology

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Partial Clones for Stragglers in MapReduce

Partial Clones for Stragglers in MapReduce

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International Conference of Young Computer Scientists, Engineers and Educators, ICYCSEE 2015

作者： Jia Li Changjian Wang Dongsheng Li Zhen Huang National Laboratory for Parallel and Distributed Processing School of Computer ScienceNational University of Defense Technology

Stragglers can temporize jobs and reduce cluster efficiency *** researches have been contributed to the solution,such as Blacklist[8],speculative execution[1,6],Dolly[8].In this paper,we put forward a new approach for mitigating stragglers in Map Reduce,name *** starts task clones only for high-risk delaying *** experiments have been carried and results show that it can decrease the job delaying risk with fewer resources *** small jobs,Hummer also improves job completion time by 48% and 10% compared to LATE and Dolly.

关键词： MapReduce mitigating stragglers task clones

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Accelerating FDTD simulation of microwave pulse coupling into narrow slots on the Intel MIC architecture

Accelerating FDTD simulation of microwave pulse coupling int...

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IEEE Pacific Rim Conference on Communications, Computers and Signal processing, PACRIM 2015

作者： Wang, Qinglin Liu, Jie Cui, Xiantao Fu, Guitao Gong, Chunye Xing, Zuocheng Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha410073 China School of Computer Science National University of Defense Technology Changsha410073 China Beijing Satellite Navigation Center Beijing100094 China

ISBN: (纸本)9781467377881

The coupling of microwaves into apertures plays an important part in many electromagnetic physics and engineering fields. When the width of apertures is very small, Finite Difference Time Domain (FDTD) simulation of the coupling is very time-consuming. As a many-core architecture, the Intel's Many Integrated Core (MIC) architecture owns 512-bit vector units and more than 200 threads. In this paper, we parallelize FDTD simulation of microwave pulse coupling into narrow slots on the Intel MIC architecture. In the implementation, the parallel programming model OpenMP is used to exploit thread parallelism while loop unrolling and SIMD intrinsic functions are utilized to accomplish vectorization. Compared with the serial version on Intel Xeon E5-2670 CPU, the implementation on the MIC coprocessor including 57 cores obtains a speedup of 11.57 times. The experiment results also demonstrate that the parallelization has good scalability in performance. Additionally, how binding relationship between OpenMP threads and hardware threads in MIC influences performance is also reported. © 2015 IEEE.

关键词： Scalability

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Chameleon: Adaptive energy-efficient heterogeneous network-on-chip

Chameleon: Adaptive energy-efficient heterogeneous network-o...

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IEEE International Conference on Computer Design: VLSI in Computers and Processors, (ICCD)

作者： Ji Wu Dezun Dong Xiangke Liao Li Wang National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

Multi-NoC (multiple network-on-chip) has demonstrated its advantages in power gating for reducing leakage power. This work presents Chameleon, a novel heterogeneous Multi-NoC design. Chameleon employs a fine-grained power gating algorithm which exploits power saving opportunities at different levels of granularity simultaneously. Integrated with a performance-aware traffic allocation policy, Chameleon is able to achieve both high power efficiency and good performance at varying network utilization. Our experimental results show that Chameleon delivers an average of 3.39% higher performance than Catnap, the best in the literature. More importantly, Chameleon consumes an average of 17.16% less power than Catnap.

关键词： Resource management Routing Algorithm design and analysis Optimization Logic gates Computers Power demand

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Accelerating Monte Carlo Simulation of Neutron Transport on the Intel MIC Architecture

Accelerating Monte Carlo Simulation of Neutron Transport on ...

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International Conference on Information Science and Control Engineering (ICISCE)

作者： Xiantao Cui Jie Liu Lihua Chi Qinglin Wang Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China

ISBN: (纸本)9781467368513

Simulation of particle transport is critical for a great many of scientific and engineering domains. The Monte Carlo (MC) method is one of the most important numerical methods for the simulation of particle transport, and can simulate many complex types of particle transport. But the computation requirement of the MC simulation is very large. In 2010, Intel announced the Intel Many Integrated Core (MIC) architecture, which consists of many simple general-purpose cores and supports the well-known shared-memory execution model that is the base of most nodes in HPC machines. On account of the independence of simulation of each particle in the MC method, it is well-suited to accelerate the MC simulation on MIC. In this paper, an algorithm named MCNP-MIC based MIC is presented for MC simulation of neutron transport in the context of deep penetration problem, which includes the development of parallel random generator, the assignment of particle number based thread number and the design of high efficiency data structures for parallelism. Eventually, we get the results as follows: with the same problem scale and computational accuracy, the MCNPMIC algorithm has achieved roughly 5.6-fold speedup running on a 57-core MIC chip in comparison with the serial MCNP algorithm on an Intel Xeon E5-2670 CPU.

关键词： Microwave integrated circuits Neutrons Algorithm design and analysis Monte Carlo methods Data structures Graphics processing units

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