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International Conference on (ICEPT) Electronic Packaging Technology

作者： Yang Li Yujie Cheng Shanwen Hu Binbin Xu Lu Liu Zhikuang Cai The College of Integrated Circuit Science and Engineering National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing University of Posts and Telecommunications Nanjing China Nantong Institute of Nanjing University of Posts and Telecommunications Nantong China

As one of the fragile components in the package structure, solder joints are usually subjected to thermo-mechanical coupled loads. Therefore, it is essential to investigate the deformation behavior and constitutive model of solder joints for the reliability prediction of the whole packaging. As a kind of polycrystalline material, solder joints contain multiple grains with different orientations. As the electronic devices gradually decrease in size, the solder joints may only contain one or several grains, the conventional macro-phenomenological constitutive model is not able to describe the deformation at the grain scale caused by crystalline slip. In this paper, a finite element model on the basis of 3D crystal plasticity theory is proposed, in which the behavior of each grain is first investigated, and the overall behavior of the structure is obtained by calculating the average of all elements. Firstly, the models with 10, 40, and 100 grains are established to find out the influence of grains’ numbers on the overall behavior. Then, the strain rate jump experiments of CASTIN solder alloy are simulated using the appropriate model. The CASTIN solder alloy is stretched to 1.5% strain at strain rates of 10 -6 s -1 to 10 -2 s -1 under temperatures of -55°C to 125°C, respectively. A comparison is made between the simulation results and the experimental results, the parameters of the established model are obtained through matching the experiment curves, and the effect of the temperature on the parameters is analyzed. The model then is used to investigate the deformation response of CASTIN alloy under the thermo-mechanical cycle tests without changing these parameters. It can be found that the proposed model can give reasonable predictions of CASTIN alloy under thermo-mechanical coupled loads.

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Research on Space-Time Orbital Angular Momentum Antenna Array Based on Sequential Control 13

Research on Space-Time Orbital Angular Momentum Antenna Arra...

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13th International Conference on microwave and Millimeter Wave Technology, ICMMT 2021

作者： Weijie, Gong Yumei, Chang Zhenliang, Zhou Tao, Zhu Ye, Han National And Local Joint Engineering Laboratory Of RF Integration And Micro-Assembly Technology 9 Wenyuan Rd Nanjing210035 China Nanjing University Of Posts And Telecommunications 9 Wenyuan Rd Nanjing210035 China

ISBN: (纸本)9781665434379

In this paper, the principle and influence factors of orbital angular momentum (OAM) electromagnetic (EM) waves generated by space-time antenna array (STAA) have been studied. A STAA is formed by introducing the time parameter as a new dimension to the traditional antenna array. The amplitude and phase weighting of the traditional antenna array can be easily realized through the time weighting of the STAA, so the OAM can be generated by the STAA. At the same time, in order to show the influence of the radiation characteristics of antenna array on the generation of OAM waves, a circular patch antenna array that can work at 2.45GHz is designed and simulated to verify the proposal. According to the simulation results, one can conclude that, the number of modes of OAM generated by the STAA is determined by the STAA's bandwidth and the frequency of the switching function. More modes of OAM waves can be generated by reducing the switching frequency or broadening the antenna bandwidth. © 2021 IEEE.

关键词： Antenna arrays

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Optimization of Creep Constitutive Modeling of Lead-Free Solder Using Gene Expression Programming Methods

Optimization of Creep Constitutive Modeling of Lead-Free Sol...

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International Conference on (ICEPT) Electronic Packaging Technology

作者： Wei Chen Xu He Xiaowei Xu Lu Liu Department of physics Nanjing University of science and technology Nanjing China Research Institute of Physical and Chemical Engineering of Nuclear Industry Tianjin China National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology College of Integrated Circuit Science and Engineering Nanjing University of Posts and Telecommunications Nanjing China

ISBN: (数字)9798350353808

ISBN: (纸本)9798350353815

In this paper, the GEP method is utilized to derive an ontological model for creep data, focusing on the mechanical properties and structural deformation mechanisms of solder at different scales. By analyzing the effect of micro-and meso-structural morphology on the material, experimental validation is provided for the construction of an ontological model that depicts the viscoplasticity of Pb- Free solder in detail. Iterative optimization of a larger population of experimental samples will drive the development of a fine-grained intrinsic model that will be supported by solid theoretical and empirical evidence, advancing the field towards deeper understanding and innovation. In this study, the GEP algorithm is used to fit the intrinsic model of solder creep and is shown to have good fitting results. The advantages of GEP in equation model fitting are the simplicity of its heuristic algorithm, the ease of its implementation and its good optimization results. In addition, GEP is highly flexible, adaptable and robust to noisy data. After comparing the experimental data simulations, it is found that GEP is able to accurately analyze and predict in the establishment and optimization of creep model, which brings an important contribution to the field of solder research.

关键词： Adaptation models Analytical models Creep Lead Programming Predictive models Prediction algorithms

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Why Can One-Bit Quantization Work? A Mathematical Theory Analysis 6

Why Can One-Bit Quantization Work? A Mathematical Theory Ana...

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6th International Conference on Information Communication and Signal Processing, ICICSP 2023

作者： Liu, Shiqi Li, Bing Zhao, Bo Huang, Lei Sun, Weize Chen, Long Huang, Min Bao, Weimin University of Electronic Science and Technology of China Huzhou Key Laboratory of Terahertz Integrated Circuits and Systems Huzhou China College of Electronic and Information Engineering Shenzhen University Shenzhen China Nanjing University of Posts and Telecommunications National and Local Joint Engineering Laboratory of Rf Integration and Micro Assembly Technology Nanjing China Southeast University State Key Laboratory of Millimeter Waves Nanjing China School of Electrical Engineering Southwest Jiaotong University Chengdu China Peng Cheng Laboratory Shenzhen China School of Mechanical Engineering Northwestern Polytechnical University Xian China School of Artificial Intelligence Shenzhen Polytechnic Shenzhen China

ISBN: (纸本)9798350339994

With the increase of demand in the flexibility and rapidity in different industry areas, unmanned systems are implemented under various circumstances for the convenience they bring. However, the mobility restricts the system size and power consumption. In this case, much attention has been attracted by one-bit quantization for its simplification in signal acquiring and processing. Whereas, most of existing literature focus on how to reap information from one-bit data. Much less work explains the reason why the information can be achieved from the coarsely quantized data. In this paper, the process of one-bit quantization is analytically analyzed in detailed in a mathematical angle of view, where the quantization noise resulting from the nonlinear effect is analyzed. Specifically, the one-bit quantized data is decomposed mathematically, and the components are analyzed to show the existence of the requisite signal in the quantized signal. This offers a theoretical explanation of the effectiveness of one-bit quantization. © 2023 IEEE.

关键词： analog to digital converter harmonic one-bit quantization quantization noise

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Investigation of Lateral Gallium Oxide MOSFET with Discrete Field Plate by Calibrated Numerical Simulation

Investigation of Lateral Gallium Oxide MOSFET with Discrete ...

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China International Forum o Solid State Lighting: International Forum on Wide Bandgap Semiconductors China (SSLChina: IFWS)

作者： Lei Wang Maolin Zhang Zeng Liu Lili Yang Shan Li Weihua Tang Yufeng Guo College of Integrated Circuit Science and Engineering Nanjing University of Posts and Telecommunications Nanjing China Innovation Center for Gallium Oxide Semiconductor (IC-GAO) Nanjing China National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing China

The main barrier preventing the simulation design and optimization of wide bandgap semiconductor power devices is poor numerical convergence. Currently, the uncalibrated two-dimensional electric field distribution is the main foundation for the breakdown voltage optimization of gallium oxide power devices. This work achieves proper calibration of the current-voltage (I-V) characteristics as well as the breakdown voltage evaluation by enhancing the numerical method. An optimal set of structural parameters for a lateral gallium oxide MOSFET with a discrete field plate is designed using the suggested method. Thanks to the improved electric field profile, the breakdown voltage is increased by 19.7%, and on-state resistance did not degrade. This work resolves the wide-bandgap semiconductors' poor convergence problem and offers a workable strategy for the subsequent theoretical simulation and optimization of gallium oxide power devices.

关键词： Resistance MOSFET Gallium Photonic band gap Numerical simulation Numerical models Structural engineering

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Passive patterned polymer dispersed liquid crystal transparent display

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Chinese Optics Letters 2022年第1期20卷 155-159页

作者： Jing Yan Xiangwen Fan Yifan Liu Ying Yu Yuming Fang Ruo-Zhou Li College of Electronic and Optical Engineering&College of Microelectronics Nanjing University of Posts and TelecommunicationsNanjing 210023China National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing University of Posts and TelecommunicationsNanjing 210023China Touch and Display Module Development Group Microsoft Inc.Suzhou 215123China

A patterned polymer dispersed liquid crystal transparent display using one-time UV exposure is *** device is fabricated by exposing the cell with a uniform UV light through a mask with selective attenuation of the UV *** voltage-transmittance response of the device is different for the corresponding ***,three different states of total scattering,patterned transparent,and total transparent can be realized by controlling the applied *** proposed device used in shutter mode as smart windows and in projected display mode is demonstrated,which shows great potential for smart windows with customized patterns or logos and has potential application in the field of projected transparent displays.

关键词： polymer dispersed liquid crystal transparent display

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A scalable model for on-chip spiral inductors by Space-mapping neural network

A scalable model for on-chip spiral inductors by Space-mappi...

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International Symposium on Antennas and Propagation (ISAP)

作者： Shiliang Huang Jie Lin Shu Ying Ling Gu Shanwen Hu Junjun Xue Zixuan Wang Zhikuang Cai Jiafei Yao Jun Zhang Yufeng Guo Nanjing University of Posts and Telecommunications Nanjing China Anqing Normal University Anqing China Anhui Silimicro Electronics Technology Limited Liability Company Hefei China National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing China

This paper presents a scalable model for on-chip spiral inductors utilizing the space-mapping neural network (SMNN), built upon an enhanced 1-π equivalent circuit model. To address the inductor drop observed at low frequencies, a series network consisting of two pairs of inductors and resistors is integrated into the 1-π equivalent circuit model. The topology of the SMNN is optimized using the global search capability of the particle swarm optimization (PSO) algorithm, which determines the optimal weights and thresholds for the SMNN. Compared with traditional neural network models, the proposed SMNN reduces the number of neurons required for mapping the input-output nonlinear relationship, leading to enhanced accuracy and reduced modeling time, which takes a mere 10 to 15 seconds.

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A 100MS/s Pipeline ADC Without Calibration in 0.18μm CMOS Technology 14

A 100MS/s Pipeline ADC Without Calibration in 0.18μm CMOS T...

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14th International Conference on microwave and Millimeter Wave Technology, ICMMT 2022

作者： Zhang, Yi Liu, Yaqin Xia, Hongliang Yang, Lei Wang, Yang Zhang, Youtao Guo, Yufeng College of Integrated Circuit Science and Engineering Nanjing University of Posts and Telecommunications Nanjing China National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing China State Key Laboratory of Millimeter Waves Nanjing China Science and Technology on Monolithic Integrated Circuits and Modules Laboratory Nanjing China Nanjing GuoBo Electronics Co. Ltd Nanjing China Nanjing Vocational University of Industry Technology Nanjing China

ISBN: (纸本)9781665467520

Based on SMIC 180nm CMOS process and 1.8/3.3V power supply voltage, a high-speed pipeline ADC is designed in this paper. After a comprehensive consideration of conversion rate and accuracy, the pipelined architecture is finally determined to be 3.5b3+5b. The redundant calibration technology is adopted between each stage to reduce the influence of comparator offset on ADC accuracy. To reduce power consumption and area, SHA-less sampling is adopted. The traditional bootstrap switch is improved to dynamically change the substrate potential so as to reduce the influence of leakage in SHA-less sampling circuit. The post-simulation results shows that the high-speed pipeline ADC designed in this paper can reach 9.97-bit ENOB and 67.76 dB SFDR under the sampling frequency of 100MS/s and input signal frequency of Nyquist, the overall power consumption is about 390mW, and the overall area of the layout is 4.56mm2. © 2022 IEEE.

关键词： Electric power utilization

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Numerical and analytical investigations for the SOI LDMOS with alternated high-k dielectric and step doped silicon pillars

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Chinese Physics B 2020年第3期29卷 460-467页

作者： Jia-Fei Yao Yu-Feng Guo Zhen-Yu Zhang Ke-Meng Yang Mao-Lin Zhang Tian Xia College of Electronic and Optical Engineering&College of Microelectronics Nanjing University of Posts and TelecommunicationsNanjing 210023China National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing 210023China School of Electrical Engineering University of VermontBurlingtonVT 05405USA

This paper presents a new silicon-on-insulator(SOI) lateral-double-diffused metal-oxide-semiconductor transistor(LDMOST) device with alternated high-k dielectric and step doped silicon pillars(HKSD device). Due to the modulation of step doping technology and high-k dielectric on the electric field and doped profile of each zone, the HKSD device shows a greater performance. The analytical models of the potential, electric field, optimal breakdown voltage, and optimal doped profile are derived. The analytical results and the simulated results are basically consistent, which confirms the proposed model suitable for the HKSD device. The potential and electric field modulation mechanism are investigated based on the simulation and analytical models. Furthermore, the influence of the parameters on the breakdown voltage(BV) and specific on-resistance(R_(on,sp)) are obtained. The results indicate that the HKSD device has a higher BV and lower R_(on,sp) compared to the SD device and HK device.

关键词： high-k dielectric step doped silicon pillar model breakdown voltage

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Compact SPAD pixels with fast and accurate photon counting in the analog domain

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Journal of Semiconductors 2021年第5期42卷 85-90页

作者： Zhiqiang Ma Zhong Wu Yue Xu College of Electronic and Optical Engineering&College of Microelectronics Nanjing University of Posts and TelecommunicationsNanjing 210023China National and Local Joint Engineering Laboratory of RF integration&Micro-Assembly Technology Nanjing 210023China

A compact pixel for single-photon detection in the analog domain is presented. The pixel integrates a single-photon avalanche diode(SPAD), a passive quenching & active recharging circuit(PQARC), and an analog counter for fast and accurate sensing and counting of photons. Fabricated in a standard 0.18 μm CMOS technology, the simulated and experimental results reveal that the dead time of the PQARC is about 8 ns and the maximum photon-counting rate can reach 125 Mcps(counting per second). The analog counter can achieve an 8-bit counting range with a voltage step of 6.9 mV. The differential nonlinearity(DNL) and integral nonlinearity(INL) of the analog counter are within the ± 0.6 and ± 1.2 LSB, respectively, indicating high linearity of photon counting. Due to its simple circuit structure and compact layout configuration, the total area occupation of the presented pixel is about 1500 μm^(2), leading to a high fill factor of 9.2%. The presented in-pixel front-end circuit is very suitable for the high-density array integration of SPAD sensors.

关键词： single-photon avalanche diode(SPAD) passive quenching&active recharging circuit(PQARC) analog counter nonlinearity

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