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2018 IEEE MTT-S International Wireless Symposium, IWS 2018

作者： Zhang, Yixiong Zhao, Xuankai Li, Bo National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing University of Posts and Telecommunications Nanjing210003 China

ISBN: (纸本)9781538663462

This paper presents an absorptive frequency selective reflector (AFSR), which exhibits a flat reflection characteristic with absorption at the both sides of the reflection band. This structure formed in planar slotline structures is mainly inclusive of one lossless resonator and two lossy resonators, which are responsible for one reflection band and two absorption bands respectively. In order to minimize the coupling of these three resonators, metallic plates are utilized to make these three resonators separated. In this paper, equivalent circuit model (ECM) based on transmission line theory is introduced to describe the design concept. Then, the realization of specified structure is provided, where a good agreement of reflection coefficient results between EM simulation and ECM is achieved. The proposed AFSR features stable performance under oblique incident angles up to 40°. © 2018 IEEE.

关键词： Resonators

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Numerical and analytical investigations for the SOI LDMOS with alternated high-k dielectric and step doped silicon pillars

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Chinese Physics B 2020年第3期29卷 460-467页

作者： Jia-Fei Yao Yu-Feng Guo Zhen-Yu Zhang Ke-Meng Yang Mao-Lin Zhang Tian Xia College of Electronic and Optical Engineering&College of Microelectronics Nanjing University of Posts and TelecommunicationsNanjing 210023China National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing 210023China School of Electrical Engineering University of VermontBurlingtonVT 05405USA

This paper presents a new silicon-on-insulator(SOI) lateral-double-diffused metal-oxide-semiconductor transistor(LDMOST) device with alternated high-k dielectric and step doped silicon pillars(HKSD device). Due to the modulation of step doping technology and high-k dielectric on the electric field and doped profile of each zone, the HKSD device shows a greater performance. The analytical models of the potential, electric field, optimal breakdown voltage, and optimal doped profile are derived. The analytical results and the simulated results are basically consistent, which confirms the proposed model suitable for the HKSD device. The potential and electric field modulation mechanism are investigated based on the simulation and analytical models. Furthermore, the influence of the parameters on the breakdown voltage(BV) and specific on-resistance(R_(on,sp)) are obtained. The results indicate that the HKSD device has a higher BV and lower R_(on,sp) compared to the SD device and HK device.

关键词： high-k dielectric step doped silicon pillar model breakdown voltage

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Review of the SiC LDMOS power device

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Journal of Semiconductors 2024年第8期45卷 4-17页

作者： Ziwei Hu Jiafei Yao Ang Li Qi Sun Man Li Kemeng Yang Jun Zhang Jing Chen Maolin Zhang Yufeng Guo College of Integrated Circuit Science and Engineering(Industry-Education Integration School) Nanjing University of Posts andT elecommunicationsNanjing 210023China National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing 210023China Nantong Institute of Nanjing University of Posts and Telecommunications Nantong 226000China

Silicon carbide(SiC),as a third-generation semiconductor material,possesses exceptional material properties that significantly enhance the performance of power *** SiC lateral double-diffused metal–oxide–semiconductor(LDMOS)power devices have undergone continuous optimization,resulting in an increase in breakdown voltage(BV)and ultra-low specific on-resistance(Ron,sp).This paper has summarized the structural optimizations and experimental progress of SiC LDMOS power devices,including the trench-gate technology,reduced surface field(RESUrf)technology,doping technology,junction termination techniques and so *** paper is aimed at enhancing the understanding of the operational mechanisms and providing guidelines for the further development of SiC LDMOS power devices.

关键词： SiC LDMOS specific on-resistance breakdown voltage

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An Active Gate Driver with Controllable Gate Current for SiC MOSFETs 9

An Active Gate Driver with Controllable Gate Current for SiC...

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9th International Conference on Integrated Circuits and microsystems, ICICM 2024

作者： Jiang, Zhengfei Yao, Jiafei Dai, Yuxuan Hu, Ziwei Li, Man Zhang, Yi Wang, Zixuan Cai, Zhikuang Guo, Yufeng College of Integrated Circuit Science and Engineering Nanjing University of Posts and Telecommunications National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing China

ISBN: (纸本)9798331509453

An active gate driver (AGD) with controllable gate current (CGC) for SiC MOSFETs is proposed to reduce voltage overshoots and current overshoots. In the CGC-AGD, the controllable current overshoot suppression circuit and voltage overshoot suppression circuit are designed to control the rate of changes in current (di/dt) and voltage (dv/dt) to effectively reduce overshoots. Meanwhile, the current conversion circuit and the push-pull amplifier circuit compensate for the current reduction resulting from the overshoot suppression. This paper simulated the current and voltage overshoot during the switching process based on a double pulse test set up with a 1200V SiC MOSFET by LTspice software. The simulation results show that the current overshoot was reduced by 60% and the voltage overshoot was reduced by 22% when compared to the conventional gate driver (CGD). While compared with the AGD circuit, the current overshoot of CGC-AGD is reduced by 26% and the voltage overshoot is reduced by 19%. These results demonstrate that the CGC-AGD has better suppress on current and voltage overshoot. © 2024 IEEE.

关键词： MOSFET devices

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A Review of Intelligent Design for Test Based on Machine Learning

A Review of Intelligent Design for Test Based on Machine Lea...

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2023 International Symposium of Electronics Design Automation, ISEDA 2023

作者： Zhao, Zeyu Cai, Zhikuang Technology College of Integrated Circuit Science and Engineering Nanjing University of Posts and Telecommunications National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Nanjing China

ISBN: (纸本)9798350304510

In recent years, with the development of post-Moore era, integrated circuit architecture is complex and test cost is increasing. How to apply efficient, reliable, fast and sustainable ideas to integrated circuit design has become a research hotspot in this field. Machine Learning, by virtue of its ability to quickly process abundant data information, shines in the field of Design For Test, which aims to improve the reliability of integrated circuit products and reduce design costs. In this paper, we introduce the application of Machine Learning in scan compression, Automatic Test Pattern Generation algorithm, the Test Pattern Generator in Built-In-Self-Test and test power. In addition, we prospect the foreground application of Machine Learning application in scan test, Automatic Test Pattern Generation, Built-In-Self-Test and test power. © 2023 IEEE.

关键词： Machine learning

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Circularly polarized leaky wave antenna based on compound left-right-hand structure 13

Circularly polarized leaky wave antenna based on compound le...

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13th International Conference on microwave and Millimeter Wave technology, ICMMT 2021

作者： Yin, Huanyu Li, Pinyan Liu, Leilei National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology College of Electronic and Optical Engineering Nanjing University of Posts and Telecommunications Nanjing210003 China

ISBN: (纸本)9781665434379

In this paper, a circularly polarized leaky wave antenna based on compound left-right-hand structure (CRLH) is proposed. In this design, the equivalent series capacitance is realized by the annular groove on the metal microstrip, and the parallel inductance is realized by the metal through hole. The antenna can realize frequency beam scanning in 14-18GHz and circular polarization in 15.5-18GHz. © 2021 IEEE.

关键词： Traveling wave antennas

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A Scalable Model for On-Chip Interdigital Capacitor Based on Space-Mapping Neural Network 9

A Scalable Model for On-Chip Interdigital Capacitor Based on...

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9th International Conference on Integrated Circuits and microsystems, ICICM 2024

作者： Xiong, Yuqing Guo, Siqing Hu, Shanwen Gu, Yan Fang, Yuming Guo, Yufeng College of Integrated Circuit Science and Engineering Nanjing University of Posts and Telecommunications Nanjing China National and Local Joint Engineering Laboratory RF Integration and Micro-Assembly Technology Nanjing China

ISBN: (纸本)9798331509453

A scalable model for on-chip interdigital capacitor is proposed based on space-mapping neural network (SMNN), which combines the equivalent circuit of capacitor and perceptron neural network. By expanding the traditional series equivalent circuit into a π-type structure and adding a series network of resistor and capacitor to characterize the coupling effect, the variation of the equivalent series resistance (ESR) and S-parameter with frequency can be effectively predicted. According to the mathematical equation, the value of each component for the 1-π equivalent circuit model can be quickly and correctly obtained. In order to effectively improve the prediction accuracy and convergence speed of neural network, Particle Swarm Optimization (PSO) and Levenberg-Marquardt Back Propagation (LMBP) are used to select and optimize the weights and thresholds of the neural networks. Compared with the traditional neural network model, the proposed SMNN reduces the number of neurons required to map the input-output nonlinear relationship, so that the modeling time is only reduced to 10 ∼ 15 seconds, and the test data accuracy is good. © 2024 IEEE.

关键词： Particle swarm optimization (PSO)

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Comparison of the three dimensional effect of multi-finger layout in VLD/VLT/RESUrf LDMOS 13

Comparison of the three dimensional effect of multi-finger l...

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2016 13th IEEE International Conference on Solid-State and Integrated Circuit technology (ICSICT)

作者： Ke-meng Yang Yu-feng Guo Jun Zhang Man Li Ling Du Zhi-kuang Cai Zi-xuan Wang National & Local Joint Engineering Laboratory for RF Integration and Micro-packaging Technologies College of Electronic Science and Engineering Nanjing University of Posts and Telecommunications

ISBN: (纸本)9781467397209

In this paper, the impact of three dimensional effect of multi-finger layout on Variation of Lateral Doping(VLD), the Variation of Lateral Thickness(VLT) and Reduced Surface Field(RESUrf) LDMOS is explored. These devices are compared on the basis of breakdown voltage and on-state resistance. The simulation indicates that compared with VLT and conventional RESUrf LDMOS, the breakdown voltage of VLD is insensitive to the three dimensional effect of multi-finger layout because of its unchanged electric field. However, the specific on-state resistance of central source case in VLD and VLT LDMOS has a remarkable increase due to the low current density.

关键词： Comparison of the three dimensional effect of multi-finger layout in VLD/VLT/RESUrf LDMOS RESUrf VLD

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Tradeoff between the Breakdown Voltage and Specific On-Resistance of SOI RESUrf LDMOS 15

Tradeoff between the Breakdown Voltage and Specific On-Resis...

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15th IEEE International Conference on ASIC, ASICON 2023

作者： Guo, Yufeng Yang, Kemeng Chen, Jing Li, Man Jiang, Zhengfei Yao, Jiafei Zhang, Jun Zhang, Maolin Nanjing University of Posts and Telecommunications College of Integrated Circuit Science and Engineering Nanjing China National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing210023 China

ISBN: (纸本)9798350312980

The tradeoff between the breakdown voltage (BV) and specific on-resistance (Ron,sp) is an important issue for the power device. Baliga's Figure of Merits (BFOM) and silicon limit both are useful tools to evaluate this relationship. However, the strong 2-D effect is not considered in the conventional BFOM and the present silicon limit. In this paper, a new BFOM model of SOI RESUrf LDMOS is proposed based on the formulized 2-D electric field in the drift region. Then, the device structure parameters are optimized to maximize the BFOM. A novel silicon limit and critical electric field are also derived. The differences between the lateral and the vertical devices are investigated and compared. The mechanism is discussed. The simulation based on the TCAD tool is employed to verify the novel BFOM and silicon limit. © 2023 IEEE.

关键词： BFOM Breakdown voltage LDMOS RESUrf Silicon limit SOI Specific on-resistance

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Design of Dual-band Implantable Antenna with Shorting Pins 8

Design of Dual-band Implantable Antenna with Shorting Pins

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8th Asia-Pacific Conference on Antennas and Propagation, APCAP 2019

作者： Hua, Dengyu Jin, Xiaoyu Xu, Li-Jie Duan, Zhu Nanjing University of Posts and Telecommunications National and Local Joint Engineering Laboratory of Rf Integration and Micro-Assembly Technology Nanjing China Southeast University State Key Laboratory of Millimeter Waves Nanjing China

ISBN: (纸本)9781665400541

This paper proposes a pin-loaded dual-band antenna for implantable applications, covering both 915 MHz Industrial, Scientific and Medical (ISM) band and 1.4 GHz Wireless Medical Telemetry Service (WMTS) band. With two shorting pins loaded at two corners, miniaturization is achieved. Furthermore, four straight slots are introduced on the top patch, giving rise to the appearance of two resonances for dual-band operation. To achieve better impedance matching, another three open-end L-shaped slots are etched on the ground, and the final proposed antenna is well matched at two required bands. © 2019 IEEE.

关键词： microwave antennas

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