The goal of our research is to develop a high-level controller to provide reference trajectories automatically to the low-level controller of a rehabilitation robotic device. The high-level controller, which is the su...
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The goal of our research is to develop a high-level controller to provide reference trajectories automatically to the low-level controller of a rehabilitation robotic device. The high-level controller, which is the supervisory controller, is an event driven, asynchronous discrete event system (DES), described by a finite state automaton. Extensive simulations are performed using the supervisory controller for a rehabilitation task. The results demonstrate the feasibility of the proposed supervisory controller
Recent research has proposed statistical simulation as a technique for fast performance evaluation of superscalar microprocessors. The idea in statistical simulation is to measure a program's key performance chara...
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Recent research has proposed statistical simulation as a technique for fast performance evaluation of superscalar microprocessors. The idea in statistical simulation is to measure a program's key performance characteristics, generate a synthetic trace with these characteristics, and simulate the synthetic trace. Due to the probabilistic nature of statistical simulation the performance estimate quickly converges to a solution, making it an attractive technique to efficiently cull a large microprocessor design space. In this paper, we evaluate the efficacy of statistical simulation in exploring the design space. Specifically, we characterize the following aspects of statistical simulation: (i) fidelity of performance bottlenecks, with respect to cycle-accurate simulation of the program, (ii) ability' to track design changes, and (Hi) trade-off between accuracy and complexity in statistical simulation models. In our characterization experiments, we use the Plackett & Burman (P&B) design to systematically stress statistical simulation by creating different performance bottlenecks. The key results from this paper are: (1) Synthetic traces stress at least the same 10 most significant processor performance bottlenecks as the original workload, (2) Statistical simulation can effectively track design changes to identify feasible design points in a large design space of aggressive microarchitectures, (3) Our evaluation of 4 statistical simulation models shows that although a very detailed model is needed to achieve a good absolute accuracy in performance estimation, a simple model is sufficient to achieve good relative accuracy, and (4) The P&B design technique can be used to quickly identify areas to focus on to improve the accuracy of the statistical simulation model.
We demonstrate 10-Gb/s, error-free transmission over 264,000-km field fiber with 1,000 optical 3R regeneration stages using all-optical clock recovery. Experimental results show only 1.5-dB power penalty at BER 10{sup...
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We demonstrate 10-Gb/s, error-free transmission over 264,000-km field fiber with 1,000 optical 3R regeneration stages using all-optical clock recovery. Experimental results show only 1.5-dB power penalty at BER 10{sup}(-9) after 264,000-km transmission.
An access network using a centralized light sources (CLS) and multi mode fiber (MMF) is proposed and verified using BER measurements. Results show that we can implement CLS based PON using currently existing MMF infra...
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ISBN:
(纸本)1557528020
An access network using a centralized light sources (CLS) and multi mode fiber (MMF) is proposed and verified using BER measurements. Results show that we can implement CLS based PON using currently existing MMF infrastructure
Application classification techniques based on monitoring and learning of resource usage (e.g. CPU, memory, disk and network) have been proposed to aid in resource scheduling decisions. An important problem that arise...
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Application classification techniques based on monitoring and learning of resource usage (e.g. CPU, memory, disk and network) have been proposed to aid in resource scheduling decisions. An important problem that arises in application classifiers is how to decide which subset of numerous performance metrics collected from monitoring tools should be used for the classification. This paper presents an approach based on a probabilistic model (Bayesian Network) to systematically select the representative performance features, which can provide optimal classification accuracy and adapt to changing workloads. Virtual machines (VMs) are used to host the application execution and system-level performance metrics for a VM summarize the application and its host's resource usage. This approach requires no application source code modification nor execution intervention. Results from experiments show that the proposed scheme can effectively select a performance metric subset providing above 90% classification accuracy for a set of benchmark applications.
In this paper, we consider the optical power level for developing a full constrained search algorithm to find the optimal cost allocation of a chain of amplifiers. We show how the algorithm is improved when different ...
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In this paper, we consider the optical power level for developing a full constrained search algorithm to find the optimal cost allocation of a chain of amplifiers. We show how the algorithm is improved when different solutions provide the same power level at each span
In high-power adjustable speed motor drives, such as those used in electric ship propulsion systems, active filters provide a viable solution to mitigating harmonic related issues caused by diode or thyristor rectifie...
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In high-power adjustable speed motor drives, such as those used in electric ship propulsion systems, active filters provide a viable solution to mitigating harmonic related issues caused by diode or thyristor rectifier front-ends. To handle the large compensation currents and provide better thermal management, two or more paralleled semiconductor switching devices are often used. In this paper, a novel topology is proposed where two active filter inverters are connected with tapped reactors to share the compensation currents. The proposed active filter topology can also produce seven voltage levels, which significantly reduces the switching current ripple and the size of ripple filters. Based on the joint redundant state selection strategy, a current-balancing algorithm is proposed to keep the reactor magnetizing current to a minimum. It is shown through simulation that the proposed active filter can achieve high overall system performance. The system is also implemented on a real-time digital simulator to further verify its effectiveness
A comprehensive analysis on the requirements and challenges of next generation photonic system simulator technology for hybrid hierarchical optical networks is presented. Key challenges need to be met by simulator des...
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A comprehensive analysis on the requirements and challenges of next generation photonic system simulator technology for hybrid hierarchical optical networks is presented. Key challenges need to be met by simulator designers to parallel the capability of tools used in electronics industry are also considered in detail
It is widely believed that "whispering to the nearest neighbor" (ie. taking a large number of short hops) is the throughput optimal routing scheme for all ad-hoc wireless networks. We show that for power-lim...
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It is widely believed that "whispering to the nearest neighbor" (ie. taking a large number of short hops) is the throughput optimal routing scheme for all ad-hoc wireless networks. We show that for power-limited networks where processing energy is not an insignificant factor, instead of taking short hops, there exists a characteristic hop distance that, along with load balancing, can attain high throughput, even for networks with a small number of nodes. In fact, the "whisper to the nearest neighbor" routing scheme leads to strictly suboptimal uniform throughput on the order of O(radic(inN/N)) when processing energy is considered. We show that taking thetas(1) number of hops is throughput, energy, and delay optimal, achieving thetas(1) uniform capacity under uniform traffic. These results are contrary to previous results on the capacity of power-limited wireless networks under a zero-processing energy assumption, which showed that capacity increases with increasing number of nodes. Hence, failing to account for processing energy not only leads to suboptimal routing schemes, but also leads to inflated optimism about the capacity scaling behavior of power-limited wireless networks.
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