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International Conference on Computer Communications and Networks (ICCCN)

作者： Xiaobo Zhou R. Luling Paderborn Center for Parallel Computing University of Paderborn Paderborn Germany

In this paper we propose a hierarchical server network architecture for the support of a large-scale TV-Anytime system. We present and formulate various policies used for the effective mapping of videos in the runtime of the TV-Anytime system. A predictive assignment policy is presented to determine periodically the mapping of videos to the server network. Furthermore, we present an adaptive reallocation policy to handle short-term variations. Our simulation results demonstrate that these policies yield an efficient system and make the system more adaptive to changes in video popularity and system state. Our simulation results also show that batching and multicasting significantly improves the system throughput during high load periods and makes the system more scalable.

关键词： Intelligent networks Network servers TV Video recording Costs Large-scale systems parallel processing Runtime Adaptive systems Throughput

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ON ARCHITECTURE FOR SLA-AWARE WORKFLOWS IN GRID ENVIRONMENTS

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Journal of Interconnection Networks 2005年第3期6卷 245-263页

作者： Dang Minh Quan Odej Kao Paderborn Center for Parallel Computing (PC2) University of Paderborn Fuerstenalle 11 Paderborn 33102 Germany Department of Computer Science and Paderborn Center for Parallel Computing (PC2) University of Paderborn Fuerstenalle 11 Paderborn 33102 Germany

Service Level Agreements (SLAs) are currently one of the major research topics in Grid computing, as they serve as a foundation for reliable and predictable Grids. SLAs define an explicit statement of expectations and obligations in a business relationship between provider and customer. Thus, SLAs should guarantee the desired and a-priori negotiated Quality of Service (QoS), which is a mandatory prerequisite for the Next Generation Grids. This development is proved by a manifold research work about SLAs and architectures for implementing SLAs in Grid environments. However, this work is mostly related to SLAs for standard, monolithic Grid jobs and neglects the dependencies between different steps of operation. The complexity of an SLA-specification for workflows grows significantly, as characteristics of correlated sub-jobs, the data transfer phases, the deadline constraints and possible failures have to be considered. Thus, an architecture for an SLA-aware workflow implementation needs sophisticated mechanisms for specification and management, sub-job mapping, data transfer optimization and fault reaction. Therefore, this paper presents an architecture for SLA-aware Grid workflows. The main contributions are an improved specification language for SLA-aware workflows, a mapping and optimization algorithm for sub-job assignment to Grid resources and a prototype implementation using standard middleware. Experimental measurements prove the quality of the development.

关键词： Service Level Agreement (SLA) workflow Grid computing

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Pragma based parallelization — Trading hardware efficiency for ease of use?

Pragma based parallelization — Trading hardware efficiency ...

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International Conference on Reconfigurable computing and FPGAs (ReConFig)

作者： Tobias Kenter Henning Schmitz Christian Plessl Paderborn Center for Parallel Computing University of Paderborn Paderborn Germany

One major obstacle for a wide spread FPGA usage in general-purpose computing is the development tool flow that requires much higher effort than for pure software solutions. Convey Computer promises a solution to this problem for their HC-1 platform, where the FPGAs are configured to run as a vector processor and the software source code can be annotated with pragmas that guide an automated vectorization process. We investigate this approach for a stereo matching algorithm that has abundant parallelism and a number of different computational patterns. We note that for this case study the automated vectorization in its current state doesn't hold its productivity promise. However, we also show that using the Vector Personality can yield a significant speedups compared to CPU implementations in two of three investigated phases of the algorithm. Those speedups don't match custom FPGA implementations, but can come with much reduced development effort.

关键词： Vectors Field programmable gate arrays Random access memory Kernel Memory management Engines Hardware

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Estimating decoding times of MPEG-2 video streams

Estimating decoding times of MPEG-2 video streams

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IEEE International Conference on Image Processing

作者： L.-O. Burchard P. Altenbernd Paderborn Center for Parallel Computing University of Paderborn Paderborn Germany

This paper is motivated through the advantages offered by employing real-time (priority-driven) scheduling (RTS) for efficiently implementing quality-of-service guarantees. For employing RTS (e.g. for conferencing), a-priori knowledge about worst-case execution times (WCET) of the decoding process is required. With our new approach (focussing of MPEG-2 with variable bit rates) the resource usage compared to fixed-bandwidth allocation can be significantly decreased. Solutions for the WCET analysis are presented for two scenarios (video-on-demand (VoD), live-video). A significant reduction of overestimations during WCET analysis of the live scenario can be achieved by using our new technique. In a VoD scenario it is even possible to predict the exact execution times.

关键词： Decoding Streaming media Processor scheduling Quality of service Resource management Videoconference Bit rate Timing Computer networks parallel processing

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Risk-aware Migrations For Prepossessing SLAs

Risk-aware Migrations For Prepossessing SLAs

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International Conference on Networking and Services (ICNS)

作者： K. Voss Paderborn Center for Parallel Computing Paderborn University Germany

SLAs were developed in order to guarantee the customer's desired quality of service. To prepossess SLAs even in the case of system failures, migrating the job to an alternative resource is a well-known fault-tolerance mechanism. In this paper we start to consider migrations in a risk-aware concept. We plan to introduce risk assessment and management technologies into the grid fabric in order to ensure prepossessing SLAs. The most benefits are seen in a risk-aware scheduling and initiating precautionary fault-tolerance mechanism. This paper focusses on precautionary migrations which should prevent an SLA violation. A motivating scenario presents the variety of required actions in a system with high workload for several migration alternatives. The important aspects of jobs and resources are explained. Furthermore, we present a measurement to estimate the effects of migrating to an alternative resource. This will be one decision criteria in the migration process. Future work will complete the risk-aware scheduling of migrations

关键词： Risk management Quality of service Fault tolerance Fabrics parallel processing Fault tolerant systems Technology management Processor scheduling Grid computing Instruments

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Recursive Evaluation of Fault Tolerance Mechanisms for SLA Management

Recursive Evaluation of Fault Tolerance Mechanisms for SLA M...

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International Conference on Networking and Services (ICNS)

作者： Kerstin Voss Paderborn Center for Parallel Computing University of Paderborn Germany

Service level agreements (SLAs) have been introduced into the grid in order to build a basis for its commercial uptake. The challenge for Grid providers in agreeing and operating SLA-bound jobs is to ensure their fulfillment even in the case of failures. Hence, fault-tolerance mechanisms are an essential means of the provider's SLA management. The high utilization of commercial operated clusters leads to scenarios in which typically a job migration effects other jobs scheduled. The effects result from the unavailability of enough free resources which would be needed to catch all resource outages. Consequently before initiating a migration, its effects for other jobs have to be compared and the initiation of fault- tolerance (FT-) mechanisms have to be evaluated recursively. This paper presents a measurement for the benefit of initiating a FT-mechanism, the recursive evaluation, and termination condition. Performing such an impact evaluation of an initiated chain of FT-mechanisms is often more profitable than performing a single FT-mechanism and accordingly this is important for the Grid commercialization.

关键词： Fault tolerance Quality of service Business Resumes Performance evaluation Availability Computer network management Conference management parallel processing Commercialization

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Just-in-Time Instruction Set Extension - Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture

Just-in-Time Instruction Set Extension - Feasibility and Lim...

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IEEE International Symposium on parallel and Distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Mariusz Grad Christian Plessl Paderborn Center of Parallel Computing University of Paderborn Germany

In this paper, we study the feasibility of moving the instruction set customization process for reconfigurable ASIPs to runtime under the precondition that current FPGA devices and tools are used. To this end we propose a tool flow for just-in-time ASIP customization which identifies suitable custom instructions to accelerate arbitrary binary applications that execute on a virtual machine. The tool flow targets our previously introduced Woolcano reconfigurable ASIP architecture, which augments the PowerPC core in a Xilinx Virtex 4FX CPU with runtime reconfigurable instructions. We evaluate the tool flow with a comprehensive set of applications from the SPEC2006, SPEC2000, MiBench, and SciMark2 benchmark suites and compare the speedups that can be achieved with the overhead of the complete ASIP specialization process. We show that an average speedup of 5× can be achieved for benchmarks from the embedded computing domain. The overhead of custom instruction identification and hardware generation for these benchmarks is less than 50 minutes and will be compensated if the applications execute for more than 2 hours. Finally, we evaluate caching strategies to reduce the time until this break even point is reached.

关键词： Runtime Computer architecture Field programmable gate arrays Hardware Kernel Benchmark testing Design automation

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Enhance Self-managing Grids by Risk Management

Enhance Self-managing Grids by Risk Management

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International Conference on Networking and Services (ICNS)

作者： Kerstin Voss Paderborn Center for Parallel Computing Paderborn University Germany

ISBN: (纸本)9781424431526

Risk management (RM) processes are used in various application fields since often possible threats should be identified, evaluated, and avoided. In the grid resource failures are common and likely threats which slow down the establishment of service level agreements (SLAs). Introducing RM into the self-managing grid is beneficial to estimate and react on such threats. The assessed probabilities for resource failures can be used as a decisive factor in different scenarios. In particular, the resource allocation profits from risk information since jobs can be mapped under consideration of their importance and the stability of available resources. Each RM process is particularly developed for one application field since the threats, the consequences, and the retaliatory actions are individual. The difference between conventional RM processes and the grid integrated one is that the Grid should be self-managing. This implies that after the configuration RM processes have to be performed totally automatical. This paper presents the Grid RM process which bases on the standard for RM processes developed from the federation of European risk management associations (FERMA).

关键词： Risk management Resource management Stability Standards development parallel processing Quality of service Contracts Business Decision making Condition monitoring

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IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable computing

IMORC: Application Mapping, Monitoring and Optimization for ...

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Annual IEEE Symposium on Field-Programmable Custom computing Machines (FCCM)

作者： Tobias Schumacher Christian Plessl Marco Platzner Paderborn Center of Parallel Computing University of Paderborn Germany

Mapping applications that consist of a collection of cores to FPGA accelerators and optimizing their performance is a challenging task in high performance reconfigurable computing. We present IMORC, an architectural template and highly versatile on-chip interconnect. IMORC links provide asynchronous FIFOs and bitwidth conversion which allows for flexibly composing accelerators from cores running at full speed within their own clock domains, thus facilitating the re-use of cores and portability. Further, IMORC inserts performance counters for monitoring runtime data. In this paper, we introduce the IMORC architectural template and the on-chip interconnect and demonstrate IMORC on the example of accelerating the 𝑘-th nearest neighbor thinning problem on an XtremeData XD1000 reconfigurable computing system.

关键词： Monitoring Field programmable gate arrays Counting circuits Clocks Concurrent computing High performance computing Topology parallel processing Runtime Acceleration

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Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler

Cooperative multitasking for heterogeneous accelerators in t...

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International Conference on Application Specific Systems (ASAP), Architectures and Processors

作者： Tobias Beisel Tobias Wiersema Christian Plessl André Brinkmann Paderborn Center for Parallel Computing University of Paderborn Germany

This paper presents an extension of the Completely Fair Scheduler (CFS) to support cooperative multitasking with time-sharing for heterogeneous processing elements in Linux. We extend the kernel to be aware of accelerators, hold different run queues for these components and perform scheduling decisions using application provided meta information and a fairness measure. Our additional programming model allows the integration of checkpoints into applications, which permits the preemption and subsequent migration of applications between accelerators. We show that cooperative multitasking is possible on heterogeneous systems and that it increases application performance and system utilization.

关键词： Instruction sets Graphics processing unit Kernel Linux Processor scheduling Multitasking Hardware

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