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A reconfigurable extension to the network interface of beowulf clusters

A reconfigurable extension to the network interface of beowu...

引用

2001 IEEE International Conference on Cluster Computing, CLUSTER 2001

作者： Underwood, Keith D. Sass, Ron R. Ligon, Walter B. Parallel Architecture Research Lab Holcombe Department of Electrical and Computer Engineering Clemson University 105 Riggs Hall ClemsonSC29634-0915 United States

ISBN: (纸本)0769511163

With a focus on commodity PC systems, Beowulf clusters traditionally lack the cutting edge network architectures, memory subsystems, and processor technologies found in their more expensive supercomputer counterparts. What Beowulf clusters lack in technology, they more than make up for with their significant cost advantage over traditional supercomputers. We propose an architectural extension that adds reconfigurable computing to the network interface of Beowulf clusters. This enhances both the network and processor capabilities of the cluster. Furthermore, for some applications, the proposed extension partially compensates for weaknesses in the PC memory subsystem. We discuss two applications, the 2D Fast Fourier Transform (FFT) and integer sorting, which benefit from the resulting architecture. © 2001 Institute of Electrical and Electronics Engineers Inc.. All rights reserved.

关键词： Supercomputers

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Cost Effectiveness of an Adaptable Computing Cluster 01

Cost Effectiveness of an Adaptable Computing Cluster

引用

2001 ACM/IEEE Conference on Supercomputing, SC 2001

ISBN: (纸本)158113293X

With a focus on commodity PC systems, Beowulf clusters traditionally lack the cutting edge network architectures, memory subsystems, and processor technologies found in their more expensive supercomputer counterparts. What Beowulf clusters lack in technology, they more than make up for with their significant cost advantage over traditional supercomputers. This paper presents the cost implications of an architectural extension that adds reconfigurable computing to the network interface of Beowulf clusters. A quantitative idea of cost-effectiveness is formulated to evaluate computing technologies. Here, cost-effectiveness is considered in the context of two applications: the 2D Fast Fourier Transform (2D-FFT) and integer sorting. © 2001 ACM.

关键词： Cost effectiveness

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Acceleration of a 2D-FFT on an Adaptable Computing Cluster 9

Acceleration of a 2D-FFT on an Adaptable Computing Cluster

引用

9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2001

作者： Underwood, K.D. Sass, R.R. Ligon, W.B. Parallel Architecture Research Lab. Holcombe Department of Electrical and Computer Engineering Clemson University 105 Riggs Hall ClemsonSC29634-0915 United States

ISBN: (纸本)0769526675

Despite a decade of research into their use for computing applications, FPGA-based custom computing machines are still only used to accelerate a limited range of applications. Recognizing that recent advances in network technology provide an opportunity for a more general-purpose application of custom computing machines, we develop the idea of an intelligent network adapter for cluster-based parallel computing, calling the resulting architecture an Adaptable Computing Cluster. Results presented suggest that placing the FPGAs in the data path to the network dramatically improves the performance and scalability of target applications. This is especially noteworthy because the target applications have historically not performed well on either technology. This paper discusses how FPGAs can be used to provide network functionality while increasing compute power. The focus is on a specific application, the 2D Fast Fourier Transform, with additional insights into the implications for parallel computing on a cluster. © 2001 Non IEEE.

关键词： Field programmable gate arrays (FPGA)

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A reconfigurable extension to the network interface of Beowulf clusters

A reconfigurable extension to the network interface of Beowu...

引用

Annual IEEE Symposium on Foundations of Computer Science

作者： Keith D. Underwood Ron R. Sass Walter B. Ligon Parallel Architecture Research Lab Holcombe Department of Electrical and Computer Engineering Clemson University Clemson SC USA

关键词： Network interfaces Costs Computer interfaces Computer networks Prototypes Field programmable gate arrays Supercomputers Application software Sorting Hardware

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Problem solving environment infrastructure for high performance computer systems

Problem solving environment infrastructure for high performa...

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15 Workshops Held in Conjunction with the IEEE International parallel and Distributed Processing Symposium, IPDPS 2000

作者： Stanzione Jr., Daniel C. Ligon III, Walter B. Parallel Architecture Research Lab. Clemson University United States

ISBN: (纸本)354067442X

This paper presents the status of an ongoing project in constructing a framework to create problem solving environments (PSEs). The framework is independent of any particular architecture, programming model, or problem domain. The framework makes use of compiler technology, but identifies and addresses several key differences betw een compilers and PSE. The validit y of this model is being tested through the creation of several protot ype PSEs, which apply to significantly differen t domains, and target both parallel computers and reconfigurable computers. © 2000 Springer-Verlag Berlin Heidelberg.

关键词： Problem solving

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Large-throughput parallel optical interconnection for a distributed parallel computing system

Large-throughput parallel optical interconnection for a dist...

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1999 Pacific Rim Conference on Lasers and Electro-Optics, CLEO/Pacific Rim 1999

作者： Nishimura, S. Harasawa, K. Matsudairn, N. Akutsu, S. Sasaki, S. Kudoh, T. RWCP Optical Interconnection Hitachi Laboratory C/o Central Research Lab Hitachi Ltd. 1-280 Higashi-koigakubo Kokubunji-shi Tokyo185-8601 Japan Hitachi Communication Systems Inc. 180 Totsuka-cho Totsuka-ku Yokohama244-0003 Japan RWCP Parallel and Distributed System Architecture Lab. Tsukuba Mitsui Building I6F 1-6-1 Takezono Tsukuba-shi Ibaraki305-0032 Japan

We produced a large-throughput optical interconnection for a distributed parallel computing system. It transmits optical data at a rate of over 800-Mbit/s×10-bit through a 50-m single-mode fiber, using a CMOS MUX... 详细信息

ISBN: (纸本)0780356616

关键词： Single mode fibers

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Large-throughput parallel optical interconnection for a distributed parallel computing system

Large-throughput parallel optical interconnection for a dist...

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Pacific Rim Conference on Lasers and Electro-Optics (CLEO/Pacific Rim)

作者： S. Nishimura K. Harasawa N. Matsudairn S. Akutsu S. Sasaki T. Kudoh RWCP Optical Interconnection Hitachi Laboratory c/o Central Research Lab Hitachi and Limited Kokubunji Tokyo Japan Hitachi Communication Systems Inc. Yokohama Japan Parallel and Distributed System Architecture Laboratory RWCP Tsukuba Ibaraki Japan

We produced a large-throughput optical interconnection for a distributed parallel computing system. It transmits optical data at a rate of over 800-Mbit/s/spl times/10-bit through a 50-m single-mode fiber, using a CMO... 详细信息

关键词： Optical interconnections parallel processing Optical receivers High speed optical techniques Optical transmitters Optical network units Data communication Throughput Optical fiber networks Optical crosstalk

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Support for parallel out of core applications on Beowulf workstations

Support for parallel out of core applications on Beowulf wor...

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1998 IEEE Aerospace Conference, AERO 1998

作者： Cettei, Matthew M. Ligon, Walter B. Ross, Robert B. Parallel Architecture Research Lab Clemson University 102 Riggs Hall ClemsonSC29634-0915 United States

ISBN: (纸本)0780343115

Beowulf workstations are a new approach to parallel computing that combine the characteristics of the Pile-Of-PC architecture with freely available software and provide high performance at a low cost for many applications. In order to provide this performance in the face of increasing problem sizes, efficient out of core (OOC) methods must be investigated. In light of shortcomings in operating system virtual memory performance, we have implemented a parallel file system and a new interface tailored to OOC algorithms to provide efficient and convenient access to disk resources in Beowulf workstations. This paper focuses on how these components extend the range of problem sizes which can be efficiently solved on Beowulf workstations in the context of a sample application, a Gauss-Seidel iterative solver. Execution times of the solver when using traditional virtual memory and the parallel file system are compared to characterize performance for various problem sizes, and it is concluded that the combination of parallel file system and new interface significantly increases the size of problems that can be efficiently solved. © 1998 IEEE.

关键词： Piles

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Support for parallel out of core applications on Beowulf workstations

Support for parallel out of core applications on Beowulf wor...

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IEEE Conference on Aerospace

作者： M.M. Cettei W.B. Ligon R.B. Ross Parallel Architecture Research Lab Clemson University Clemson SC USA

关键词： Workstations File systems Application software parallel processing Computer architecture Software performance Costs Operating systems Iterative algorithms Gaussian processes

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Multiprocessor memory management: integrating four-address virtual memory and aliased page tables

Multiprocessor memory management: integrating four-address v...

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International Phoenix Conference on Computers and Communications (IPCCC)

作者： B. Hunt E.E. Johnson Microelectronics Division International Business Machines Corporation Austin TX USA Parallel Architecture Research Lab New Mexico State University Las Cruces NM USA

Memory management in multiprocessors is currently a lively area for research. Many research efforts have addressed the complexities of maintaining consistency among shared variables in a distributed shared memory. We are instead seeking to develop an overarching memory architecture that mimics techniques evolved by humans for similar tasks, while avoiding the potentially severe performance penalties associated with memory architectures that ignore inherent efficiencies in the underlying hardware architecture. Four-address virtual memory provides sufficient degrees of freedom in the address translation process to support nearly any desired sharing scheme. Aliased page tables provide an efficient mechanism for managing the copy-on-write "sharing" associated with some multiprocessor memory architectures. The combination yields a powerful multiprocessor memory management scheme that is capable of efficiently using underlying hardware facilities.

关键词： Memory management Memory architecture Humans Hardware parallel architectures Operating systems Microelectronics Energy management Power system management System performance

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