Recent advances in computer arithmetic offer interesting alternative solutions for low-power design. Depending on an assortment of factors that need to be considered, it is worth evaluating the logarithmic number syst...
详细信息
Recent advances in computer arithmetic offer interesting alternative solutions for low-power design. Depending on an assortment of factors that need to be considered, it is worth evaluating the logarithmic number system (LNS) or the residue number system (RNS) for hardware implementations of computationally intensive tasks. As such, the choice of arithmetic can lead to substantial power savings.
A neural-network-based approach is proposed in this paper providing multimedia systems with the ability to adapt their performance to the specific needs and characteristics of their users. An emotion recognition syste...
详细信息
We present the embedded trees algorithm, an iterative technique for estimation of Gaussian processes defined on arbitrary graphs. By exactly solving a series of modified problems on embedded spanning trees, it compute...
详细信息
ISBN:
(纸本)0262122413
We present the embedded trees algorithm, an iterative technique for estimation of Gaussian processes defined on arbitrary graphs. By exactly solving a series of modified problems on embedded spanning trees, it computes the conditional means with an efficiency comparable to or better than other techniques. Unlike other methods, the embedded trees algorithm also computes exact error co-variances. The error covariance computation is most efficient for graphs in which removing a small number of edges reveals an embedded tree. In this context, we demonstrate that sparse loopy graphs can provide a significant increase in modeling power relative to trees, with only a minor increase in estimation complexity.
Growth in popularity of the Internet has spawned a great interest in collaborative IP networks that support collaborative meetings between individuals or groups located at remote stations. The emphasis on security of ...
详细信息
In this paper we present the design, implementation and evaluation of a framework that uses JavaSpaces [1] to support this type of opportunistic adaptive parallel/distributed computing over networked clusters in a non...
详细信息
System and processor architectures depend on changes in technology. Looking ahead as die density and speed increase, power consumption and on chip interconnection delay become increasingly important in defining archit...
详细信息
An improved hybrid method is discussed, employing finite-element method along with Faraday's law and standard circuit analysis, in order to predict the induced voltages and currents on a pipeline with defects on i...
详细信息
A novel timing characterization for dual-edge triggered flip-flops is presented. This characterization takes into account the real overhead taken from the clock cycle by the flip-flops. Our study shows the correctness...
详细信息
A novel timing characterization for dual-edge triggered flip-flops is presented. This characterization takes into account the real overhead taken from the clock cycle by the flip-flops. Our study shows the correctness of these new metrics when compared against data-to-output delay. An example of the proposed delay characterization and comparison with conventional (data-to-output) metrics for dual-edge flip-flop design is given.
This paper presents the design, implementation and experimental evaluation of DIOS, an infrastructure for enabling the runtime monitoring and computational steering of parallel and distributed applications. DIOS enabl...
详细信息
We present the design, implementation, and evaluation of single assignment data structures and of a software controlled cache in an existing multi-threaded architecture platform – the Efficient Architecture for Runni...
We present the design, implementation, and evaluation of single assignment data structures and of a software controlled cache in an existing multi-threaded architecture platform – the Efficient Architecture for Running Threads (EARTH). The I-Structure Software-Controlled Cache (ISSC) exploits temporal and spatial locality of EARTH split-phased memory transactions for single-assignment memory references. Our experimental evaluation indicates that the caching mechanism for single-assignment storage makes the EARTH memory system more robust to variations in the latency of memory operations. As a consequence the system can be ported to a wider range of machine platforms and deliver speedup for both regular and irregular application.
暂无评论