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High Performance Emulation of Quantum Circuits 16

High Performance Emulation of Quantum Circuits

引用

Supercomputing Conference

作者： Thomas Häner Damian S. Steiger Mikhail Smelyanskiy Matthias Troyer ETH Zurich Institute for Theoretical Physics Zurich Switzerland Parallel Computing Lab Intel Corporation

ISBN: (纸本)9781467388153

As quantum computers of non-trivial size become available in the near future, it is imperative to develop tools to emulate small quantum computers. This allows for validation and debugging of algorithms as well as exploring hardware-software co-design to guide the development of quantum hardware and architectures. The simulation of quantum computers entails multiplications of sparse matrices with very large dense vectors of dimension 2n, where n denotes the number of qubits, making this a memory-bound and network bandwidth-limited application. We introduce the concept of a quantum computer emulator as a component of a software framework for quantum computing, enabling a significant performance advantage over simulators by emulating quantum algorithms at a high level rather than simulating individual gate operations. We describe various optimization approaches and present benchmarking results, establishing the superiority of quantum computer emulators in terms of performance.

关键词： Quantum computing Logic gates Computers Computational modeling Emulation Sparse matrices Optimization

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Experience Replay as an Effective Strategy for Optimizing Decentralized Federated Learning

Experience Replay as an Effective Strategy for Optimizing De...

引用

International Conference on Computer Vision Workshops (ICCV Workshops)

作者： Matteo Pennisi Federica Proietto Salanitri Giovanni Bellitto Concetto Spampinato Simone Palazzo Bruno Casella Marco Aldinucci PeRCeiVe Lab University of Catania Italy Parallel Computing Group University of Turin Turin Italy

Federated and continual learning are training paradigms addressing data distribution shift in space and time. More specifically, federated learning tackles non-i.i.d data in space as information is distributed in multiple nodes, while continual learning faces with temporal aspect of training as it deals with continuous streams of data. Distribution shifts over space and time is what it happens in real federated learning scenarios that show multiple challenges. First, the federated model needs to learn sequentially while retaining knowledge from the past training rounds. Second, the model has also to deal with concept drift from the distributed data distributions. To address these complexities, we attempt to combine continual and federated learning strategies by proposing a solution inspired by experience replay and generative adversarial concepts for supporting decentralized distributed training. In particular, our approach relies on using limited memory buffers of synthetic privacy-preserving samples and interleaving training on local data and on buffer data. By translating the CL formulation into the task of integrating distributed knowledge with local knowledge, our method enables models to effectively integrate learned representation from local nodes, providing models the capability to generalize across multiple *** test our integrated strategy on two realistic medical image analysis tasks — tuberculosis and melanoma classification — using multiple datasets in order to simulate realistic non-i.i.d. medical data scenarios. Results show that our approach achieves performance comparable to standard (non-federated) learning and significantly outperforms state-of-the-art federated methods in their centralized (thus, more favourable) formulation.

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Direct execution simulation of mobile agent algorithms 03

Direct execution simulation of mobile agent algorithms

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Proceedings of the 2003 international conference on parallel and distributed processing and applications

作者： Jiannong Cao Xuhui Li Sou King Yanxiang He Internet and Mobile Computing Lab Department of Computing Hong Kong Polytechnic University Hung Hom Kowloon Hong Kong Internet and Mobile Computing Lab Department of Computing Hong Kong Polytechnic University Hung Hom Kowloon Hong Kong and Parallel and Distributed Computing Lab Computer School Wuhan University Wuhan Hubei China Parallel and Distributed Computing Lab Computer School Wuhan University Wuhan Hubei China

ISBN: (纸本)9783540405238

Mobile agent has been applied to develop the solutions for various kinds of parallel and distributed computing problems. However, performance evaluation of mobile agent algorithms remains a difficult task, mainly due to the characteristics of mobile agents such as distributed and asynchronous execution, autonomy and mobility. This paper proposes a general approach based on direct execution simulation for evaluating the performance of mobile agent algorithms by collecting and analyzing the information about the agents during their execution. We describe the proposed generic simulation model, named MADES, the architecture of a software environment based on MADES, and a prototype implementation. A mobile agent-based distributed load balancing algorithm is used for experiments with the prototype.

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A time- A nd cost-optimal algorithm for overlap graphs, with applications 25

A time- A nd cost-optimal algorithm for overlap graphs, with...

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25th International Conference on parallel Processing, ICPP 1996

作者： Olariu, S. Zomaya, A.Y. Department of Computer Science Old Dominion University Norfolk VA 23529-0162 United States Parallel Computing Research Lab Dept. of Electrical and Electronic Eng Univ. of Western Austialia PerthWA6007 Australia

ISBN: (纸本)081867623X

In varioui practical applications it is convenient to associate a cer I ain graph with a family Z of intervals. One such graph is the well-known overlap graphof Z, whose vertices are the iiitervals in I , with two intervals connected by and edge if imd only if they overlap but neither of them strictly contains the other. The first main contribution of this paper is to propose time- A nd cost-optimal algorithms for computiiig the connected components of an overlap graph. The iask of computing the connected components of an overlap graph arises in numerous applications including traffic control, robot arm manipulation, segmentation of range images, routing, automated surveillance systems, recognizing polygonal configurations, and code generation for parallel niachines. We begin by showing that any sequential algo i ithm that determines the connected components of the overlap graph of a family of n intervals must take Ω(n log n) time in the algebraic tree model. Next, we show that any parallel algorithm for this problem must take Ω(log n) time in the CREW model even if an infinite numbei of processors and meinoiy cells are available. We then go on to show that both the sequential and the parallel lowei bounds are tight by providing matching algorithms running in Θ(n log n) sequential time and Θ(log n) time using n processors in the CREW model, respectively. At the same time, if the endpoints of the intervals are given in sorted ordLi. our sequential algorithm runs in Θ(n)time, improving the best previously known result. It is interesting to note t l i i L t even if the endpoints are sorted, Ω(1og n) is a time lower hound for solving the problem in the CREW model, regaicllrss of the amount of resources available. As an application, we show that our algorithm affords us a time- A nd cost-optimal solution to a restricted version of the single row routing problem. The best previously known result for routing a set of nets without interstreet crossings run5 in O(1og n log l

关键词： Trees (mathematics)

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A Congestion Control Scheme Based on Fuzzy Logic in Wireless Body Area Networks

A Congestion Control Scheme Based on Fuzzy Logic in Wireless...

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IEEE International Symposium on Network computing and Applications

作者： Sara Ghanavati Jemal Abawaji Davood Izadi Parallel and Distributed Computing Lab Deakin University Geelong Australia Deakin University Burwood VIC AU

ISBN: (纸本)9781509018505

One of the major challenges in healthcare wireless body area network (WBAN) applications is to control congestion. Unpredictable traffic load, many-to-one communication nature and limited bandwidth occupancy are among major reasons that can cause congestion in such applications. Congestion has negative impacts on the overall network performance such as packet losses, increasing end-to-end delay and wasting energy consumption due to a large number of retransmissions. In life-critical applications, any delay in transmitting vital signals may lead to death of a patient. Therefore, in order to enhance the network quality of service (QoS), developing a solution for congestion estimation and control is imperative. In this paper, we propose a new congestion detection and control protocol for remote monitoring of patients health status using WBANs. The proposed system is able to detect congestion by considering local information such as buffer capacity and node rate. In case of congestion, the proposed system differentiates between vital signals and assigns priorities to them based on their level of importance. As a result, the proposed approach provides a better quality of service for transmitting highly important vital signs.

关键词： Wireless communication Body area networks Medical services Protocols Wireless sensor networks Quality of service Fuzzy logic

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RAIL: Risk-Averse Imitation Learning 17

RAIL: Risk-Averse Imitation Learning

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17th International Conference on Autonomous Agents and Multiagent Systems, AAMAS 2018

作者： Santara, Anirban Naik, Abhishek Ravindran, Balaraman Das, Dipankar Mudigere, Dheevatsa Avancha, Sasikanth Kaul, Bharat Intel Labs India Indian Institute of Technology Kharagpur United States Department of CSE Robert Bosch Centre for Data Science and AI Indian Institute of Technology Madras United States Parallel Computing Lab - Intel Labs India

ISBN: (纸本)9781510868083

Imitation learning algorithms learn viable policies by imitating an expert's behavior when reward signals are not available. Generative Adversarial Imitation Learning (GALL) is a state-of-the-art algorithm for learning policies when the expert's behavior is available as a fixed set of trajectories. We evaluate in terms of the expert's cost function and observe that the distribution of trajectory-costs is often more heavy-tailed for GAIL-agents than the expert at a number of benchmark continuous-control tasks. Thus, high-cost trajectories, corresponding to tail-end events of catastrophic failure, are more likely to be encountered by the GAIL-agents than the expert. This makes the reliability of GAIL-agents questionable when it comes to deployment in risk-sensitive applications like robotic surgery and autonomous driving. In this work, we aim to minimize the occurrence of tail-end events by minimizing tail risk within the GALL framework. We quantify tail risk by the Conditional-Value-at-Risk (CVaR) of trajectories and develop the Risk-Averse Imitation Learning (RALL) algorithm. We observe that the policies learned with RAIL show lower tail-end risk than those of vanilla GAIL. Thus, the proposed RALL algorithm appears as a potent alternative to GALL for improved reliability in risk-sensitive applications. © 2018 International Foundation for Autonomous Agents and Multiagent Systems (***). All rights reserved.

关键词： Reinforcement learning

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POPA: Expressing High and Portable Performance across Spatial and Vector Architectures for Tensor Computations 24

POPA: Expressing High and Portable Performance across Spatia...

引用

32nd ACM International Symposium on Field-Programmable Gate Arrays, FPGA 2024

作者： Hao, Xiaochen Rong, Hongbo Zhang, Mingzhe Sun, Ce Jiang, Hong Liang, Yun Peking University China Parallel Computing Lab Intel United States Tsinghua University China University of Science and Technology of China China Intel United States Peking University & Beijing Advanced Innovation Center for Integrated Circuits China

ISBN: (纸本)9798400704185

This paper aims at high and portable performance for tensor computations across spatial (e.g., FPGAs) and vector architectures (e.g., GPUs). The state-of-the-art usually address performance portability across vector architectures (CPUs and GPUs). However, they either miss FPGAs or do not achieve high performance. Without a common architectural abstraction, they program and optimize spatial and vector devices separately, causing low portability. We propose a unified programming framework, POPA, which achieves portability via architectural abstraction and performance via specialization. A parallel dataflow machine is proposed as a unified, abstract hardware target that hides differences of concrete architectures. The machine consists of software-defined systolic arrays and a tensor-specific cache hierarchy, which captures pipeline parallelism and customizable memories on FPGAs, as well as multithreading parallelism on GPUs. The machine is specified in a unified programming model as two dataflow graphs for scheduling compute and data movement, respectively. A compiler then specializes the abstract machine to exploit the properties of FPGAs and GPUs, bridging the gap between the abstract machine and a concrete architecture. We evaluate POPA on several Intel FPGAs and GPUs with high-profile tensor kernels, and this is the first system that achieves >=80% performance of expert-written code or machine peak across architectures, to the best of our knowledge. © 2024 ACM.

关键词： Graphics processing unit

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A Fast Scalable Hardware Priority Queue and Optimizations for Multi-Pushes

A Fast Scalable Hardware Priority Queue and Optimizations fo...

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IEEE International Symposium on parallel and Distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Samuel Collinson Allan Bai Oliver Sinnen Department of Electrical Computer and Software Engineering Parallel and Reconfigurable Computing Lab University of Auckland New Zealand

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

Priority queues (PQ) are an essential data structure for many important algorithms. Hardware implementations of priority queues can accelerate such algorithms significantly. Usually a choice has to be made between very fast (fixed-size) hardware PQs or scalable PQs. Fast hardware queues can provide single cycle push and pop operations, but are limited in size. Scalable hardware queues use embedded memory to achieve scalability, but thereby compromise on speed. This paper proposes a fast and scalable hardware priority queue that can be used for general purpose. It is based on a modular and flexible hybrid design, using a shift register queue combined with a heap-based queue. In the best case, i.e. when only the first queue is needed, push and pop operations only take a single cycle. In an experimental evaluation on a Xilinx FPGA we demonstrate that performance of the hybrid queue maintains a good balance between performance and scalability even for applications where the size of the working set of data can have large variance. We further propose an optimisation of the heap-based queue to support workloads that repeat several consecutive push operations followed by a single pop operation, which is the workload, for instance, in state space search or ray-tracing.

关键词： Distributed processing Scalability Sociology Ray tracing Shift registers Data structures Hardware

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Anatomy of High-Performance Many-Threaded Matrix Multiplication

Anatomy of High-Performance Many-Threaded Matrix Multiplicat...

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IEEE International parallel and Distributed Processing Symposium

作者： Tyler M. Smith Robert van de Geijn Mikhail Smelyanskiy Jeff R. Hammond Field G. Van Zee Institute for Computational Engineering and Sciences and Department of Computer Science The University of Texas at Austin Parallel Computing Lab Intel Corporation Leadership Computing Facility Argonne National Lab

ISBN: (纸本)9781479938018

BLIS is a new framework for rapid instantiation of the BLAS. We describe how BLIS extends the "GotoBLAS approach" to implementing matrix multiplication (GEMM). While GEMM was previously implemented as three loops around an inner kernel, BLIS exposes two additional loops within that inner kernel, casting the computation in terms of the BLIS micro-kernel so that porting GEMM becomes a matter of customizing this micro-kernel for a given architecture. We discuss how this facilitates a finer level of parallelism that greatly simplifies the multithreading of GEMM as well as additional opportunities for parallelizing multiple loops. Specifically, we show that with the advent of many-core architectures such as the IBM PowerPC A2 processor (used by Blue Gene/Q) and the Intel Xeon Phi processor, parallelizing both within and around the inner kernel, as the BLIS approach supports, is not only convenient, but also necessary for scalability. The resulting implementations deliver what we believe to be the best open source performance for these architectures, achieving both impressive performance and excellent scalability.

关键词： Linear algebra Libraries High-performance Matrix BLAS Multicore

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Design and Implementation of a parallel Research Kernel for Assessing Dynamic Load-Balancing Capabilities

Design and Implementation of a Parallel Research Kernel for ...

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International Symposium on parallel and Distributed Processing (IPDPS)

作者： Evangelos Georganas Rob F. Van Der Wijngaart Timothy G. Mattson University of California at Berkeley Berkeley CA USA Parallel Comput. Lab. Intel Corp Santa Clara CA US Parallel Computing Lab Intel Corp. USA

ISBN: (纸本)9781509021413

The parallel Research Kernels (PRK) are a tool to study parallel architectures and runtime systems from an application perspective. It provides paper and pencil specifications and reference implementations of elementary operations covering a broad range of parallel application patterns. The current PRK are trivially statically load-balanced. Future large-scale systems will require dynamic load balancing for unsteady workloads and for handling system/network fluctuations and non-uniformities. We present a new PRK that requires dynamic load balancing, and provides knobs for controlling workload behavior. It is inspired by Particle-In-Cell (PIC) applications and captures one of the computational patterns in such codes. We give a detailed specification of the new PRK, highlighting the challenges and corresponding design choices that make it compact, arbitrarily scalable and self-verifying. We also present implementations of the PIC PRK in MPI, with and without application-specific load balancing, and show an implementation with runtime-assisted load balancing provided by Adaptive MPI features. Our experimental results provide an illustrative example of how PIC can be used to assess the load-balancing capabilities of modern parallel runtimes.

关键词： Load management Kernel Runtime Force Electrostatics Mathematical model Load modeling

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