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International Conference on Advanced Mechatronic Systems (ICAMechS)

作者： Octavian Melinte Luige Vladareanu Ligia Munteanu Hongnian Yu Shuang Cang Zeng-Guang Hou Gui-Bin Bian Hongbo Wang Dept. Robotics and Mechatronics Institute of Solid Mechanics of Romanian Academy Bucharest Romania Engineering and Computing Bournemouth University Dorset UK State Key Laboratory of Management and Control for Complex Systems Chinese Academy of Sciences Beijing China Parallel Robot and Mechatronic Sys. Lab. Yanshan University Qinhuangdao China

The paper presents a new approach on haptic interface control for NAO robotic hand. The haptic teleoperation of NAO robot hand raises some issues, mapping the haptic device dynamic being the most important. The mapping was achieved through Neural Network by determining a dynamic gain of robot haptic feedback. The results lead to the achievement of the haptic intelligent interfaces for the NAO robot hand control which can be integrated into an innovative haptic robot control system.

关键词： Decision support systems Humanoid robots Haptic interfaces Economic indicators Joints Mechatronics

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Linking stack overflow to issue tracker for issue resolution 2014

Linking stack overflow to issue tracker for issue resolution

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6th Asia-Pacific Symposium on Internetware, Internetware 2014

作者： Wang, Tao Yin, Gang Wang, Huaimin Yang, Cheng Zou, Peng Key Lab. of Parallel and Distributed Computing Colledge of Computer National University of Defence Technology ChangSha Hunan China Academy of Equipment Command and Technology Beijing100000 China

ISBN: (纸本)9781450334013

Issue resolution is a central task for software development. The efficiency of issue fixing largely relies on the issue report quality. Stack Overflow, which hosts rich and real-Time posts about programming-specific problems, is a valuable external source of knowledge for issue resolution. In this paper, we present CrossLink, an analysis framework that automatically introduce related posts in Stack Overflow to issues in Android Issue Tracker. This helps developers to leverage the abundant and professional knowledge from massive programmers in Stack Overflow for issue resolution. CrossLink explores the semantic similarities as well as the temporal associations between the two types of repositories to recommend Stack Overflow posts to Android issues. The internal links in Stack Overflow are also employed to improve the linking accuracy. The experiments prove the effectiveness of CrossLink with precision of 62.51% for top-10 recommendations, which is significantly higher than the state-of-Art method. © 2014 ACM.

关键词： Android (operating system)

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Clique guided community detection

Clique guided community detection

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IEEE International Conference on Big Data

作者： Diana Palsetia Md. Mostofa Ali Patwary William Hendrix Ankit Agrawal Alok Choudhary Northwestern University Evanston IL Parallel Computing Lab Intel Santa Clara CA

Discovering communities to understand and model network structures has been a fundamental problem in several fields including social networks, physics, and biology. Many algorithms have been developed for finding the communities. Modularity based technique is fairly new relative to clustering, though it is very popular currently. Although some fast modularity based algorithms exist for detecting communities, the quality of these solutions is limited. At the other extreme, a clique embodies a basic community as it has the greatest possible edge density. However, the requirement that each pair of vertices be connected is too strict. Therefore, techniques to merge partitioned cliques using a hill-climbing greedy algorithm have been studied to form communities. However, the task of finding cliques is computationally expensive. In this paper, we present a new approach for fast and efficient community detection. We propose a clique guided community detection framework that consists of two phases. In the first phase, the framework finds disjoint cliques. In the second phase, the cliques from the first phase are used to guide the merging of individual vertices until a good quality solution is obtained. For the first phase, we develop an algorithm named MaCH (Maximum Clique Heuristic), which is a new approach to compute disjoint cliques using a heuristic-based branch-and-bound technique. We provide experimental results to demonstrate the efficiency of the new algorithm and compare our approach with other previously proposed algorithms.

关键词： Communities Heuristic algorithms Merging Partitioning algorithms Clustering algorithms Approximation algorithms

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To INT_MAX... and Beyond! Exploring Large-Count Support in MPI

To INT_MAX... and Beyond! Exploring Large-Count Support in M...

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Workshop on Exascale MPI at Supercomputing Conference (ExaMPI)

作者： Jeff R. Hammond Andreas Schäfer Rob Latham Parallel Computing Lab Intel Corp Friedrich-Alexander-Universität Erlangen-Nürnberg

In order to describe a structured region of memory, the routines in the MPI standard use a (count, datatype) pair. The C specification for this convention uses an int type for the count. Since C int types are nearly always 32 bits large and signed, counting more than 231 elements poses a challenge. Instead of changing the existing MPI routines, and all consumers of those routines, the MPI Forum asserts that users can build up large datatypes from smaller types. To evaluate this hypothesis and to provide a user-friendly solution to the large-count issue, we have developed BigMPI, a library on top of MPI that maps large-count MPI-like functions to MPI-3 standard features. BigMPI demonstrates a way to perform such a construction, reveals shortcomings of the MPI standard, and uncovers bugs in MPI implementations.

关键词： Vectors Standards Libraries Optimization Context Memory management Open area test sites

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Beacon: Exploring the Deployment and Application of Intel Xeon Phi Coprocessors for Scientific computing

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computing in Science & Engineering 2015年第2期17卷 1-1页

作者： R. Glenn Brook Alexander Heinecke Anthony B. Costa Paul Peltz Vincent C. Betro Troy Baer Michael Bader Pradeep Dubey University of Tennessee Knoxville Intel's Parallel Computing Lab Mount Sinai's Icahn School of Medicine at Mount Sinai Technische Universität München

The Beacon Project is exploring the impact of the Intel Xeon Phi coprocessor on scientific supercomputing for a wide variety of computational science and engineering applications.

关键词： Random access memory Coprocessors Scientific computing High performance computing Electrostatics Computer architecture Supercomputers

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Anatomy of High-Performance Many-Threaded Matrix Multiplication

Anatomy of High-Performance Many-Threaded Matrix Multiplicat...

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IEEE International parallel and Distributed Processing Symposium

作者： Tyler M. Smith Robert van de Geijn Mikhail Smelyanskiy Jeff R. Hammond Field G. Van Zee Institute for Computational Engineering and Sciences and Department of Computer Science The University of Texas at Austin Parallel Computing Lab Intel Corporation Leadership Computing Facility Argonne National Lab

ISBN: (纸本)9781479938018

BLIS is a new framework for rapid instantiation of the BLAS. We describe how BLIS extends the "GotoBLAS approach" to implementing matrix multiplication (GEMM). While GEMM was previously implemented as three loops around an inner kernel, BLIS exposes two additional loops within that inner kernel, casting the computation in terms of the BLIS micro-kernel so that porting GEMM becomes a matter of customizing this micro-kernel for a given architecture. We discuss how this facilitates a finer level of parallelism that greatly simplifies the multithreading of GEMM as well as additional opportunities for parallelizing multiple loops. Specifically, we show that with the advent of many-core architectures such as the IBM PowerPC A2 processor (used by Blue Gene/Q) and the Intel Xeon Phi processor, parallelizing both within and around the inner kernel, as the BLIS approach supports, is not only convenient, but also necessary for scalability. The resulting implementations deliver what we believe to be the best open source performance for these architectures, achieving both impressive performance and excellent scalability.

关键词： Linear algebra Libraries High-performance Matrix BLAS Multicore

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Delayed Difference Scheme for Large Scale Scientific Simulations

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Physical Review Letters 2014年第21期113卷 218701-218701页

作者： Dheevatsa Mudigere Sunil D. Sherlekar Santosh Ansumali Parallel Computing Lab Intel Labs Bangalore 560103 India Engineering Mechanics Unit Jawaharlal Nehru Centre for Advanced Scientific Research Jakkur Bangalore 560064 India

We argue that the current heterogeneous computing environment mimics a complex nonlinear system which needs to borrow the concept of time-scale separation and the delayed difference approach from statistical mechanics and nonlinear dynamics. We show that by replacing the usual difference equations approach by a delayed difference equations approach, the sequential fraction of many scientific computing algorithms can be substantially reduced. We also provide a comprehensive theoretical analysis to establish that the error and stability of our scheme is of the same order as existing schemes for a large, well-characterized class of problems.

关键词： HETEROGENEOUS computing COMPUTER algorithms NONLINEAR dynamical systems STATISTICAL mechanics DIFFERENCE equations

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CLSIFT: An optimization study of the scale invariance feature transform on GPUs

CLSIFT: An optimization study of the scale invariance featur...

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15th IEEE International Conference on High Performance computing and Communications, HPCC 2013 and 11th IEEE/IFIP International Conference on Embedded and Ubiquitous computing, EUC 2013

作者： Wang, Weiyan Zhang, Yunquan Guoping, Long Yan, Shengen Jia, Haipeng Lab. of Parallel Software and Computational Science Institute of Software Chinese Academy of Sciences China State Key Laboratory of Computing Science Institute of Software Chinese Academy of Sciences China School of Computer and Control Engineering University of Chinese Academy of Sciences Beijing China

ISBN: (纸本)9780769550886

Scale Invariance Feature Transform (SIFT) is quite suitable for image matching because of its invariance to image scaling, rotation and slight changes in illumination or viewpoint. However, due to high computation complexity it's technically challenging to deploy SIFT in real time application situations. To address this problem, we propose CLSIFT, an OpenCL based highly speeded up and performance portable SIFT solution. Important optimization techniques employed in CLSIFT such as: (1) For less global memory traffic, independent logical functions are merged into the same kernel to reuse data.(2) loop buffers are introduced in for data and intermediate results reusing.(3)Task queue used to schedule threads in the same branch to remove branch divergences. (4) Data partition is based on the statics patterns for workload balance among workgroups. (5) Overlap of CPU time and better parallel strategies are used too. With all mentioned efforts, CLSIFT processes lena. jpg at 74.2 FPS and 43.4FPS respectively on NVidia and AMD GPUS, much higher than CPU's nearly 10 FPS and the known fastest SIFTGPU's 39.8 FPS and 13FPS. Moreover in a quantitative comparison approach we analyze those successful strategies beating SIFTGPU, a famous existing GPU implementation. Additionally, we observe and conclude that NVidia GPU achieves better occupancy and performance due to some factors. Finally, we summarize some techniques and empirical guiding principles that may be shared by other applications on GPU. © 2013 IEEE.

关键词： Graphics processing unit

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Versatile and scalable parallel histogram construction

Versatile and scalable parallel histogram construction

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International Conference on parallel Architecture and Compilation Techniques (PACT)

作者： Wookeun Jung Jongsoo Park Jaejin Lee Department of Computer Science and Engineering Seoul National University Seoul Korea Intel Corporation Parallel Computing Lab California USA

ISBN: (纸本)9781509066070

Histograms are used in various fields to quickly profile the distribution of a large amount of data. However, it is challenging to efficiently utilize abundant parallel resources in modern processors for histogram construction. To make matters worse, the most efficient implementation varies depending on input parameters (e.g., input distribution, number of bins, and data type) or architecture parameters (e.g., cache capacity and SIMD width). This paper presents versatile histogram methods that achiev competitive performance across a wide range of input types and target architectures. Our open source implementations are highly optimized for various cases and are scalable for more threads and wider SIMD units. We also show that histogram construction can be significantly accelerated by Intel ® Xeon Phi coprocessors for common input data sets because of their compute power from many cores and instructions for efficient vectorization, such as gather-scatter. For histograms with 256 fixed-width bins, a dual-socket 8-core Intel ® Xeon ® E5-2690 achieves 13 billion bin updates per second (GUPS), while a 60-core Intel ® Xeon Phi 5110P coprocessor achieves 18 GUPS for a skewed input. For histograms with 256 variable-width bins, the Xeon processor achieves 4.7 GUPS, while the Xeon Phi coprocessor achieves 9.7 GUPS for a skewed input. For text histogram, or word count, the Xeon processor achieves 342.4 million words per seconds (MWPS). This is 4.12×, 3.46× faster than PHOENIX and TBB. The Xeon phi processor achieves 401.4 MWPS, which is 1.17× faster than the Xeon processor. Since histogram construction captures essential characteristics of more general reduction-heavy operations, our approach can be extended to other settings.

关键词： Histograms Instruction sets Computer architecture Hardware parallel processing Coprocessors

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parallel Mutual Information Based Construction of Whole-Genome Networks on the Intel (R) Xeon Phi (TM) Coprocessor

Parallel Mutual Information Based Construction of Whole-Geno...

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International Symposium on parallel and Distributed Processing (IPDPS)

作者： Sanchit Misra Kiran Pamnany Srinivas Aluru Parallel Computing Lab Intel Corporation Bangalore India School of Computational Science and Engineering Georgia Institute of Technology Atlanta USA

Construction of whole-genome networks from large-scale gene expression data is an important problem in systems biology. While several techniques have been developed, most cannot handle network reconstruction at the whole-genome scale, and the few that can, require large clusters. In this paper, we present a solution on the Intel (R) Xeon Phi (TM) coprocessor, taking advantage of its multi-level parallelism including many x86-based cores, multiple threads per core, and vector processing units. We also present a solution on the Intel (R) Xeon (R) processor. Our solution is based on TINGe, a fast parallel network reconstruction technique that uses mutual information and permutation testing for assessing statistical significance. We demonstrate the first ever inference of a plant whole genome regulatory network on a single chip by constructing a 15,575 gene network of the plant Arabidopsis thaliana from 3,137 microarray experiments in only 22 minutes. In addition, our optimization for parallelizing mutual information computation on the Intel Xeon Phi coprocessor holds out lessons that are applicable to other domains.

关键词： Vectors Joints Coprocessors Mutual information Optimization Splines (mathematics) Arrays

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