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International Symposium on parallel and Distributed Processing (IPDPS)

作者： H. Ammari H. El-Rewini Mobile Computing and Parallel Processing Laboratory Computer Science and Engineering Department School of Engineering Southern Methodist University Dallas TX USA Mobile Computing and Parallel Processing Lab Computer Science and Engineering Department School of Engineering Southern Methodist University Dallas TX USA

Summary form only given. Mobile ad hoc networks (MANET) and the Internet exhibit differences in their network architecture. These differences concern the various sorts of assumptions imposed not only on the structure and topology of the underlying networks, but also on communication patterns of mobile nodes in both networks. Integrating MANET and the Internet into a hybrid network is a challenging problem due to these differences. We propose a three-layer approach that uses both mobile IP and dynamic destination-sequenced distance vector (DSDV) to integrate these two types of networks into a hybrid environment, in order to provide MANET nodes with Internet connectivity and access to the Internet resources. Our approach is based on the use of mobile gateways as an interface between MANET and the Internet. These mobile gateways can use mobile IP when they communicate with the Internet and DSDV when they interact with MANET. We also show the results of several simulation experiments that were conducted to study the integrated environment.

关键词： Mobile ad hoc networks IP networks Internet Mobile computing Computer networks Mobile communication Routing protocols Concurrent computing parallel processing Computer science

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Enabling factor analysis on thousand-subject neuroimaging datasets

Enabling factor analysis on thousand-subject neuroimaging da...

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IEEE International Conference on Big Data

作者： Michael J. Anderson Mihai Capota Javier S. Turek Xia Zhu Theodore L. Willke Yida Wang Po-Hsuan Chen Jeremy R. Manning Peter J. Ramadge Kenneth A. Norman Parallel Computing Lab Intel Corporation Hillsboro Oregon Princeton University Princeton New Jersey Dartmouth College Hanover New Hampshire

ISBN: (纸本)9781467390064

The scale of functional magnetic resonance image data is rapidly increasing as large multi-subject datasets are becoming widely available and high-resolution scanners are adopted. The inherent low-dimensionality of the information in this data has led neuroscientists to consider factor analysis methods to extract and analyze the underlying brain activity. In this work, we consider two recent multi-subject factor analysis methods: the Shared Response Model and the Hierarchical Topographic Factor Analysis. We perform analytical, algorithmic, and code optimization to enable multi-node parallel implementations to scale. Single-node improvements result in 99χ and 2062x speedups on the two methods, and enables the processing of larger datasets. Our distributed implementations show strong scaling of 3.3x and 5.5χ respectively with 20 nodes on real datasets. We demonstrate weak scaling on a synthetic dataset with 1024 subjects, equivalent in size to the biggest fMRI dataset collected until now, on up to 1024 nodes and 32,768 cores.

关键词： Optimization Computational modeling Neuroimaging Brain modeling Algorithm design and analysis Data models

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Further results on stability of asynchronous discrete-time linear systems

Further results on stability of asynchronous discrete-time l...

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IEEE Conference on Decision and Control

作者： Y.-F. Su A. Bhaya E. Kaszkurewicz V.S. Kozyakin Lab for Parallel Computing Federal University of Rio de Janeiro (COPPE-EE) Brazil Institute of Information Transmission Problems Moscow Region Russia

Focuses on the stability problem of discrete-time asynchronous linear systems, which can be viewed as linear systems with time-varying delays. Within this context, a stronger version of the necessity part of the class... 详细信息

关键词： Linear systems Delay effects Delay systems Time varying systems Terminology Equations Concurrent computing parallel processing Stability criteria Control systems

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Hierarchical block sparse neural networks

arXiv

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arXiv 2018年

作者： Vooturi, Dharma Teja Mudigere, Dheevatsa Avancha, Sashikanth Center for Security Theory and Algorithmic Research International Institute of Information Technology - Hyderabad Hyderabad India Parallel Computing Lab Intel Labs India

Sparse deep neural networks(DNNs) are efficient in both memory and compute when compared to dense DNNs. But due to irregularity in computation of sparse DNNs, their efficiencies are much lower than that of dense DNNs on regular parallel hardware such as TPU. This inefficiency leads to poor/no performance benefits for sparse DNNs. Performance issue for sparse DNNs can be alleviated by bringing structure to the sparsity and leveraging it for improving runtime efficiency. But such structural constraints often lead to suboptimal accuracies. In this work, we jointly address both accuracy and performance of sparse DNNs using our proposed class of sparse neural networks called HBsNN (Hierarchical Block sparse Neural Networks). For a given sparsity, HBsNN models achieve better runtime performance than unstructured sparse models and better accuracy than highly structured sparse models. Copyright © 2018, The Authors. All rights reserved.

关键词： Deep neural networks

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Data-Oriented Runtime Scheduling Framework on Multi-GPUs

Data-Oriented Runtime Scheduling Framework on Multi-GPUs

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IEEE International Conference on Trust, Security and Privacy in computing and Communications

作者： Tao Li Kezhao Zhao Qiankun Dong Jiabing Leng Yulu Yang Wenjing Ma College of Computer and Control Engineering Nankai University Lab of Parallel Software and Computing Science State Key Lab of Computer Science Institute of Software Chinese Academy of Sciences

ISBN: (纸本)9781509032068

GPU has been generally accepted as an efficient accelerator in the field of high performance computing (HPC). On some heterogeneous systems, multiple GPUs are installed on each computing node. To make things more complicated, these GPUs may even have different architectures. Therefore, it is a challenge to efficiently schedule tasks and data on heterogeneous system. In this paper, we present DoSFoG, a data-oriented runtime scheduling framework on heterogeneous system equipped with multiple GPUs. In DoSFoG, the data blocks, instead of tasks, are taken as the scheduling units. It uses a data-oriented directed acyclic graph (DoDAG) as representation of an application, which is proved to be equivalence to task DAG. Based on DoDAG, a runtime scheduling framework is designed. Besides, a hierarchical storage structure is carefully designed based on the various levels of memory in the system. Page-locked memory and soft cache on GPU device memory are used to improve the data transfer. DoSFoG is evaluated with different applications on a system equipped with different GPUs. The results show that DoSFoG can achieve high data locality, scalability, load balance and performance improvement for large size of data.

关键词： task scheduling GPU Heterogeneous system Data-oriented DAG

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Extreme scale de novo metagenome assembly

arXiv

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arXiv 2018年

作者： Georganas, Evangelos Egan, Rob Hofmeyr, Steven Goltsman, Eugene Arndt, Bill Tritt, Andrew Buluç, Aydın Oliker, Leonid Yelick, Katherine Parallel Computing Lab Intel Corp Computational Research Division Joint Genome Institute Lawrence Berkeley National Laboratory United States National Energy Research Scientific Computing Center United States

Metagenome assembly is the process of transforming a set of short, overlapping, and potentially erroneous DNA segments from environmental samples into the accurate representation of the underlying microbiomes's genomes. State-of-the-art tools require big shared memory machines and cannot handle contemporary metagenome datasets that exceed Terabytes in size. In this paper, we introduce the MetaHipMer pipeline, a high-quality and high-performance metagenome assembler that employs an iterative de Bruijn graph approach. MetaHipMer leverages a specialized scaffolding algorithm that produces long scaffolds and accommodates the idiosyncrasies of metagenomes. MetaHipMer is end-to-end parallelized using the Unified parallel C language and therefore can run seamlessly on shared and distributed-memory systems. Experimental results show that MetaHipMer matches or outperforms the state-of-the-art tools in terms of accuracy. Moreover, MetaHipMer scales efficiently to large concurrencies and is able to assemble previously intractable grand challenge metagenomes. We demonstrate the unprecedented capability of MetaHipMer by computing the first full assembly of the Twitchell Wetlands dataset, consisting of 7.5 billion reads - size 2.6 TBytes. Copyright © 2018, The Authors. All rights reserved.

关键词： Scaffolds

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Design Space Exploration for a Co-designed Accelerator Supporting Homomorphic Encryption

Design Space Exploration for a Co-designed Accelerator Suppo...

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International Conference on Control Systems and Computer Science (CSCS)

作者： Ghada Abozaid Ahmed El-Mahdy Parallel Computing Lab. Egypt-Japan University of Science and Technology (E-JUST) Alexandria Egypt (on-Leave) Faculty of Engineering Alexandria University Egypt

Fully Homomorphic Encryption is currently a sound theoretical approach for cloud security, it is currently not practically used due to the tremendous computation requirements of multiplying very large, million-bit, operands. In this paper, we explore the design space of software/hardware (SW/HW) co-designed accelerator relying on integrating fast software multiplication algorithms with a configurable hardware multiplier. The multiplier is based on a modified serial-parallel multiplier design, in which School-Book is a special case. The paper conducts an analytic performance study, exploring key design space parameters as well as comparing with other design approaches in the literature. Based on an actual FPGA implementation, we estimate a power consumption of 10, Watt, and area-time-power of 20.20 billion transistor-sec-Watt, potentially allowing for promising scalability.

关键词： Hardware Software Software algorithms Algorithm design and analysis parallel processing Space exploration Mathematical model

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Improving Communication Performance and Scalability of Native Applications on Intel Xeon Phi Coprocessor Clusters

Improving Communication Performance and Scalability of Nativ...

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International Symposium on parallel and Distributed Processing (IPDPS)

作者： Karthikeyan Vaidyanathan Kiran Pamnany Dhiraj D. Kalamkar Alexander Heinecke Mikhail Smelyanskiy Jongsoo Park Daehyun Kim Aniruddha Shet G. Bharat Kaul Balint Joo Pradeep Dubey Parallel Computing Lab Intel Corporation Bangalore India Department of Informatics Technische Universitiit Miinchen Munich Germany Intel Corp Santa Clara CA US Parallel Computing Lab Intel Corporation Santa Clara CA U.S.A Thomas Jefferson National Accelerator Facility Newport News VA U.S.A

ISBN: (纸本)9781479938018

Intel Xeon Phi coprocessor-based clusters offer high compute and memory performance for parallel workloads and also support direct network access. Many real world applications are significantly impacted by network characteristics and to maximize the performance of such applications on these clusters, it is particularly important to effectively saturate network bandwidth and/or hide communications latency. We demonstrate how to do so using techniques such as pipelined DMAs for data transfer, dynamic chunk sizing, and better asynchronous progress. We also show a method for, and the impact of avoiding serialization and maximizing parallelism during application communication phases. Additionally, we apply application optimizations focused on balancing computation and communication in order to hide communication latency and improve utilization of cores and of network bandwidth. We demonstrate the impact of our techniques on three well known and highly optimized HPC kernels running natively on the Intel Xeon Phi coprocessor. For the Wilson-Dslash operator from Lattice QCD, we characterize the improvements from each of our optimizations for communication performance, apply our method for maximizing concurrency during communication phases, and show an overall 48% improvement from our previously best published result. For HPL/LINPACK, we show 68.5% efficiency with 97 TFLOPs on 128 Intel Xeon Phi coprocessors, the first ever reported native HPL efficiency on a coprocessor-based supercomputer. For FFT, we show 10.8 TFLOPs using 1024 Intel Xeon Phi coprocessors on the TACC Stampede cluster, the highest reported performance on any Intel Architecture-based cluster and the first such result to be reported on a coprocessor-based supercomputer.

关键词： Message systems Coprocessors Bandwidth Lattices Optimization parallel processing Kernel

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DMSA: Decentralized and Multi-keyword Selective Data Sharing and Acquisition

DMSA: Decentralized and Multi-keyword Selective Data Sharing...

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International Symposium on parallel and Distributed Processing with Applications, ISPA

作者： Moheng Lin Peichang Shi Xiang Fu Feng Jiang Guodong Yi National Key Laboratory of Parallel and Distributed Computing College of Computer Science National University of Defense Technology Changsha China Xiangjiang Lab Changsha China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

Blockchain technology has been extensively uti-lized in decentralized data-sharing applications, with the immutability of blockchain providing a witness for the circulation of data. However, current blockchain data-sharing solutions still fail to address the simultaneous screening needs of both the sender and receiver with multi-keywords. Without the capability to support bilateral simultaneous filtering, the disclosure of reasons for matching failures could inadvertently expose sensitive user data. Therefore, the challenge lies in enabling ciphertexts with multiple keywords and receivers with multiple interests to achieve mutual and simultaneous matching. Based on the technical foundations of SE (Searchable Encryption), MABE (Multi-Attribute Based Encryption), and polynomial fitting, this paper proposes a scheme called DMSA (Decentralized and Multi-keyword selective Sharing and selective Acquisition). This scheme can satisfy soundness, enabling ciphertexts carrying multiple keywords and receivers representing multiple interests to match each other simultaneously. We conducted a security analysis that confirms the security of DMSA against chosen-plaintext attacks. Our experimental results demonstrate a significant efficiency improvement, with a 67% increase over single-keyword data-sharing schemes and a 16% enhancement compared to the existing multi-keyword data-sharing solution.

关键词： Distributed processing Filtering Data security Keyword search Fitting Receivers Polynomials Data models Blockchains Encryption

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Secure object tracking protocol for Networked RFID Systems

Secure object tracking protocol for Networked RFID Systems

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ACIS International Conference on Software Engineering, Artificial Intelligence, Networking, and parallel/Distributed computing (SNPD)

作者： Biplob Ray Morshed Howdhury Jemal Abawajy Monika Jesmin Parallel and Distributed Computing Lab School of Information Technology Deakin University Melbourne Australia Lincoln University College Petaling Jaya Selangor Darul Ehsan Malaysia

Networked systems have adapted Radio Frequency identification technology (RFID) to automate their business process. The Networked RFID Systems (NRS) has some unique characteristics which raise new privacy and security concerns for organizations and their NRS systems. The businesses are always having new realization of business needs using NRS. One of the most recent business realization of NRS implementation on large scale distributed systems (such as Internet of Things (IoT), supply chain) is to ensure visibility and traceability of the object throughout the chain. However, this requires assurance of security and privacy to ensure lawful business operation. In this paper, we are proposing a secure tracker protocol that will ensure not only visibility and traceability of the object but also genuineness of the object and its travel path on-site. The proposed protocol is using Physically Unclonable Function (PUF), Diffie-Hellman algorithm and simple cryptographic primitives to protect privacy of the partners, injection of fake objects, non-repudiation, and unclonability. The tag only performs a simple mathematical computation (such as combination, PUF and division) that makes the proposed protocol suitable to passive tags. To verify our security claims, we performed experiment on Security Protocol Description Language (SPDL) model of the proposed protocol using automated claim verification tool Scyther. Our experiment not only verified our claims but also helped us to eliminate possible attacks identified by Scyther.

关键词： Protocols Security Mathematical model Radiofrequency identification Supply chains Privacy

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