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检索条件"机构=Parallel Distributed Processing Laboratory"

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Performance analysis of overheads for matrix - Vector multiplication in cluster environment

引用

10th Panhellenic Conference on Informatics, PCI 2005

作者： Michailidis, Panagiotis D. Stefanidis, Vasilis Margaritis, Konstantinos G. Parallel and Distributed Processing Laboratory Department of Applied Informatics University of Macedonia 156 Egnatia Str. 54006 Thessaloniki Greece

ISBN: (纸本)3540296735

This paper presents the basic parallel implementation and a variation for matrix - vector multiplication. We evaluated and compared the performance of the two implementations on a cluster of workstations using Message Passing Interface (MPI) library. The experimental results demonstrate that the basic implementation achieves lower performance than the other variation. Further, we analyzed the several classes of overheads contribute to lowered performance of the basic implementation. These analyses have identified cost of reading of data from disk and communication cost as the primary factors affecting performance of the basic parallel matrix - vector implementation. Finally, we present a performance model for estimating the performance of two proposed matrix - vector implementations on a cluster of heterogeneous workstations. © Springer-Verlag Berlin Heidelberg 2005.

关键词： Matrix algebra

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ARV-based Array Grouping and Data Distribution in OpenMP/JIAJIA

ARV-based Array Grouping and Data Distribution in OpenMP/JIA...

引用

IEEE International Conference on parallel and distributed Computing, Applications and Technologies (PDCAT)

作者： Zeng Lifang Yang Xuejun H. Huangchun National Laboratory for Parallel and Distributed Processing China

In order to improve the performance of applications on OpenMP/JIAJIA, we present a new abstraction, Array Relation Vector (ARV), to describe the relation between the data elements of two consistent shared arrays accessed in one computation phase. Based on ARV, we use array grouping to eliminate the pseudo data distributing of small shared data and improve the page locality. Experimental results show that ARV-based array grouping can greatly improve the performance of applications with non-continuous data access and strict access affinity on OpenMP/JIAJIA cluster. For applications with small shared arrays, array grouping can improve the performance obviously when the processor number is small.

关键词： Phased arrays Concurrent computing distributed computing Application software Laboratories distributed processing parallel programming parallel architectures Programming profession Emulation

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An efficient distributed algorithm for constructing delay- and degree-bounded application-level multicast tree

An efficient distributed algorithm for constructing delay- a...

引用

8th International Symposium on parallel Architectures, Algorithms and Networks, I-SPAN 2005

作者： Feng, Liu Jingshu, Huang Xicheng, Lu Yuxing, Peng National Laboratory for Parallel and Distributed Processing Changsha 410073 China School of Electrical and Computer Engineering Purdue University West Lafayette IN 47907-2035 United States

ISBN: (纸本)0769525091

In this paper we investigate the problem of finding a delay- and degree-bounded maximum sum of nodes application level multicast tree. We then proved the problem is NP-hard, and its relationship with the well-studied degree-bounded minimum maximum-delay multicast tree problem. We propose a distributed algorithm - OverStream, which adopts PPAF heuristic for father node to choose optimal child nodes based on multiple network parameters. Simulation results show that our algorithm is better than OMNI, SpreadIt, HMTP, and Zigzag in general. © 2005 IEEE.

关键词： Algorithms

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Reduction transformations for optimization parameter selection

Reduction transformations for optimization parameter selecti...

引用

International Conference on High Performance Computing in the Asia-Pacific Region

作者： Yonggang Che Zhenghua Wang Xiaomei Li National Laboratory for Parallel and Distributed Processing Changsha China

Program performance optimization often involves choosing right parameters to minimize the program's runtime. Selecting optimization parameters by means of execution-driven search is guaranteed to find excellent results, for it accurately accounts for all performance components of the target platform. But the major drawback of execution-driven approach is the excessive compilation time due to thousands of runs of the original program. In this article, we propose a novel technique called program reduction transformations to reduce the cost of execution-driven optimization parameter selection. It is based on our observation to the characteristics of the scientific applications and the optimization parameter selection task. The ideal is to transform the program before it is used in execution-driven parameter selection procedure. The transformed program runs in much shorter time but preserves the parameter selection quality. This technique greatly reduces the time spent on evaluating each candidate parameter and makes execution-driven optimization parameter selection affordable. We formulate the theoretic foundation of program reduction transformation. And we find several situations where reduction transformations can be legally applied. These situations are common in scientific applications. Experiments done for two math kernels and three SPEC benchmarks show that our approach is both feasible and effective

关键词： Tiles Runtime Cost function Predictive models Hardware distributed processing Kernel Optimization methods parallel processing Data analysis

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Verification of C programs using slicing execution

Verification of C programs using slicing execution

引用

International Conference on Quality Software

作者： Xiaodong Yi Ji Wang Xuejun Yang National Laboratory for Parallel and Distributed Processing Changsha China

The paper presents a novel method, namely slicing execution, to verify C programs with respect to temporal safety properties. The distinguished feature is that it only simulates the execution of the relevant statements under abstraction criteria and checks the properties on the fly. The abstraction criterion begins with a proper initial set of program variables and may be iteratively refined according to spurious counter-examples. Provided that the properties to be verified usually involve only a few variables in practical programs, slicing execution may have the same precision as path-sensitive simulation with the cost close to standard flow-sensitive dataflow analysis. The presented method has been used to verify the initial handshake process of SSL protocol based on the C source code of openssl-0.9.6c. The experiment results confirm our claim and show that slicing execution is not only practical but also effective.

关键词： Safety Scalability Costs Data analysis Analytical models Protocols Laboratories distributed processing Guidelines Performance analysis

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Revised stride data value predictor design

Revised stride data value predictor design

引用

International Conference on High Performance Computing in the Asia-Pacific Region

作者： Xiao Yong Yang Yanping Zhou Xingming National Laboratory for Parallel and Distributed Processing Changsha China

Stride data value predictor is widely used by researchers in data value prediction study. Compared with context-based hybrid data value predictors, stride data value predictors are simple. But when encountering non-stride repeated sequences, a stride value predictor does not perform as well as a context-based hybrid data value predictor. In this paper, a revised stride data value predictor is introduced. With a little augment to a traditional stride data value predictor, the new predictor can make correct predictions on some patterns that can only be done by the context-based data value predictors. Simulation results show that the new predictor works well with most value predictable instructions. Design decisions such as predictor size, confidence mechanism and storing partial tag are analyzed

关键词： Predictive models History Counting circuits Laboratories distributed processing Costs Bandwidth

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64-bit floating-point FPGA matrix multiplication 05

64-bit floating-point FPGA matrix multiplication

引用

ACM/SIGDA Thirteenth ACM International Symposium on Field Programmable Gate Arrays - FPGA 2005

作者： Dou, Yong Vassiliadis, S. Kuzmanov, G.K. Gaydadjiev, G.N. National Laboratory for Parallel and Distributed Processing Changsha 410073 China Computer Engineering EEMCS TU Delft P.O. Box 5031 2600 GA Delft Netherlands

ISBN: (纸本)9781595930293

We introduce a 64-bit ANSI/IEEE Std 754-1985 floating point design of a hardware matrix multiplier optimized for FPGA implementations. A general block matrix multiplication algorithm, applicable for an arbitrary matrix size is proposed. The algorithm potentially enables optimum performance by exploiting the data locality and reusability incurred by the general matrix multiplication scheme and considering the limitations of the I/O bandwidth and the local storage volume. We implement a scalable linear array of processing elements (PE) supporting the proposed algorithm in the Xilinx Virtex II Pro technology. Synthesis results confirm a superior performance-area ratio compared to related recent works. Assuming the same FPGA chip, the same amount of local memory, and the same I/O bandwidth, our design outperforms related proposals by at least 1.7X and up to 18X consuming the least reconfigurable resources. A total of 39 PEs can be integrated into the xc2vp125-7 FPGA, reaching performance of, e.g., 15.6 GFLOPS with 1600 KB local memory and 400 MB/s external memory bandwidth. Copyright 2005 ACM.

关键词： Field programmable gate arrays

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Towards an agent oriented programming language with caste and scenario mechanisms

Towards an agent oriented programming language with caste an...

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4th International Conference on Autonomous Agents and Multi agent Systems, AAMAS 05

作者： Wang, Ji Shen, Rui Zhu, Hong National Laboratory for Parallel and Distributed Processing Changsha 410073 China Department of Computing Oxford Brookes University Oxford OX33 1HX United Kingdom

The paper presents an agent-oriented programming language SLABSp. It provides caste and scenario mechanisms in a coherent way to support the caste-centric methodology of agent-oriented software development. It uses caste as a modular facility to organize agents into castes and to represent their structure and behavior characteristics. SLABSp also uses scenarios to define agents' behaviors in the context of environment situations. In the paper, the implementation of the language is briefly described. An example of the program is given to illustrate its programming style. Copyright 2005 ACM.

关键词： Computer programming languages

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An optimized method for automatic test oracle generation from real-time specification

An optimized method for automatic test oracle generation fro...

引用

IEEE International Conference on Engineering of Complex Computer Systems

作者： Xin Wang Zhi-Chang Qi Shuhao Li National Laboratory for Parallel and Distributed Processing Changsha China National Lab. for Parallel & Distributed Process. Changsha China

Test oracles are widely used to verify whether a system under test is running as desired. Since the correctness of real-time systems depends on the logical results of the computation and the time when results are produced at the same time, an optimized model checking-based method for test oracles generation is proposed to check if the system traces satisfy their real-time specifications at run time. Inspired by the idea of real-time model checking, the test oracles can be automatically generated from their specifications in the real-time logic MITL/sub [o,d]/ in a simpler way and modelled by a variant of the timed automata. Assertions are chosen to acquire the traces of real-time systems. A case study is presented to demonstrate the usefulness of the method proposed in this paper.

关键词： Optimization methods Automatic testing Real time systems System testing Software testing Laboratories Logic testing Automata Aerospace testing distributed processing

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A programmable array processor architecture for flexible approximate string matching algorithms

A programmable array processor architecture for flexible app...

引用

International Conference on parallel processing Workshops (ICPPW)

作者： P.D. Michailidis K.G. Margaritis Parallel and Distributed Processing Laboratory Department of Applied Informatics University of Macedonia Thessaloniki Greece

This paper proposes a generic programmable array processor architecture for a wide variety of approximate string matching algorithms. Further, we describe the architecture of the array and the architecture of the cell in detail in order to efficiently implement for both the preprocessing and searching phases of most string matching algorithms. Further, the architecture performs approximate string matching for complex patterns that contain don't care, complement and classes symbols. Our architecture maximizes the strength of VLSI in terms of intensive and pipelined computing and yet circumvents the limitation on communication. It may be adopted as a basic structure for a universal flexible string matcher engine.

关键词： Pattern matching Very large scale integration Phased arrays Computer architecture Hamming distance parallel processing Field programmable gate arrays distributed processing Laboratories Informatics

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