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IEEE International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom)

作者： Huaimin Wang National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

Internet fundamentally changes the model of software development, the demands of software quality, and the process of software resource sharing. Internet- based environment for trustworthy software production is recognized as a key topic of software engineering in both academic and software industry. In this paper, the concepts and models of trustworthy software are introduced which dominate the design of Trustie environment. Trustie provides trustworthy software components sharing by an evolving software repository, and provides collaborative software development in a customizable development platform powered by a software production line framework. Finally the layered practices of research and application based on Trustie preliminarily demonstrate the effectiveness as well as the promising future of this environment.

关键词： Software Production Collaboration Internet Resource management Software engineering Programming

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Error Detection by Redundant Transaction in Transactional Memory System

Error Detection by Redundant Transaction in Transactional Me...

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International Conference on Networking, Architecture, and Storage (NAS)

作者： Wei Song Jia Jia Yu-xing Peng National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

This paper addresses the issue of error detection in transactional memory, and proposes a new method of error detection based on redundant transaction (EDRT). This method creates a transaction copy for every transaction, and executes both original transactions and transaction copies on adequate processor cores, and achieves error detection by comparing the execution results. EDRT utilizes the data-versioning mechanism of transactional memory to achieve the acquisition of an approximate minimum error detection comparing data set, and the acquisition is transparent and online. At last, this paper validates the EDRT through 5 test programs, including 4 SPLASH-2 benchmarks. The experimental results show that, the average error detecting cost is about 3.68% relative to the whole program, and it's only about 12.07% relative to the transaction parts of the program.

关键词： Instruction sets Fault tolerant systems Hardware Computer architecture Redundancy

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Understanding How Non-uniform Distribution of Memory Accesses on Cache Sets Affects the System Performance of Chip Multiprocessors

Understanding How Non-uniform Distribution of Memory Accesse...

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IEEE International Symposium on parallel and distributed processing with Applications Workshops (ISPAW)

作者： Xiaomin Jia Jiang Jiang Xiaoqiang Ni Tianlei Zhao Shubo Qi Guitao Fu Minxuan Zhang National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

Non-uniform distribution of memory accesses across cache sets has been recognized as one of the sources of inefficiency of cache architecture on single-core platform. Several schemes target the problem for performance boost. As chip multiprocessors (CMPs) pick up steam as the mainstream processor design choice, how non-uniform distribution of memory accesses across cache sets affects the cache management of CMPs is becoming an open question. We address the question by presenting several cache management schemes on CMP platforms, aiming at balance the memory access distribution across cache sets on shared caches or private caches. We show that on CMP platforms with multi-programmed workloads: (a) for shared caches, the non-uniform memory access distribution across different cache sets is biased by the fact that multiple applications are running concurrently and sharing the cache capacity. The scheme, which we put forward to make use of the non-uniformity to improve performance on shared caches, is proved to be of little to no benefit or even lead to degradation, (b) for caches that are organized as private caches, direct adaption of a scheme that targets this kind of non-uniformity outperforms the baseline private cache design by 2% on average, (c) however, for a private cache based cache management scheme we proposed, further effort to take advantage of this kind of non-uniformity for performance boost (on top of our proposed scheme) is also proved to be of little to no benefit. Therefore, We draw to the conclusion that on CMP platforms with multiprogrammed workloads, the non-uniform distribution of memory accesses across cache sets is partially circumvented by the interactions between multiple applications. Efforts seeking to make use of the non-uniformity to derive more benefit may end up in vain in CMPs.

关键词： Benchmark testing Throughput Arrays Hidden Markov models Indexes Memory management Protocols

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Research on Online Failure Prediction Model and Status Pretreatment Method for Exascale System

Research on Online Failure Prediction Model and Status Pretr...

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International Conference on Cyber-Enabled distributed Computing and Knowledge Discovery, CyberC

作者： Hao Zhou Yanhuang Jiang National Laboratory of Parallel and Distributed Processing College of Computer Science National University of Defense Technology Changsha China

The reliability issue of Exascale system is extremely serious. Traditional passive fault-tolerant methods, such as rollback-recovery, can not fully guarantee system reliability any more because of their large executing overhead and long recovering duration. Active fault tolerance is expected to become another important fault-tolerant approach for Exascale system. Focusing on system failure prediction, which is one key step of active fault tolerance, we construct online failure prediction model and research on the effective method of system status pretreatment. In order to improve the accuracy and real-time feature of current methods, the proposed Improved Adaptive Semantic Filter (IASF) method processes the latest system logs regularly, filtering useless information out of them according to their semantics. Adopting the main idea of Vector Space Model (VSM), IASF method creates Event Vector corresponding to each log record. By calculating the cosine of vectorial angle, it evaluates the semantics correlation between different log records, and then executes temporal and spatial redundant filter considering the burst feature of log records. IASF method is insensitive to the type of system log and does not introduce any expert system or domain knowledge. The experiment result shows that system can eliminate about 99.6% of useless log records after executing IASF method.

关键词： Fault tolerance Fault tolerant systems Vectors Correlation Information filters Predictive models

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Coordinate strip-mining and kernel fusion to lower power consumption on GPU

Coordinate strip-mining and kernel fusion to lower power con...

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Design, Automation and Test in Europe Conference and Exhibition

作者： Guibin Wang National Laboratory of Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha Hunan China

ISBN: (纸本)9781612842080

Although general purpose GPUs have relatively high computing capacity, they also introduce high power consumption compared with general purpose CPUs. Therefore low-power techniques targeted for GPUs will be one of the most hot topics in the future. On the other hand, in several application domains, users are unwilling to sacrifice performance to save power. In this paper, we propose an effective kernel fusion method to reduce the power consumption for GPUs without performance loss. Different from executing multiple kernels serially, the proposed method fuses several kernels into one larger kernel. Owing to the fact that most consecutive kernels in an application have data dependency and could not be fused directly, we split large kernel into multiple slices with strip-mining method, then fuse independent sliced kernels into one kernel. Based on the CUDA programming model, we propose three different kernel fusion implementations, with each one targeting for a special case. Based on the different strip-ming methods, we also propose two fusion mechanisms, which are called invariant-slice fusion and variant-slice fusion. The latter one could be better adapted to the requirements of the kernels to be fused. The experimental results validate that the proposed kernel fusion method could effectively reduce the power consumption for GPU.

关键词： Kernel Energy consumption Graphics processing unit Power demand Instruction sets Programming Optimization

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Fault recovery based on parallel recomputing in transactional memory system

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Lecture Notes in Electrical Engineering 2011年 98卷 995-1002页

作者： Song, Wei Jia, Jia National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha410073 China

ISBN: (纸本)9783642217647

This paper addresses the issue of fault recovery in transactional memory, and proposes a method of fault recovery based on parallel recomputing in transactional memory system. This method utilizes the dataversioning mechanism of transactional memory system to avoid the extra cost of state saving, rolls back a single transaction to avoid wasting the computing time of the fault-free transactions, and adopts the parallel recomputing method to reduce the cost of fault recovery. This paper applies this method to OpenTM programs, and proposes the implementation method of parallel recomputing in OpenTM. At last, this paper tests the performance of this method through a test program. The experimental results show that, compared with the fault recovery method of rolling back a single transaction, the parallel recomputing method in transactional memory system can execute the fault recovery quickly and accurately and the method has a well scalability. © Springer-Verlag Berlin Heidelberg 2011.

关键词： Fault tolerance

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parallelization of the Training for Face Detection with Transactional Memory

Parallelization of the Training for Face Detection with Tran...

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The International Conference on Automation and Robotics(ICAR 2011)

作者： Kun Zeng Key Laboratory and technology for National Defence of Parallel and Distributed Processing School of Computer National Univiersity of Defense Technology

The development of multi-core processor makes the parallelization of traditional sequential algorithms increasingly important. Meanwhile, transactional memory serves a good parallel programming model. This paper takes the advantage of software transactional memory to parallelize the Multi-Exit Asymmetric Adaboost algorithm for face detection. The parallel version is evaluated on three different implementations of software transactional memory. The experiment results show that the transactional memory based parallelization outperforms the traditional lock based approach. A speedup of nearly seven is achieved on a eight-core machine on an eight-core system.

关键词： Transactional Memory Face Detection Machine Learning Optimistic Algorithm Pessimistic Algorithm

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Power Optimization for GPU Programs Based on Software Prefetching

Power Optimization for GPU Programs Based on Software Prefet...

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IEEE International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom)

作者： Yisong Lin Tao Tang Guibin Wang Key Laboratory of Science and Technology for National Defence of Parallel and Distributed Processing National University of Defense and Technology Changsha China

GPUs render higher computing unit density than contemporary CPUs and thus exhibit much higher power consumption despite its higher power efficiency. The power consumption has become an important issue that impacts CPU's applications, thereby necessitating the low power optimization technology for GPUs. Software prefetching is an efficient way to alleviate the memory wall problem which overlaps the computing and memory access latencies. However, software prefetching will cause some power overhead because it increases the number and density of the instructions. Thus, we should consider the balance between the performance income and the power overhead when applying the optimization. To address this problem, in this paper we first analyze the multi-thread execution model of GPU and validate the potential space of software prefetching optimization. Then we give the software prefetching method for GPU programs to improve the performance. Aiming at two different objects: energy optimization under performance constraint and performance optimization under power constraint, we discuss the optimization methods based on software prefetching and dynamic voltage scaling technologies. The experimental results show that our method can efficiently optimize the energy consumption (performance) under the performance (power) constraint.

关键词： Prefetching Graphics processing unit Optimization Power demand Registers

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Developing an OO model for generalized matrix multiplication: Preliminary considerations

Developing an OO model for generalized matrix multiplication...

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Federated Conference on Computer Science and Information Systems (FedCSIS)

作者： Maria Ganzha Marcin Paprzycki Stanislav G. Sedukhin Systems Research Laboratory Polish Academy of Sciences Warszawa Poland Distributed Parallel Processing Laboratory University of Aizu Aizuwakamatsu Fukushima Japan

Recent changes in computational sciences force reevaluation of the role of dense matrix multiplication. Among others, this resulted in a proposal to consider generalized matrix multiplication, based on the theory of algebraic semirings. The aim of this note is to outline an initial object oriented model of the generalized matrix-multiply-add operation.

关键词： Libraries Hardware Matrices Computers Object oriented modeling Arrays

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Algorithm for distributed Constraint Optimization Problems with low constraint density

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Ruan Jian Xue Bao/Journal of Software 2011年第4期22卷 625-639页

作者： Ding, Bo Wang, Huai-Min Shi, Dian-Xi Tang, Yang-Bin School of Computer National University of Defense Technology Changsha 410073 China National Key Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha 410073 China

Many challenges in multi-agent coordination can be modeled as distributed Constraint Optimization Problems (DCOPs). Aiming at DCOPs with low constraint density, this paper proposes a distributed algorithm based on the idea of greed and backjumping. In this algorithm, each agent makes decisions according to the greedy principle that the most assignment combinations in the problems with low constraint density occur at a zero cost, and the backjumping mechanism among the agents ensures the success of this algorithm, even when this greedy principle leads to a local optimum. In contrast with the existing mainstream DCOP algorithms, this algorithm can solve problems with low constraint density with fewer messages while keeping the polynomial message length and space complexity. The correctness of the key mechanisms in this algorithm has been proved, and those advantages in performance have been verified by experiments. © 2011 ISCAS.

关键词： Multi agent systems

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