A mixed-mode parallel machine's processing elements (PEs) are capable of operating in and switching between the SIMD and MIMD modes of parallelism. The paper analyzes various mappings of image correlation algorith...
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A mixed-mode parallel machine's processing elements (PEs) are capable of operating in and switching between the SIMD and MIMD modes of parallelism. The paper analyzes various mappings of image correlation algorithms onto a mixed-mode parallelprocessing system. The trade-offs that exist between the SIMD and MIMD modes explain why some sequences of instructions are performed better in one mode than in the other and are the primary basis employed in comparing different mappings of a parallel algorithm onto a mixed-mode system.< >
The effects of task migration (i.e. movement of a task from one partition to another) in systems with multistage cube or hypercube networks are studied. Direct overhead encompasses the cost of moving the task when no ...
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The effects of task migration (i.e. movement of a task from one partition to another) in systems with multistage cube or hypercube networks are studied. Direct overhead encompasses the cost of moving the task when no other tasks affect the migration, while indirect overhead is the additional time needed for migration that is due to influences of other tasks. The sum of direct and indirect overhead is the time needed to migrate a task. In addition, the migration can affect other tasks, and thus can incur a migration penalty. The indirect overhead and migration penalty represent the interference that can occur in the interconnection network between the migrating task and other tasks attempting to use the network simultaneously. A model for parameterizing migration costs is given. This research is part of the PASM parallel-processing project.< >
Properties of disjoint paths between a given source (S) and destination (D) in data manipulator networks are examined. The condition that must be present to have disjoint paths through the network for a given S and D ...
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Properties of disjoint paths between a given source (S) and destination (D) in data manipulator networks are examined. The condition that must be present to have disjoint paths through the network for a given S and D pair is presented. It is proven that the maximum number of disjoint paths for any S/D pair is two, and a method for finding the routing tags that specify these paths is given. The effect of a fault in a given stage of the network on the number of S/D pairs that can be connected is also discussed.< >
Mapping cyclic reduction, a known approach for the parallel solution of tridiagonal systems of equations, onto the MasPar MP-1, nCUBE 2, and PASM parallel machines is discussed. Each of these represents a different mo...
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Mapping cyclic reduction, a known approach for the parallel solution of tridiagonal systems of equations, onto the MasPar MP-1, nCUBE 2, and PASM parallel machines is discussed. Each of these represents a different mode of parallelism. Issues addressed are SIMD/MIMD trade-offs, the effect on execution time of increasing the number of processors used, the impact of the inter-processor communications network on performance, the importance of predicting algorithm performance as a function of the mapping used, and the advantages of a partitionable system. Analytical results are validated by experimentation on all three machines.< >
It is suggested that, while high-level-language and OS abstractions have evolved gradually and intelligently over the years with respect to single-instruction, single-data stream machines, these abstractions should no...
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It is suggested that, while high-level-language and OS abstractions have evolved gradually and intelligently over the years with respect to single-instruction, single-data stream machines, these abstractions should not necessarily be provided in early generations of parallel supercomputers. Experience with low-level programming must precede the definition and evolution of abstractions for such machines. Future systems will naturally evolve to the correct level of abstraction, but experimentation with current machines must proceed as much as possible at levels that allow direct examination and evaluation of machine characteristics. Further, new software and hardware techniques should be developed to provide services that will be necessary, such as secure access to multiuser devices.< >
A technique for architectural evaluation that has been used with good results and that is applicable to most experimental and commercial machines is proposed. This technique is that of careful experimentation on a bar...
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A technique for architectural evaluation that has been used with good results and that is applicable to most experimental and commercial machines is proposed. This technique is that of careful experimentation on a bare system, i.e. one without a resident kernel, operating system, or high-level language support. The experimentation involves the implementation of simple algorithms designed to utilize the basic features of the architecture and exploit its unique features. This technique makes possible the analysis of an architecture without the complexities introduced by most operating systems and compilers and can yield insight beneficial in future language, compiler, operating system, application, and system design. Hybrid SIMD/MIMD architectures are considered as an example.< >
Features of an explicitly parallel language targeted for reconfigurable massively parallelprocessing systems capable of operating in the SIMD (single-instruction-stream, multiple-data-stream) and SPMD (single-program...
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Features of an explicitly parallel language targeted for reconfigurable massively parallelprocessing systems capable of operating in the SIMD (single-instruction-stream, multiple-data-stream) and SPMD (single-program, multiple-data-stream) modes of parallelism are presented (SPMD is a subset of MIMD (multiple-instruction stream, multiple-data stream)). All aspects of the language have been provided with an SIMD-mode version and an SPMD-mode version that are functionally equivalent. The language facilitates experimentation with and exploitation of massively parallel SIMD/SPMD machines. Aspects of data management (variable specification, data manipulation operations, etc.) and control-flow constructs (data dependent and processor address dependent) are examined.< >
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