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IEEE International Symposium on Embedded Multicore Socs (MCSoC)

作者： Chuan Tang Dan Liu Zuocheng Xing Peng Yang Zhe Wang Jiang Xu Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China Department of Electronic and Computer Engineering Hong Kong University of Science and Technology Hong Kong China

ISBN: (纸本)9781479986712

Many-core system is main architecture trend currently. One of the dominating challenges for on-chip manycore system is the memory wall. However traditional research primarily focus on the limited bandwidth. To solve this problem, many-core system is aided with large cache, and a lot of complex approaches about memory and cache are adopted aiming at relaxing the pressure of bandwidth and improving the efficiency of cache. All these methods generate much cost of area and power. In this paper, we are motivated by the feature of abundant bandwidth and low latency of optical interconnect. We analyze the characteristics of memory access on 64 cores system under the case of high bandwidth which can be assumed to benefit from optical interconnect, considering the sensibility with bandwidth and cache for different benchmarks. Finally, we discuss about promising basic frameworks suitable for manycore system with optical interconnect.

关键词： Bandwidth Benchmark testing Optical interconnections Random access memory Delays Hidden Markov models computers

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A mathematical model, heuristic, and simulation study for a basic data staging problem in a heterogeneous networking environment

A mathematical model, heuristic, and simulation study for a ...

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Heterogeneous Computing Workshop

作者： Min Tan M.D. Theys H.J. Siegel N.B. Beck M. Jurczyk Cisco Systems Inc. San Jose CA USA Parallel Processing Laboratory School of Electrical and Computer Engineering Purdue University West Lafayette IN USA Department of Computer Engineering and Computer Science University of Missouri Columbia Columbia MO USA

Data staging is an important data management problem for a distributed heterogeneous networking environment, where each data storage location and intermediate node may have specific data available, storage limitations, and communication links. Sites in the network request data items and each item is associated with a specific deadline and priority. It is assumed that not all requests can be satisfied by their deadline. The work concentrates on solving a basic version of the data staging problem in which all parameter values for the communication system and the data request information represent the best known information collected so far and stay fixed throughout the scheduling process. A mathematical model for the basic data staging problem is introduced. Then, a multiple-source shortest-path algorithm based heuristic for finding a suboptimal schedule of the communication steps for data staging is presented. A simulation study is provided, which evaluates the performance of the proposed heuristic. The results show the advantages of the proposed heuristic over two random based scheduling techniques. This research, based on the simplified static model, serves as a necessary step toward solving the more realistic and complicated version of the data staging problem involving dynamic scheduling, fault tolerance, and determining where to stage data.

关键词： Mathematical model computer networks Distributed computing Data engineering Military computing Intelligent networks computer network management Environmental management Memory Satellite broadcasting

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LD: A Polynomial Time Algorithm for Tree Isomorphism

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Procedia engineering 2011年 15卷 2015-2020页

作者： Baida Zhang Yuhua Tang Junjie Wu Shuai Xu National laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha Hunan 410073 P. R. China Department of Information Engineering Academy of Armored Force Engineering Beijing 100000 P.R.China

Graph isomorphism problem has always been mathematics and engineering technology community concern, the reason mainly from two aspects: First, in theory, is generally believed that the problem is NP-complete problem; Second, the graph isomorphism the problem with good prospects, in chemistry, operations research, computer science, electronics, network theory has applications in many fields, but the exponential complexity of the algorithm and the algorithm itself makes the limitations applicable to the object involved with complex graphics the application of structure is difficult to determine the start. In this paper, class tree is proposed based on the node to delete the exact graph isomorphism problem, you can quickly determine the graph isomorphism problem, and theoretical analysis and experiments show that the algorithm can determine the class in polynomial time tree isomorphism problem.

关键词： Graph Isomorphism LD algorithm

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An efficient local address generation for the block-cyclic distribution

An efficient local address generation for the block-cyclic d...

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IEEE International Conference on Algorithms and Architectures for parallel processing (ICAP)

作者： Oh-Young Kwon Tae-Geun Kim Tack-Don Han Sung-Bong Yang Shin-Dug Kim Distributed Computing Laboratory Systems Engineering Research Institute Taejon South Korea Parallel Processing System Laboratory Department of Computer Science Yonsei University Seoul South Korea

ISBN: (纸本)0780342291

In order to generate local addresses for an array section A(l:h:s) with block-cyclic distribution, an efficient compiling method is required. In this paper, two local address generation methods for the block-cyclic distribution are presented. One is a simple local address generation method that is modified from the virtual-block scheme. The other is a linear-time /spl Delta/M table construction method. The array elements of A(l:h:s) to be accessed at run-time build up a family of lines. By using the equation of the lines, a /spl Delta/M table can be generated in O(k) time. Experimental results show that a simple local address generation method has poor performance but a linear-time /spl Delta/M table generation method is faster than other algorithms in /spl Delta/M table generation time and access time for 10,000 array elements.

关键词： Runtime Equations Distributed computing Systems engineering and theory parallel processing Laboratories computer science parallel languages Upper bound Automata

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A comparative study of five parallel genetic algorithms using the traveling salesman problem

A comparative study of five parallel genetic algorithms usin...

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International Symposium on parallel processing

作者： L. Wang A.A. Maciejewski H.J. Siegel V.P. Roychowdhury Microsoft Corporation Redmond WA USA Parallel Processing Laboratory School of Electrical and Computer Engineering Purdue University West Lafayette IN USA Electrical Engineering Department UCLA Los Angeles CA USA

parallel generic algorithms (PGAs) have been developed to reduce the large execution times that are associated with serial generic algorithms (SGAs). They have also been used to solve larger problems and to find better solutions. A comparative analysis of five different coarse-grained PGAs is conducted using the traveling salesman problem as the basis of this case study. To make fair comparisons, all of these PGAs are based on the same baseline SGA, implemented on the same parallel machine (IBM SP2), tested on the same set of traveling salesman problem instances, and started from the same set of initial populations. As a result of the experiments conducted in this study, a particular PGA that combines a new subtour technique with a known migration approach is identified to be the best for the traveling salesman problem among the five PGAs being compared.

关键词： Genetic algorithms Traveling salesman problems Electronics packaging Cities and towns Testing parallel machines Space exploration computer architecture Contracts parallel processing

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Static program decomposition among machines in an SIMD/SPMD heterogeneous environment with non-constant mode switching costs

Static program decomposition among machines in an SIMD/SPMD ...

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Heterogeneous Computing Workshop

作者： D.W. Watson J.K. Antonio H.J. Siegel M.J. Atallah Department of Computer Science Utah State University Logan UT USA Parallel Processing Laboratory School of electrical Engineering Purdue University West Lafayette IN USA Computer Sciences Department Purdue University West Lafayette IN USA

The problem of minimizing the execution time of programs within a heterogeneous environment is considered. Different computational characteristics within a parallel algorithm may make switching execution from one machine to another beneficial; however, the cost of switching between machines during the execution of a program must be considered. This cost is not constant, but depends on data transfers needed as a result of the move. Therefore, determining a minimum-cost assignment of machines to program segments is not straightforward. A previously presented block-based mode selection (BBMS) approach is used as a basis to develop a heuristic method for assigning machines to program segments of data-parallel algorithms. Simulation results of parallel program behavior using the heuristic indicate that good assignments are possible without resorting to exhaustive search techniques.< >

关键词： parallel processing parallel machines Switches Cost function computer science Concurrent computing parallel algorithms Laboratories Contracts Testing

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Design of a system for software testing and debugging for multiprocessor avionics systems

Design of a system for software testing and debugging for mu...

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IEEE Annual International computer Software and Applications Conference (COMPSAC)

作者： J.E. Lumpp R.K. Shultz T.L. Casavant Parallel Processing Laboratory Department of Electrical and Computer Engineering University of Iowa Iowa IA USA Advanced Technology and Engineering Collins Commercial Avionics Rockwell International Corporation Cedar Rapids IA USA

As multiprocessor software solutions find their way into critical applications such as avionics as a means of increasing performance and reliability, the need for both debugging and testing tools increases dramatically. The authors focus on the gathering of accurate run-time information providing support for both debugging and testing of embedded multiprocessor systems by using run-time identification of simple events and postexecution identification of compound events. Additionally, they propose a way of combining specification-based (black-box) system testing and automatic monitoring to substantially reduce the complexity, tedium, and cost of complete structural (white-box) testing.< >

关键词： Software testing System testing Software debugging Software performance Software tools Application software Aerospace electronics Runtime Multiprocessing systems computerized monitoring

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Implementation of visual MPI parallel program performance analysis tool for cluster environments

Implementation of visual MPI parallel program performance an...

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International Conference on Advanced Information Networking and Applications (AINA)

作者： Kuan-Ching Li Hsun-Chang Chang Chao-Tung Yang Li-Jen Chang Hsiang-Yao Cheng Liang-Teh Lee Parallel and Distributed Processing Center CSIM Department Providence University Taichung Taiwan HPC Laboratory CSIE Department Tunghai University Taichung Taiwan Department of Computer Science and Engineering Tatung University Taipei Taiwan

ISBN: (纸本)0769522491

In this paper, we present visual tool for performance measurement and analysis of MPI parallel programs in cluster environments. Most of tools available today for cluster systems show solely system performance data (e.g., CPU load, memory usage, network bandwidth, machine-room temperature, server average load, among others), being more suitable for system administrators who maintain such system. The visual tool is designed to show performance data of all computer nodes involved in the execution of MPI parallel program, such as CPU load level and memory usage. Additionally, this tool is able to display comparative performance data charts of multiple executions of the application (instrumented with MPI interface) under development.

关键词： Performance analysis Measurement System performance Bandwidth Temperature Network servers Concurrent computing computer displays Application software Instruments

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Server-uncertain spectrum trading in cognitive radio networks: A queueing-theoretic modeling approach

Server-uncertain spectrum trading in cognitive radio network...

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International Conference on Cognitive Radio Oriented Wireless Networks and Communications

作者： Lixia Liu Gang Hu Ming Xu Yuxing Peng National Key Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha China Department of Network Engineering College of Computer National University of Defense Technology Changsha China

Spectrum trading is the promising method to improve spectrum efficiency from the perspective of economics. In this paper we propose a queueing-theory based spectrum trading model, where the primary user plays the server role providing spectrum to the secondary user who acts as the customer. The most significant challenge is how to optimize the spectrum trading model considering the server uncertainty which includes service state, service time, service area, service content and service price. We design a STACP queueing model according to the server attributes, so that the secondary user can choose the right queue quickly and reasonably according to its demand. Moreover, we further analyze the optimizing strategies for STACP model which can maximize the profit of the primary user and minimize the service cost of the secondary user. The simulation results demonstrate the analysis results.

关键词： Servers Uncertainty Loss measurement Queueing analysis Economics Analytical models Business

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A model for monitoring and debugging parallel and distributed software

A model for monitoring and debugging parallel and distribute...

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IEEE Annual International computer Software and Applications Conference (COMPSAC)

作者： D.C. Marinescu J.E. Lumpp T.L. Casavant H.J. Siegel Computer Science Department Purdue University West Lafayette IN USA School of Electrical Engineering Parallel Processing Laboratory Purdue University West Lafayette IN USA Department of Electrical snd Computer Engineering University of Iowa Iowa IA USA Purdue Univ. West Lafayette IN USA

Several aspects of the multidimensional problem of providing monitoring support for the debugging and performance analysis of distributed and parallel systems and parallel applications are presented. The key elements of the solution to the problem are a formal event-action model at the process level and a layered architectural model. The application of the event-action model to the development of the abstract layered architectural model is shown, as well as a proposed implementation sketch of a nonintrusive monitor for the PASM parallel processing system.< >

关键词： Software debugging Yarn Probes Hardware Instruments computerized monitoring parallel processing Application software Timing Condition monitoring

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