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IEEE International Conference on Algorithms and Architectures for parallel processing (ICAP)

作者： Oh-Young Kwon Tae-Geun Kim Tack-Don Han Sung-Bong Yang Shin-Dug Kim Distributed Computing Laboratory Systems Engineering Research Institute Taejon South Korea Parallel Processing System Laboratory Department of Computer Science Yonsei University Seoul South Korea

ISBN: (纸本)0780342291

In order to generate local addresses for an array section A(l:h:s) with block-cyclic distribution, an efficient compiling method is required. In this paper, two local address generation methods for the block-cyclic distribution are presented. One is a simple local address generation method that is modified from the virtual-block scheme. The other is a linear-time /spl Delta/M table construction method. The array elements of A(l:h:s) to be accessed at run-time build up a family of lines. By using the equation of the lines, a /spl Delta/M table can be generated in O(k) time. Experimental results show that a simple local address generation method has poor performance but a linear-time /spl Delta/M table generation method is faster than other algorithms in /spl Delta/M table generation time and access time for 10,000 array elements.

关键词： Runtime Equations Distributed computing Systems engineering and theory parallel processing Laboratories computer science parallel languages Upper bound Automata

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parallel programming with CAPSE-a case study

Parallel programming with CAPSE-a case study

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Euromicro Workshop on parallel and Distributed processing

作者： B. Gruber G. Haring D. Kranzlmuller J. Volkert Institute of Applied Computer Science and Information Systems Department of Advanced Computer Engineering University of Technology Vienna Vienna Austria Institute of Computer Science Department for Graphics and Parallel Processing Johannes Kepler University Linz Linz Austria

The CAPSE environment for computer Aided parallel Software engineering is intended to assist the developer in the crucial task of parallel programming. The methodology of CAPSE is based on direct manipulative graphical creation and editing of scalable workload characterizations of MIMD algorithms. This paper presents the basic concepts of this methodology and an example of a parallel Poisson solver. The workload characterization representing the computation and communication behavior of the algorithm is based on directed acyclic task graphs, which achieve scalability by composing the task graph of scalable basic patterns instead of single node and arcs. The composition and the usage of these basic patterns is described in the light of designing the Poisson solver algorithm. The resulting task graph is used to predict the program's performance on a nCUBE 2 distributed memory machine and the PAPS simulator.

关键词： parallel programming computer aided software engineering Concurrent computing computer science Information systems Scalability Distributed computing computer graphics parallel processing Algorithm design and analysis

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Control of PWM AC‐to‐DC converters using state‐space and fuzzy‐methods

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European Transactions on Electrical Power 1995年第5期5卷 301-306页

作者： Krebs, S. Oelert, K. Dr.-Ing. Stephan Krebs (1963) received his Diploma degree in 1990 and his Dr.-Ing. degree in 1994 from the Elektrotechnisches Institut Universitat Karlsruhe/Germany. His main fields of interest are the use of modern time-discrete control methods and parallel signal processing in adjusrable speed drive and power supply systems. In summer 1994. he joined the Power Group of the Department of Electrical and Computer Engineering of the University of Toronto/Canada where he is currently working on industrial controller platform for power applications. (Department of Electrical and Computer Engineering University of Toronto 10 King's College Rd. TorontoiOntario. Canada M5S 1A4 T+416/978-66 18 Fax +416/971-2325) Kai Oelert (1967) received the Electrical Engineering degree from the Elektrotechnisches Institut of the University of KarlsruhdGermany in 1993. He is currently developing software for automatic ticket-wending systems with the Company Scheidt & Bachmann Monchengladbach/Germany. (Scheidt & Bachmann GmbH Breite Str. 132 D-4 1238 Monchengladbach/Germany T+2166/266445 Fax+2166/2666 15)

Adjustable speed drive systems using AC‐machines are often fed by voltage‐source inverters. This paper presents a new strategy to control the line‐side converter. State‐space and fuzzy methods are combined to achieve a control system which includes control limits and the aspects of safety. Experiments with a drive system (30 kW) demonstrate the dynamic and steady‐state behaviour of the control. Copyright © 1995 John Wiley & Sons, Ltd.

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New method to control cascaded doubly‐fed machines in the state space

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European Transactions on Electrical Power 1995年第1期5.0卷 55-61页

作者： Krebs, S. Dr.-Ing. Stephan Krebs (1963) received his Diploma degree in 1960 and his Dr.-Ing. degree in 1994 from the Elektrotechnisches Institut Universitat Karlsruhe/Germany. His main fields of interest are the use of modem time-discrete control methods and parallel signal processing in adjustable speed drive and power supply systems. In summer 1994 he joined the Power Group of the Department of Electrical and Computer Engineering of the University of Toronto/Canada where he is currently working on industrial controller platform for power applications. (Department of Electrical and Computer Engineering University of Toronto 10 King's College Rd. Toronto/Ontario Canada M5S 1A4 T +4 1 6/9 78-66 18 Fax +4 1 6/9 7 1-23 25)

The cascaded doublyfed machine consists of two separate induction machines which are interconnected by their rotor windings. This paper presents a general control structure for such machines, based on the principle of the field‐oriented control. An adjustable speed drive operating in subsynchronous mode is compared with an asynchronous machine‐drive system, and its advantages are shown. State‐space control methods are used to get a stable behaviour over a wide speed range. Copyright © 1995 John Wiley & Sons, Ltd.

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Multiagent fault‐diagnosis expert system in power systems

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European Transactions on Electrical Power 1995年第5期5卷 341-347页

作者： Wang, J.P. Trécat, J. Dr. Jianping Wang is a doctor fellow in the Faculte Polytechnique de Mons in Belgium. His current research field is parallel processing applications in power systems. Dr. Wang obtained his BS degree from Southwest Jiaotong University in P.R. Chinain 1982. From 1982 to 1990 he was appointed as an assistant lecturer. lecturer and associate professor respectively in the electrical engineering department of Southwest Jiaotong University. He obtained his Ph.D in the FacultC Polytechnique de Mons in July of 1993. (BD Dolez 3 1 FPMS B-7000 Mons Belgium T +32-65/37 41 87 Fax +32-65/37 43 00) Professor J. Trécat is a director in the power system laboratory in the Faculty Polytechnique de Mons. He obtained his Ph.D in the University of Manchester Institute of Science and Technology(UM1ST) in U.K. in 1970. He has been working in the fields of power system automation artificial intelligence application and computer vision in the Facult6 Polytechnique de Mons since 1970. He is a senior member of IEEE and he has made much contribution both in electrical engineering education and research. (BD Dolez 3 I FPMS B-7000 Mons T +32-651374185. Fax +32-6513743 00)

In order to solve the speed problem and shallow reasoning problem met in current research in fault diagnosis expert system, this paper presents a model based parallel fault diagnosis expert system for energy management systems (EMS). The Petri net model, which corresponds to the relationship between power system components and their protection systems, has been used for the inference in fault diagnosis. A multiagent parallel processing expert system, which is based on five transputers in Sun workstation, has been built for fault diagnosis purposes. The test results show that this expert system is not only fast but also has better performances. Copyright © 1995 John Wiley & Sons, Ltd.

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Static program decomposition among machines in an SIMD/SPMD heterogeneous environment with non-constant mode switching costs

Static program decomposition among machines in an SIMD/SPMD ...

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1995 Heterogeneous Computing Workshop, HCW 1994

作者： Watson, Daniel W. Antonio, John K. Siegel, Howard Jay Atallah, Mikhail J. Department of Computer Science Utah State University LoganUT84321-4205 United States Parallel Processing Laboratory School of Electrical Engineering Purdue University West LafayetteIN47907-1285 United States Computer Sciences Department Purdue University West LafayetteIN47907-1398 United States

ISBN: (纸本)0818655925

The problem of minimizing the execution time of programs within a heterogeneous environment is considered. Different computational characteristics within a parallel algorithm may make switching execution from one machine to another beneficial;however, the cost of switching between machines during the execution of a program must be considered. This cost is not constant, but depends on data transfers needed as a result of the move. Therefore, determining a minimum-cost assignment of machines to program segments is not straightforward. A previously presented Block-Based Mode Selection (BBMS) approach is used as a basis to develop a heuristic method for assigning machines to program segments of data-parallel algorithms. Simulation results of parallel program behavior using the heuristic indicate that good assignments are possible without resorting to exhaustive search techniques. © 1994 IEEE.

关键词： Heuristic methods

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Static program decomposition among machines in an SIMD/SPMD heterogeneous environment with non-constant mode switching costs

Static program decomposition among machines in an SIMD/SPMD ...

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Heterogeneous Computing Workshop

作者： D.W. Watson J.K. Antonio H.J. Siegel M.J. Atallah Department of Computer Science Utah State University Logan UT USA Parallel Processing Laboratory School of electrical Engineering Purdue University West Lafayette IN USA Computer Sciences Department Purdue University West Lafayette IN USA

The problem of minimizing the execution time of programs within a heterogeneous environment is considered. Different computational characteristics within a parallel algorithm may make switching execution from one machine to another beneficial; however, the cost of switching between machines during the execution of a program must be considered. This cost is not constant, but depends on data transfers needed as a result of the move. Therefore, determining a minimum-cost assignment of machines to program segments is not straightforward. A previously presented block-based mode selection (BBMS) approach is used as a basis to develop a heuristic method for assigning machines to program segments of data-parallel algorithms. Simulation results of parallel program behavior using the heuristic indicate that good assignments are possible without resorting to exhaustive search techniques.< >

关键词： parallel processing parallel machines Switches Cost function computer science Concurrent computing parallel algorithms Laboratories Contracts Testing

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A framework for compile-time selection of parallel modes in an SIMD/SPMD heterogeneous environment 7

A framework for compile-time selection of parallel modes in ...

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1993 Workshop on Heterogeneous processing, VVHP 1993, Held in conjunction with the 7th International parallel processing Symposium

作者： Watson, Daniel W. Siegel, Howard Jay Antonio, John K. Nichols, Mark A. Atallah, Mikhail J. Parallel Processing Laboratory School of Electrical Engineering Purdue University West LafayetteIN47907 United States Computer Sciences Department Purdue University West LafayetteIN47907 United States NCR Corp. San DiegoCA United States

ISBN: (纸本)0818635312

A framework for estimating the relative execution time of a data-parallel algorithm in an environment capable of the SIMD and SPMD (Single Program - Multiple Data) modes of computation is presented. Given a data-parallel program in a language whose syntax is mode-independent, and empirical information about instruction execution time characteristics, the long-term goal is to determine at compile time an implementation that results in an optimal execution time for a heterogeneous system capable of SIMD and SPMD parallelism. © 1993 IEEE.

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Application of QR decomposition-based least squares technique to improve air traffic control radar

Application of QR decomposition-based least squares techniqu...

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Midwest Symposium on Circuits and Systems (MWSCAS)

作者： T. Ogunfunmi Nam Ling Signal and Image Processing Laboratory (SIPL) Department of Electrical Engineering Santa Clara University Santa Clara CA USA Computer Systems and Parallel Processing Research Laboratory (CSPPRL) Department of Computer Engineering Santa Clara University Santa Clara CA USA

For real-time radar processing, it is very desirable to have an algorithm that does not assume restricted statistics of the input data and can be implemented for high-speed processing (without a high cost) to meet real-time requirements. We therefore apply the QR decomposition-based least-squares method for linear prediction to the problem of computing the reflection coefficients of a lattice predictor, instead of using the conventional Burg algorithm. We also propose a modified one-dimensional ring architecture for implementing the QR method of least-squares. The particular application considered in this case is that of surveillance radar systems for air traffic control.< >

关键词： Least squares methods Air traffic control Radar applications Signal processing algorithms Radar signal processing Statistics Systolic arrays Radar imaging Signal processing Surveillance

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Critical performance path analysis, and efficient code generation issues, for the Seamless architecture

Critical performance path analysis, and efficient code gener...

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International Symposium on parallel processing

作者： D.L. Bright S.A. Fineberg B.H. Pease M.L. Roderick S. Sundaram T.L. Casavant Parallel Processing Laboratory Department of Electrical and Computer Engineering University of Iowa Iowa IA USA Numerical Aerodynamic Simulation NASA Ames Research Center CA USA

An analytical study of potential pathological performance areas of the Seamless architecture is presented. Seamless is a latency-tolerant, distributed memory, multiprocessor architecture. A key component of the philosophy of Seamless, however, is the use of standard, commodity components for a large part of the system. A discussion of the unavoidable implementation compromises imposed by this decision is presented, followed by a summary of some optimistic performance studies. Then an analytical study that parameterizes the predicts the worst-case impact of using standard components is provided. Finally, it is shown that these bottlenecks are manageable via careful generation of target machine code so that the optimistic performance studies become realistic expectations for a range of program behaviors and granularities.< >

关键词： Performance analysis computer architecture Hardware Reduced instruction set computing Workstations Costs Aerodynamics Computational modeling Analytical models Numerical simulation

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