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arXiv 2023年

作者： Nöttgen, Hannah Czappa, Fabian Wolf, Felix Laboratory for Parallel Programming Technical University of Darmstadt Darmstadt Germany

The brain is probably the most complex organ in the human body. To understand processes such as learning or healing after brain lesions, we need suitable tools for brain simulations. The Model of Structural Plasticity offers a solution to that problem. It provides a way to model the brain bottom-up by specifying the behavior of the neurons and using structural plasticity to form the synapses. However, its original formulation involves a pairwise evaluation of attraction kernels, which drastically limits scalability. While this complexity has recently been decreased to O(n · log2 n) after reformulating the task as a variant of an n-body problem and solving it using an adapted version of the Barnes-Hut approximation, we propose an even faster approximation based on the fast multipole method (FMM). The fast multipole method was initially introduced to solve pairwise interactions in linear time. Our adaptation achieves this time complexity, and it is also faster in practice than the previous approximation. © 2023, CC BY-NC-ND.

关键词： Scalability

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Simulating Structural Plasticity of the Brain more Scalable than Expected

arXiv

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arXiv 2022年

作者： Czappa, Fabian Geiß, Alexander Wolf, Felix Laboratory for Parallel Programming Department of Computer Science Technical University of Darmstadt Germany

Structural plasticity of the brain describes the creation of new and the deletion of old synapses over time. Rinke et al. (JPDC 2018) introduced a scalable algorithm that simulates structural plasticity for up to one billion neurons on current hardware using a variant of the Barnes–Hut algorithm. They demonstrate good scalability and prove a runtime complexity of O(n log2 n). In this comment paper, we show that with careful consideration of the algorithm and a rigorous proof, the theoretical runtime can even be classified as O(n log n). © 2022, CC BY-NC-ND.

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Automatic Instrumentation Refinement for Empirical Performance Modeling

Automatic Instrumentation Refinement for Empirical Performan...

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IEEE/ACM International Workshop on programming and Performance Visualization Tools (ProTools)

作者： Jan-Patrick Lehr Alexandru Calotoiu Christian Bischof Felix Wolf Institute for Scientific Computing Technische Universität Darmstadt Darmstadt Germany Laboratory for Parallel Programming Technische Universität Darmstadt Darmstadt Germany

ISBN: (纸本)9781728160276

The analysis of runtime performance is important during the development and throughout the life cycle of HPC applications. One important objective in performance analysis is to identify regions in the code that show significant runtime increase with larger problem sizes or more processes. One approach to identify such regions is to use empirical performance modeling, i.e., building performance models based on measurements. While the modeling itself has already been streamlined and automated, the generation of the required measurements is time consuming and tedious. In this paper, we propose an approach to automatically adjust the instrumentation to reduce overhead and focus the measurements to relevant regions, i.e.,such that show increasing runtime with larger input parameters or increasing number of MPI ranks. Our approach employs Extra-P to generate performance models, which it then uses to extrapolate runtime and, finally, decide which functions should be kept for measurement. Also, the analysis expands the instrumentation, by heuristically adding functions based on static source-code features. We evaluate our approach using benchmarks from SPEC CPU 2006, SU2, and parallel MILC. The evaluation shows that our approach can filter functions of little interest and generate profiles that contain mostly relevant regions. For example, the overhead for SU2 can be improved automatically from 200% to 11% compared to filtered Score-P measurements.

关键词： Instruments Runtime Mathematical model Analytical models Atmospheric measurements Particle measurements parallel processing

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How File-access Patterns Inuence the Degree of I/O Interference between Cluster Applications

Supercomputing Frontiers and Innovations

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Supercomputing Frontiers and Innovations 2019年第2期6卷 29-55页

作者： Shah, Aamer Kuo, Chih-Song Nomura, Akihiro Matsuoka, Satoshi Wolf, Felix Laboratory for Parallel Programming Technische Universita•t Darmstadt Darmstadt Germany Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan Global Scientic Information and Computing Center Tokyo Institute of Technology Tokyo Japan Department of Mathematical and Computing Science Tokyo Institute of Technology Tokyo Japan

On large-scale clusters, tens to hundreds of applications can simultaneously access a parallel le system, leading to contention and, in its wake, to degraded application performance. In this article, we analyze the inuence of le-access patterns on the degree of interference. As it is by experience most intrusive, we focus our attention on write-write contention. We observe considerable dierences among the interference potentials of several typical write patterns. In particular, we found that if one parallel program writes large output les while another one writes small checkpointing les, then the latter is slowed down when the checkpointing les are small enough and the former is vice versa. Moreover, applications with a few processes writing large output les already can signicantly hinder applications with many processes from checkpointing small les. Such eects can seriously impact the runtime of real applications|up to a factor of ve in one instance. Our insights and measurement techniques oer an opportunity to automatically classify the interference potential between applications and to adjust scheduling decisions accordingly. © The Authors 2019. This paper is published with open access at ***

关键词： Benchmarking

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Managing Power Demand and Load Imbalance to Save Energy on Systems with Heterogeneous CPU Speeds

Managing Power Demand and Load Imbalance to Save Energy on S...

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International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)

作者： Edson Luiz Padoin Matthias Diener Philippe O. A. Navaux Jean-François Méhaut Department of Exact Sciences and Engineering (DCEEng) Regional University of Northwest of Rio Grande do Sul (UNIJUI) Ijuí Brazil Parallel Programming Laboratory (PPL) University of Illinois at Urbana-Champaign (UIUC) Urbana-Champaign USA Informatics Institute Federal University of Rio Grande do Sul (UFRGS) Porto Alegre Brazil University Grenoble Alpes Grenoble France

Different simulations of real problems have been executed in High Performance Computing systems. However, the power consumption of these systems is an increasing concern once more energy are consumed to large simulations. In this context, load balancers emerge as a promising alternative for supporting the computational science methods. In response to this challenge, we developed a new heterogeneous energy-aware load balancer called H-ENERGYLB to reduce the average power demand of systems with heterogeneous processors and save energy when scientific applications with imbalanced load are executed. Our new load balancing strategy combines dynamic load balancing with DVFS techniques to mitigate the imbalanced workloads in order to reduce the clock frequency of underloaded computing cores which experience some residual imbalance even after tasks are remapped. Experiments with three applications on two different heterogeneous architectures show that H-ENERGYLB results in power reductions of 7.14% in average with the energy saving of 36.6% in average compared to others load balancers.

关键词： Program processors Load management Task analysis Power demand Clocks Runtime Load modeling

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Scaling Score-P to the next level *

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Procedia Computer Science 2017年 108卷 2180-2189页

作者： Daniel Lorenz Christian Feld Laboratory for Parallel Programming Technische Universität Darmstadt Darmstadt Germany Jülich Supercomputing Centre Forschungszentrum Jülich GmbH Jülich Germany

As part of performance measurements with Score-P, a description of the system and the execution locations is recorded into the performance measurement reports. For large-scale measurements using a million or more processes, the global system description can consume all the available memory. While the information stored process-locally during measurement is small, the memory requirement becomes a bottleneck in the process of constructing a global representation of the whole system. To address this problem we implemented a new system description in Score-P that exploits regular structures of the system, and results, on homogeneous systems, in a system description of constant size. Furthermore, we present a parallel algorithm to create a global view from the process-local information. The scalable system description comes at the price that it is no longer possible to assign individual names to each system element, but only enumerate elements of the same type. We have successfully tested the new approach on the full JUQUEEN system with up to nearly two million processes.

关键词： Performance analysis data compression exascale computing

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Automatic parallel Pattern Detection in the Algorithm Structure Design Space

Automatic Parallel Pattern Detection in the Algorithm Struct...

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International Symposium on parallel and Distributed Processing (IPDPS)

作者： Zia Ul Huda Rohit Atre Ali Jannesari Felix Wolf Laboratory for Parallel Programming Technische Universität Darmstadt Darmstadt Germany RWTH Aachen University Aachen Germany

ISBN: (纸本)9781509021413

parallel design patterns have been developed to help programmers efficiently design and implement parallel applications. However, identifying a suitable parallel pattern for a specific code region in a sequential application is a difficult task. Transforming an application according to support structures applicable to these parallel patterns is also very challenging. In this paper, we present a novel approach to automatically find parallel patterns in the algorithm structure design space of sequential applications. In our approach, we classify code blocks in a region according to the appropriate supportstructure of the detected pattern. This classification eases the transformation of a sequential application into its parallel version. Weevaluated our approach on 17 applications from four different benchmark suites. Our method identified suitable algorithm structure patterns in the sequential applications. We confirmed our results by comparing them with the existing parallel versions of these applications. We also implemented the patterns we detected in cases in which parallel implementations were not available and achieved speedups of up to 14x.

关键词： Pipelines parallel processing Positron emission tomography Linear regression Algorithm design and analysis Benchmark testing Software

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Power management of extreme-scale networks with on/off links in runtime systems

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ACM Transactions on parallel Computing 2015年第2期1卷 1–21页

作者： Totoni, Ehsan Jain, Nikhil Kale, Laxmikant V. Parallel Programming Laboratory Department of Computer Science University of Illinois at Urbana-Champaign UrbanaIL61801 United States

Networks are among major power consumers in large-scale parallel systems. During execution of common parallel applications, a sizeable fraction of the links in the high-radix interconnects are either never used or are underutilized. We propose a runtime system based adaptive approach to turn off unused links, which has various advantages over the previously proposed hardware and compiler based approaches. We discuss why the runtime system is the best system component to accomplish this task, and test the effectiveness of our approach using real applications (including NAMD, MILC), and application benchmarks (including NAS parallel Benchmarks, Stencil). These codes are simulated on representative topologies such as 6-D Torus and multilevel directly connected network (similar to IBM PERCS in Power 775 and Dragonfly in Cray Aries). For common applications with near-neighbor communication pattern, our approach can save up to 20% of total machine's power and energy, without any performance penalty. © 2015 ACM.

关键词： Topology

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Preventing the explosion of exascale profile data with smart thread-level aggregation 4

Preventing the explosion of exascale profile data with smart...

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4th Workshop on Extreme Scale programming Tools, ESPT 2015

作者： Lorenz, Daniel Shudler, Sergei Wolf, Felix Laboratory for Parallel Programming Technische Universität Darmstadt Darmstadt Germany

ISBN: (纸本)9781450339971

State of the art performance analysis tools, such as Score-P, record performance profoles on a per-thread basis. However, for exascale systems the number of threads is expected to be in the order of a billion threads, and this would result in extremely large performance profioles. In most cases the user almost never inspects the individual per-thread data. In this paper, we propose to aggregate per-thread performance data in each process to reduce its amount to a reasonable size. Our goal is to aggregate the threads such that the thread-level performance issues are still visible and analyzable. Therefore, we implemented four aggregation strategies in Score-P: (i) SUM-aggregates all threads of a process into a process profile;(ii) SET-calculates statistical key data as well as the sum;(iii) KEY-identifies three threads (i.e., key threads) of particular interest for performance analysis and aggregates the rest of the threads;(iv) CALLTREE-clusters threads that have the same call-tree structure. For each one of these strategies we evaluate the compression ratio and how they maintain thread-level performance behavior information. The aggregation does not incur any additional performance overhead at application run-time. © 2015 ACM.

关键词： Aggregates

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Down to Earth - How to Visualize Traffic on High-dimensional Torus Networks

Down to Earth - How to Visualize Traffic on High-dimensional...

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Workshop on Visual Performance Analysis (VPA)

作者： Lucas Theisen Aamer Shah Felix Wolf Department of Computer Science RWTH Aachen University Aachen Germany German Research School for Simulation Sciences Laboratory for Parallel Programming Aachen Germany

High-dimensional torus networks are becoming common in flagship HPC systems, with five of the top ten systems in June 2014 having networks with more than three dimensions. Although such networks combine performance with scalability at reasonable cost, the challenge of how to achieve optimal performance remains. Tools are needed to help understand how well the traffic is distributed among the many dimensions. This involves not only capturing network traffic but also its comprehensible visualization. However, visualizing such networks requires projecting multiple dimensions onto a two-dimensional screen, which is naturally challenging. To tackle this problem, in this position paper, we propose a visualization technique which can display traffic on torus networks with up to six dimensions. Our fundamental approach is to simultaneously present multiple views of the same network section, with each view visualizing different dimensions. Furthermore, we leverage the multiple-coordinate system concept and combine it with a customized polygon view to provide both a global and a zoomed-in perspective of the network. By interactively linking all the views, our technique makes it possible to analyze how the communication pattern of an application is mapped onto a network.

关键词： Data visualization Visualization Monitoring Measurement Educational institutions Joining processes Hardware

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