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FMCC-RT: a scalable and fine-grained all-reduce algorithm for large-scale SMP clusters

science China(Information sciences) 2025年第5期68卷 362-379页

作者： Jintao PENG Jie LIU Jianbin FANG Min XIE Yi DAI Zhiquan LAI Bo YANG Chunye GONG Xinjun MAO Guo MAO Jie REN School of Computer Science and Technology National University of Defense Technology Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Laboratory of Digitizing Software for Frontier Equipment National University of Defense Technology National Supercomputer Center in Tianjin School of Computer Science Shaanxi Normal University

All-reduce is a widely used communication technique for distributed and parallel applications typically implemented using either a tree-based or ring-based scheme. Each of these approaches has its own limitations: tree-based schemes struggle with efficiently exchanging large messages, while ring-based solutions assume constant communication throughput,an unrealistic expectation in modern network communication infrastructures. We present FMCC-RT, an all-reduce approach that combines the advantages of tree-and ring-based implementations while mitigating their drawbacks. FMCC-RT dynamically switches between tree and ring-based implementations depending on the size of the message being processed. It utilizes an analytical model to assess the impact of message sizes on the achieved throughput, enabling the derivation of optimal work partitioning parameters. Furthermore, FMCC-RT is designed with an Open MPI-compatible API, requiring no modification to user code. We evaluated FMCC-RT through micro-benchmarks and real-world application tests. Experimental results show that FMCC-RT outperforms state-of-the-art tree-and ring-based methods, achieving speedups of up to 5.6×.

关键词： all-reduce collective communication MPI scalability

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I/O Latency Management in Private Cloud Infrastructures 25th

I/O Latency Management in Private Cloud Infrastructures

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25th International Conference on parallel and distributed computing, Applications and Technologies, PDCAT 2024

作者： HoseinyFarahabady, MohammadReza Zomaya, Albert Y. School of Computer Science Center for Distributed and High Performance Computing The University of Sydney SydneyNSW Australia

ISBN: (纸本)9789819642069

This paper examines how co-locating multiple VMs on a single physical server with shared storage impacts I/O performance, specifically focusing on latency of I/O operations, and the overall throughput. We introduce a Proportional-Integral-Derivative (PID) controller to maintain I/O latency close to a predefined target by dynamically adjusting I/O requests based on real-time measurements. Through a series of experiments, we evaluated the effectiveness of our PID controller in comparison to VMware’s default QoS mechanism within a private cloud environment. The results indicate that the PID controller significantly enhances performance for latency-critical workloads, achieving substantially higher compliance with latency targets compared to the default mechanism. However, this prioritization of high-priority VMs comes at the expense of increased latency and reduced throughput for lower-priority workloads during periods of I/O contention. © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025.

关键词： Three term control systems

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Out-of-Memory GPU Sorting Using Asynchronous CUDA Streams 25th

Out-of-Memory GPU Sorting Using Asynchronous CUDA Streams

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25th International Conference on parallel and distributed computing, Applications and Technologies, PDCAT 2024

作者： HoseinyFarahabady, MohammadReza Zomaya, Albert Y. School of Computer Science Center for Distributed and High Performance Computing The University of Sydney SydneyNSW Australia

ISBN: (纸本)9789819642069

Graphics Processing Units (GPUs) are widely used as powerful hardware accelerators for data-intensive tasks. However, their efficacy can be hindered by constraints in device memory and data transfer speeds via the PCI-E link. This paper explores the use of GPUs for executing scalable sorting operations that exceeds the GPU’s global memory by a factor of at least two orders of magnitude. To address this challenge, we leverage the power of NVIDIA’s asynchronous CUDA streams. Our solution enhances GPU performance by implementing a pipeline model to offload sorting operations from the Solid-State Drive (SSD) to GPU memory via the host’s main memory. This strategy maximizes the multiway concurrency level to reduce the overhead associated with data transfer within the GPU memory hierarchy. We perform extensive performance evaluations by sorting 128 billion data elements initially stored on an external NVMe SSD. The results confirm the effectiveness of our approach, showcasing a speed-up of 4.3× compared to the results for CPU-based out-of-memory sorting of skewed data based on Intel’s Threading Building Blocks (TBB) sorting algorithm. Our results include the cost of transfer times to and from the main memory, a factor often overlooked in similar studies. © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025.

关键词： Graphics processing unit

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Comprehensive Deadlock Prevention for GPU Collective Communication 25

Comprehensive Deadlock Prevention for GPU Collective Communi...

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20th European Conference on computer Systems, EuroSys 2025, co-located 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2025

作者： Pan, Lichen Liu, Juncheng Fu, Yongquan Yuan, Jinhui Zhang, Rongkai Li, Pengze Xiao, Zhen School of Computer Science Peking University China OneFlow Research China National Key Laboratory of Parallel and Distributed Computing College of Computer Science and Technology National University of Defense Technology China

ISBN: (纸本)9798400711961

distributed deep neural network training necessitates efficient GPU collective communications, which are inherently susceptible to deadlocks. GPU collective deadlocks arise easily in distributed deep learning applications when multiple collectives circularly wait for each other. GPU collective deadlocks pose a significant challenge to the correct functioning and efficiency of distributed deep learning, and no general effective solutions are currently available. Only in specific scenarios, ad-hoc methods, making an application invoke collectives in a consistent order across GPUs, can be used to prevent circular collective dependency and deadlocks. This paper presents DFCCL, a novel GPU collective communication library that provides a comprehensive approach for GPU collective deadlock prevention while maintaining high performance. DFCCL achieves preemption for GPU collectives at the bottom library level, effectively preventing deadlocks even if applications cause circular collective dependency. DFCCL ensures high performance with its execution and scheduling methods for collectives. Experiments show that DFCCL effectively prevents GPU collective deadlocks in various situations. Moreover, extensive evaluations demonstrate that DFCCL delivers performance comparable to or superior to NCCL, the state-of-the-art collective communication library highly optimized for NVIDIA GPUs. © 2025 Copyright held by the owner/author(s).

关键词： Deep neural networks

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Containerized Data-Flow Processing for Scalable Real-Time Analytics on Edge Devices 25th

Containerized Data-Flow Processing for Scalable Real-Time A...

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25th International Conference on parallel and distributed computing, Applications and Technologies, PDCAT 2024

作者： HoseinyFarahabady, MohammadReza Y. Zomaya, Albert School of Computer Science Center for Distributed and High Performance Computing The University of Sydney SydneyNSW2006 Australia

ISBN: (纸本)9789819642069

The increasing demand for real-time data analysis in Internet of Things (IoT) ecosystems has created several challenges, particularly in environments where resources are limited, and minimizing data processing latency is critical. This paper investigates the use of Linux Containerization (LXC) as a lightweight, resource-efficient alternative to traditional virtual machine managers for accelerating data-flow processing applications. We propose an architecture that integrates Linux Containerization (LXC) with a Proportional-Integral-Derivative (PID) controller to dynamically manage I/O resource allocation, ensuring Quality of Service (QoS) for I/O-intensive data analytics workloads. The proposed PID controller continuously monitors system performance and dynamically adjusts I/O resource allocation to mitigate performance degradation. Through a series of experiments, we demonstrate that LXC-based solutions outperform traditional methods in managing I/O-intensive data analytics workloads in IoT and edge ecosystems. © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025.

关键词： Quality of service

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CTXNL: A Software-Hardware Co-designed Solution for Efficient CXL-Based Transaction Processing 25

CTXNL: A Software-Hardware Co-designed Solution for Efficien...

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30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2025

作者： Wang, Zhao Chen, Yiqi Li, Cong Guan, Yijin Niu, Dimin Guan, Tianchan Du, Zhaoyang Wei, Xingda Sun, Guangyu School of Integrated Circuits School of Computer Science Peking University Beijing China Peking University School of Integrated Circuits Beijing China Damo Academy Alibaba Group Hupan Lab Hangzhou China Shanghai Jiao Tong University Institute of Parallel and Distributed Systems Seiee Shanghai China School of Integrated Circuits Beijing Advanced Innovation Center for Integrated Circuits Peking University Beijing China

ISBN: (纸本)9798400710797

Transaction processing systems are the crux for modern data-center applications, yet current multi-node systems are slow due to network overheads. This paper advocates for Compute Express Link (CXL) as a network alternative, which enables low-latency and cache-coherent shared memory accesses. However, directly adopting standard CXL primitives leads to performance degradation due to the high cost of maintaining cross-node cache coherence. To address the CXL challenges, this paper introduces CTXNL, a software-hardware co-designed system that implements a novel hybrid coherence primitive tailored to the loosely coherent nature of transactional data. The core innovation of CTXNL is empowering transaction system developers with the ability to selectively achieve data coherence. Our evaluations on OLTP workloads demonstrate that CTXNL enhances performance, outperforming current network-based systems and achieves up to 2.08x greater throughput than vanilla CXL memory sharing architectures across universal transaction processing policies. © 2025 ACM.

关键词： Cache memory

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An End-to-End Classification Network Model Based on Hybrid Supervision for Industrial Surface Defect Detection

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International Journal of Pattern Recognition and Artificial Intelligence 2025年第5期39卷

作者： Qin, Runbing Chen, Ningjiang Gan, Shukun Guangxi University School of Computer Electronics and Information Nanning530004 China Education Department of Guangxi Zhuang Autonomous Region Key Laboratory of Parallel Distributed and Intelligent Computing Guangxi University Nanning530004 China Guangxi Intelligent Digital Services Research Center of Engineering Technology Nanning530004 China

Industrial part surface defect detection aims to precisely locate defects in images, which is crucial for quality control in manufacturing. The traditional method needs to be designed in advance, but it has shortcomings in terms of generalization ability. Deep neural network-based defect detection faces issues such as low resolution, data scarcity, labeling costs, and high computation. Therefore, an improved solution is necessary to enhance industrial product quality control efficiency and accuracy. A new method is proposed that utilizes end-to-end training of a two-stage neural network based on segmentation with an extended training process. The gradient flow from the classification to the segmentation network is adjusted to prevent unstable features from interfering with learning. To address the problem of image oversampling and undersampling during training, a frequency sampling scheme for negative samples is introduced. Additionally, positive pixels in the region-based segmentation mask are weighted using the distance transform algorithm so that regions with a high probability of defects can be detected without detailed annotation. Experiments are conducted across three distinct defect datasets by applying hybrid supervision encompassing diverse conditions. In the optimal case, the AP rate of the proposed model on the DAGM and KolektorSDD datasets reaches 100%, and the AP rate on the Severstal Steel dataset reaches 98.99%. The experiments’ results show that the detection accuracy has improved greatly, showing how well the proposed method works in the industry. © 2025 World Scientific Publishing Company.

关键词： Deep neural networks

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Efficient Modeling Attack on Multiplexer PUFs via Kronecker Matrix Multiplication

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IEEE Transactions on computer-Aided Design of Integrated Circuits and Systems 2025年

作者： Wang, Hongfei Wan, Caixue Jin, Hai Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Hubei Key Laboratory of Distributed System Security Hubei Engineering Research Center on Big Data Security School of Cyber Science and Engineering Wuhan430074 China Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Wuhan430074 China

The Physical Unclonable Function (PUF) is valued for its lightweight nature and unique functionality, making it a common choice for securing hardware products requiring authentication and key generation mechanisms. In response to the susceptibility of individual PUFs to modeling attacks, advanced PUF variants have been developed to improve security measures. One notable type in this regard is the multiplexer-based composition of arbiter PUFs, known as MPUF, which aims to meet high reliability and security standards simultaneously. Current research on attacking MPUF encounters challenges such as substantial demands for training CRPs and low success rates. In this work, we propose a novel numerical modeling attack strategy for MPUFs. Using Kronecker products from mathematical perspective, this method precisely describe the MPUF model without using complex network architectures, boosting attack accuracy and overall efficiency. Experiment comparison with state-of-the-art works demonstrates that our method achieves better performance in terms of attack accuracy, robustness, and efficiency. Our method is able to successfully attack a (512, 8)-MPUF in 32.71 minutes with 97.14% accuracy, outperforming all existing attack methods on MPUFs. More, we validate our method through experiments with hardware implementations on FPGAs. The advantages of our method also include the adaptability to be employed to attack other MPUF variations like cMPUF and rMPUF, and the capability to be integrated with an existing attack method for launching efficient attack on MPUFs leveraging reliability information. © 2025 IEEE.

关键词： modeling attack multiplexer-based PUF Physical unclonable function

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FIRE: combining multi-stage filtering with taint analysis for scalable recurring vulnerability detection 24

FIRE: combining multi-stage filtering with taint analysis fo...

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Proceedings of the 33rd USENIX Conference on Security Symposium

作者： Siyue Feng Yueming Wu Wenjie Xue Sikui Pan Deqing Zou Yang Liu Hai Jin National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Hubei Key Laboratory of Distributed System Security Hubei Engineering Research Center on Big Data Security Cluster and Grid Computing Lab and School of Cyber Science and Engineering Huazhong University of Science and Technology China Nanyang Technological University Singapore National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Hubei Key Laboratory of Distributed System Security Hubei Engineering Research Center on Big Data Security Cluster and Grid Computing Lab and School of Cyber Science and Engineering Huazhong University of Science and Technology China and Jinyinhu Laboratory China National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Hubei Key Laboratory of Distributed System Security Hubei Engineering Research Center on Big Data Security Cluster and Grid Computing Lab and School of Computer Science and Technology Huazhong University of Science and Technology China

ISBN: (纸本)9781939133441

With the continuous development of software open-sourcing, the reuse of open-source software has led to a significant increase in the occurrence of recurring vulnerabilities. These vulnerabilities often arise through the practice of copying and pasting existing vulnerabilities. Many methods have been proposed for detecting recurring vulnerabilities, but they often struggle to ensure both high efficiency and consideration of semantic information about vulnerabilities and patches. In this paper, we introduce FIRE, a scalable method for large-scale recurring vulnerability detection. It utilizes multi-stage filtering and differential taint paths to achieve precise clone vulnerability scanning at an extensive scale. In our evaluation across ten open-source software projects, FIRE demonstrates a precision of 90.0% in detecting 298 recurring vulnerabilities out of 385 ground truth instance. This surpasses the performance of existing advanced recurring vulnerability detection tools, detecting 31.4% more vulnerabilities than VUDDY and 47.0% more than MOVERY. When detecting vulnerabilities in large-scale software, FIRE outperforms MOVERY by saving about twice the time, enabling the scanning of recurring vulnerabilities on an ultra-large scale.

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SPECIAL ISSUE ON parallel ALGORITHMS FOR GEOMETRIC PROBLEMS ON DIGITIZED PICTURES

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ALGORITHMICA 1991年第5期6卷 621-623页

作者： DEHNE, F Center for Parallel and Distributed Computing School of Computer Science Carleton University Ottawa Canada

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