检索结果-内蒙古大学图书馆

20th IFIP WG 10.3 International Conference on Network and parallel Computing, NPC 2024

作者： Guo, Mingfeng Deng, Liang Dai, Zhe Li, Ruitian Lin, Gaofeng Liu, Jie Computational Aerodynamics Institute China Aerodynamics Research and Development Center Mianyang China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China

ISBN: (纸本)9789819628292

Sparse triangular solve (SpTRSV) is a vital component in various scientific applications, and numerous GPU-based SpTRSV algorithms have been proposed. Synchronization-free SpTRSV is currently the mainstream algorithm on GPU due to its short preprocessing time and outstanding performance. However, we observed that this algorithm still has two performance bottlenecks. Firstly, the thread-level parallel mode can introduce to thread divergence issues within GPU warps during the writing phase. Secondly, the thread-level and warp-level fusion mode may struggles to fully exploit GPU resources due to suboptimal mapping relationships between rows and threads. To address these issues, this paper proposes DaCPSpTRSV, a new synchronization-free algorithm with GPU-friendly data communication and parallelism strategies. Specifically, we first develop a fast-forward thread-level approach, incorporating an efficient global memory access pattern and a light-weight dependency control mechanism, to optimize data communication and alleviate thread divergence. A fine-grained fusion strategy is then proposed to maximize GPU parallelism by adaptively selecting the suitable thread-level or warp-level modes. Moreover, the commonly-used compressed sparse row (CSR) format is employed in our DaCPSpTRSV, enhancing the versatility of our algorithm. We evaluate our approach using 245 matrices from the SuiteSparse Matrix Collection on two NVIDIA GPUs, demonstrating speedup ratios of up to 4.77×, 4.94×, 1.67×, and 1.62× compared to cuSPARSE, Sync-Free, CapelliniSpTRSV, and YuenyeungSpTRSV, respectively. The project is open-sourced at https://***/gmfff12334/DaCP. © IFIP International Federation for Information processing 2025.

关键词： Graphics processing unit

来源：评论

学校读者我要写书评

暂无评论

FMCC-RT: a scalable and fine-grained all-reduce algorithm for large-scale SMP clusters

引用

Science China(Information Sciences) 2025年第5期68卷 362-379页

作者： Jintao PENG Jie LIU Jianbin FANG Min XIE Yi DAI Zhiquan LAI Bo YANG Chunye GONG Xinjun MAO Guo MAO Jie REN School of Computer Science and Technology National University of Defense Technology Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Laboratory of Digitizing Software for Frontier Equipment National University of Defense Technology National Supercomputer Center in Tianjin School of Computer Science Shaanxi Normal University

All-reduce is a widely used communication technique for distributed and parallel applications typically implemented using either a tree-based or ring-based scheme. Each of these approaches has its own limitations: tree-based schemes struggle with efficiently exchanging large messages, while ring-based solutions assume constant communication throughput,an unrealistic expectation in modern network communication infrastructures. We present FMCC-RT, an all-reduce approach that combines the advantages of tree-and ring-based implementations while mitigating their drawbacks. FMCC-RT dynamically switches between tree and ring-based implementations depending on the size of the message being processed. It utilizes an analytical model to assess the impact of message sizes on the achieved throughput, enabling the derivation of optimal work partitioning parameters. Furthermore, FMCC-RT is designed with an Open MPI-compatible API, requiring no modification to user code. We evaluated FMCC-RT through micro-benchmarks and real-world application tests. Experimental results show that FMCC-RT outperforms state-of-the-art tree-and ring-based methods, achieving speedups of up to 5.6×.

关键词： all-reduce collective communication MPI scalability

来源：评论

学校读者我要写书评

暂无评论

Approximate Iteration Detection and Precoding in Massive MIMO

引用

China Communications 2018年第5期15卷 183-196页

作者： Chuan Tang Yerong Tao Yancang Chen Cang Liu Luechao Yuan Zuocheng Xing Luoyang Electronic Equipment Test Center LuoYang 471000China National Laboratory for Parallel and Distributed Processing National University of Defense TechnologyChangsha 410073China

Massive multiple-input multiple-output provides improved energy efficiency and spectral efficiency in 5 G. However it requires large-scale matrix computation with tremendous complexity, especially for data detection and precoding. Recently, many detection and precoding methods were proposed using approximate iteration methods, which meet the demand of precision with low complexity. In this paper, we compare these approximate iteration methods in precision and complexity, and then improve these methods with iteration refinement at the cost of little complexity and no extra hardware resource. By derivation, our proposal is a combination of three approximate iteration methods in essence and provides remarkable precision improvement on desired vectors. The results show that our proposal provides 27%-83% normalized mean-squared error improvement of the detection symbol vector and precoding symbol vector. Moreover, we find the bit-error rate is mainly controlled by soft-input soft-output Viterbi decoding when using approximate iteration methods. Further, only considering the effect on soft-input soft-output Viterbi decoding, the simulation results show that using a rough estimation for the filter matrix of minimum mean square error detection to calculating log-likelihood ratio could provideenough good bit-error rate performance, especially when the ratio of base station antennas number and the users number is not too large.

关键词： massive MIMO detection and precoding matrix inversion iteration refinement soft Viterbi decoding

来源：评论

学校读者我要写书评

暂无评论

Transfer learning for deep neural network-based partial differential equations solving

引用

Advances in Aerodynamics 2021年第1期3卷 635-648页

作者： Xinhai Chen Chunye Gong Qian Wan Liang Deng Yunbo Wan Yang Liu Bo Chen Jie Liu Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense TechnologyChangshaChina China Aerodynamics Research and Development Center MianyangChina.

Deep neural networks(DNNs)have recently shown great potential in solving partial differential equations(PDEs).The success of neural network-based surrogate models is attributed to their ability to learn a rich set of solution-related ***,learning DNNs usually involves tedious training iterations to converge and requires a very large number of training data,which hinders the application of these models to complex physical *** address this problem,we propose to apply the transfer learning approach to DNN-based PDE solving *** our work,we create pairs of transfer experiments on Helmholtz and Navier-Stokes equations by constructing subtasks with different source terms and Reynolds *** also conduct a series of experiments to investigate the degree of generality of the features between different *** results demonstrate that despite differences in underlying PDE systems,the transfer methodology can lead to a significant improvement in the accuracy of the predicted solutions and achieve a maximum performance boost of 97.3%on widely used surrogate models.

关键词： Deep neural network Partial differential equation Surrogate model Transfer learning

来源：评论

学校读者我要写书评

暂无评论

Design issues of prefetching strategies for heterogeneous software DSM

Design issues of prefetching strategies for heterogeneous so...

引用

6th IEEE International Symposium on Cluster Computing and the Grid, 2006. CCGRID 06

作者： Lu, Ssu-Hsuan Chou, Chien-Lung Wang, Kuang-Jui Wang, Hsiao-Hsi Li, Kuan-Ching Parallel and Distributed Processing Center Dept. of Computer Science and Information Management Providence University Shalu Taichung 43301 Taiwan

ISBN: (纸本)0769525857

In distributed Shared Memory (DSM) systems, one of the major overheads is page fault, because it induces remote memory access latencies. Prefetching strategy permits home nodes sending data to remote nodes in advance, in order to reduce page faults and latencies, as also to improve overall performance;however, it causes accumulated waiting phenomenon, waiting synchronization phenomenon, among others. In heterogeneous environments, considering the fact of different ability among computing hosts, it increases idle time and synchronization time. Therefore, the search for alternatives to reduce these overheads is important. In this paper, we propose a method that utilizes concepts of load balancing in prefetching strategy, where the goal is to reduce idle time and synchronization time. Basically, this approach distributes home pages to appropriate computing nodes and adjusts prefetching strategy's policies into heterogeneous environments. © 2006 IEEE.

关键词： Computer software

来源：评论

学校读者我要写书评

暂无评论

DFTracker: detecting double-fetch bugs by multi-taint parallel tracking

引用

Frontiers of Computer Science 2019年第2期13卷 247-263页

作者： Pengfei WANG Kai LU Gen LI Xu ZHOU Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha 410073 China College of Computer National University of Defense Technology Changsha 410073 China Collaborative Innovation Center of High Performance Computing National University of Defense Technology Changsha 410073 China

A race condition is a common trigger for concurrency bugs. As a special case, a race condition can also occur across the kernel and user space causing a doublefetch bug, which is a field that has received little research attention. In our work, we first analyzed real-world doublefetch bug cases and extracted two specific patterns for doublefetch bugs. Based on these patter ns, we proposed an approach of multi-taint parallel tracking to detect double-fetch bugs. We also implemented a prototype called DFTracker (doublefetch bug tracker), and we evaluated it with our test suite. Our experiments demonstrated that it could effectively find all the double-fetch bugs in the test suite including eight realworld cases with no false negatives and minor false positives. In addition, we tested it on Linux kernel and found a new double-fetch bug. The execution overhead is approximately 2x for single-file cases and approximately 9x for the whole kernel test, which is acceptable. To the best of the authors1 knowledge, this work is the first to introduce multi-taint parallel tracking to double-fetch bug detection—an innovative method that is specific to double-fetch bug features—and has better path coverage as well as lower runtime overhead than the widely used dynamic approaches.

关键词： multi-taint parallel tracking double fetch race condition between kernel and user time of check to time of use real-world case analysis Clang Static Analyzer

来源：评论

学校读者我要写书评

暂无评论

Untrusted Hardware Causes Double-Fetch Problems in the I/O Memory

引用

Journal of Computer Science & Technology 2018年第3期33卷 587-602页

作者： Kai Lu Peng-Fei Wang Gen Li Xu Zhou College of Computer National University of Defense Technology Changsha 410073 China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha 410073 China Collaborative Innovation Center of High-Performance Computing National University of Defense Technology Changsha 410073 China

The double fetch problem occurs when the data is maliciously changed between two kernel reads of the supposedly same data, which can cause serious security problems in the kernel. Previous research focused on the double fetches between the kernel and user applications. In this paper, we present the first dedicated study of the double fetch problem between the kernel and peripheral devices （aka. the hardware double fetch）. Operating systems communicate with peripheral devices by reading from and writing to the device mapped I/O （input and output） memory. Owing to the lack of effective validation of the attached hardware, compromised hardware could flip the data between two reads of the same I/O memory address, causing a double fetch problem. We propose a static pattern-matching approach to identify the hardware double fetches from the Linux kernel. Our approach can analyze the entire kernel without relying on the corresponding hardware. The results are categorized and each category is analyzed using case studies to discuss the possibility of causing bugs. We also find four previously unknown double-fetch vulnerabilities, which have been confirmed and fixed after reporting them to the maintainers.

关键词： hardware double fetch double-fetch bug I/O memory peripheral device double-fetch vulnerability

来源：评论

学校读者我要写书评

暂无评论

Controllable Template Generation for Document-level Event Extraction 4

Controllable Template Generation for Document-level Event Ex...

引用

4th International Conference on Neural Networks, Information and Communication Engineering, NNICE 2024

作者： Fang, Quntian Liu, Feng Huang, Zhen Guo, Zhenliang Wang, Changjian Li, Dongsheng Hu, Minghao National University of Defense Technology National Key Laboratory of Parallel and Distributed Processing Changsha China Academy of Military Sciences Information Research Center Beijing China

ISBN: (纸本)9798350394375

Document-level event extraction task has achieved significant progress based on template generation methods. However, there is no reasonable regulation and restriction in the existing template-based generation methods, which results in the uncontrollability of the generation results. In some scenarios, model generates entities that do not belong to the input text, or generate template content repeatedly. It is determined by the nature of the extraction task and the generation task. To this end, we propose a controllable template generation event extraction model. According to the characteristics of template generation and event extraction tasks, the model devises copy mechanism, inhibition mechanism and rejection mechanism under the appropriately constructed template. Our model achieves state-of-the-art result on MUC-4 dataset, and finally through experimental analysis, it demonstrates the effectiveness of each mechanism we proposed. © 2024 IEEE.

关键词： Extraction

来源：评论

学校读者我要写书评

暂无评论

A mathematical model for empowerment of Beowulf clusters for exascale computing

A mathematical model for empowerment of Beowulf clusters for...

引用

2013 11th International Conference on High Performance Computing and Simulation, HPCS 2013

作者： Mirtaheri, Seyedeh Leili Khaneghah, Ehsan Mousavi Grandinetti, Lucio Sharifi, Mohsen Center of High Performance Computing for Parallel and Distributed Processing University of Calabria Rende Italy School of Computer Engineering Iran University of Science and Technology Tehran Iran

ISBN: (纸本)9781479908363

High-performance computing (HPC) clusters are currently faced with two major challenges - namely, the dynamic nature of new generation of applications and the heterogeneity of platforms - if they are going to be useful for exascale computing. Processes running these applications may well demand unpredictable requirements and changes to system configuration and capabilities at runtime, thereby requiring fast system response without sacrificing the transparency and integrity of the reconfigured empowered system that is running on a heterogeneous platform. While a challenge in and of itself, platform heterogeneity is both useful and instrumental in the handling of unpredictable requests. The realization of such a dynamically reconfigurable and heterogeneous HPC cluster system for exascale computing requires a model to guide running processes to determine if they need empowerment of the current cluster, and if yes, by how much. To show the feasibility of empowerment of traditional HPC clusters for exascale computing, we have selected Beowulf as a noble candidate cluster and present a mathematical model for the empowerment of Beowulf clusters for exascale computing (EBEC). We have developed the model in line with Beowulf's cluster approach and by using vector space algebra. In contrast to traditional hardware-oriented approaches to improvise the performance of clusters, we use a software approach to the development of the proposed model by emphasizing processes, which act as the creators of the cluster and thus should decide on system (re)configuration, as the principal building blocks of the system. We have also adopted a new approach to heterogeneity by considering heterogeneity at different levels including hardware, system software, application software, and system functionality. In addition to support for heterogeneity and dynamic reconfiguration, the proposed model includes support for scalability that is crucial to exascale computing too. © 2013 IEEE.

关键词： Vector spaces

来源：评论

学校读者我要写书评

暂无评论

Galaxyfly: A novel family of flexible-radix low-diameter topologies for large-scales interconnection networks 16

Galaxyfly: A novel family of flexible-radix low-diameter top...

引用

30th International Conference on Supercomputing, ICS 2016

作者： Lei, Fei Dong, Dezun Liao, Xiangke Su, Xing Li, Cunlu National Laboratory for Parallel and Distributed Processing Collaborative Innovation Center of High Performance Computing College of Computer National University of Defense Technology Changsha410073 China

ISBN: (纸本)9781450343619

Interconnection network plays an essential role in the architecture of large-scale high performance computing (HPC) systems. In the paper, we construct a novel family of lowdiameter topologies, Galaxyfly, using techniques of algebraic graphs over finite fields. Galaxyfly is guaranteed to retain a small constant diameter while achieving a flexible tradeoff between network scale and bisection bandwidth. Galaxyfly lowers the demands for high radix of network routers and is able to utilize routers with merely moderate radix to build exascale interconnection networks. We present effective congestion-aware routing algorithms for Galaxyfly by exploring its algebraic property. We conduct extensive simulations and analysis to evaluate the performance, cost and power consumption of Galaxyfly against state-of-the-art topologies. The results show that our design achieves better performance than most existing topologies under various routing algorithms and traffic patterns, and is cost-effective to deploy for exascale HPC systems. © 2016 ACM.

关键词： Topology

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：