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PartialRC: A Partial Recomputing Method for Efficient Fault Recovery on GPGPUs

Journal of Computer Science & Technology 2012年第2期27卷 240-255页

作者：徐新海杨学军薛京灵林宇斐林一松 National Laboratory for Parallel and Distributed Processing School of ComputerNational University of Defense Technology Programming Languages and Compilers Group School of Computer Science and Engineering University of New South Wales

GPGPUs are increasingly being used to as performance accelerators for HPC （High Performance Computing） applications in CPU/GPU heterogeneous computing systems, including TianHe-1A, the world＇s fastest supercomputer in the TOP500 list, built at NUDT （National University of Defense Technology） last year. However, despite their performance advantages, GPGPUs do not provide built-in fault-tolerant mechanisms to offer reliability guarantees required by many HPC applications. By analyzing the SIMT （single-instruction, multiple-thread） characteristics of programs running on GPGPUs, we have developed PartialRC, a new checkpoint-based compiler-directed partial recomputing method, for achieving efficient fault recovery by leveraging the phenomenal computing power of GPGPUs. In this paper, we introduce our PartialRC method that recovers from errors detected in a code region by partially re-computing the region, describe a checkpoint-based faulttolerance framework developed on PartialRC, and discuss an implementation on the CUDA platform. Validation using a range of representative CUDA programs on NVIDIA GPGPUs against FullRC （a traditional full-recomputing Checkpoint-Rollback-Restart fault recovery method for CPUs） shows that PartialRC reduces significantly the fault recovery overheads incurred by FullRC, by 73.5% when errors occur earlier during execution and 74.6% when errors occur later on average. In addition, PartialRC also reduces error detection overheads incurred by FullRC during fault recovery while incurring negligible performance overheads when no fault happens.

关键词： GPGPU partial recomputing fault tolerance CUDA checkpointing

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Integrating novel methodologies, tools, and IT resources for graduate level courses in high performance computing and advanced signal processing algorithms

Integrating novel methodologies, tools, and IT resources for...

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ITHET 2005: 6th International Conference on Information Technology Based Higher Education and Training, 2005

作者： Rodriguez, Domingo A. Santiago, Nayda G. Automated Information Processing Group University of Puerto Rico Mayagüez Parallel and Distributed Processing Group University of Puerto Rico Mayagüez

ISBN: (纸本)0780391411

This work presents an approach at integrating novel methodologies for teaching graduate level courses in the areas of High Performance Computing (HPC) and Advanced Signal processing Algorithms (ASPA) for Computer Engineering and Computer Science and Engineering Curricula. The novel teaching methodology presented here in High Performance Computing centers on the use of innovative empirical methods, i.e., exploratory data analysis, experiment design, etc., for studying computer performance, whereas an operator signal algebra approach is considered a novel methodology for the studying of Advanced Signal processing Algorithms. The work also discusses an on going concerted effort at utilizing common tools and IT resources in both courses to provide students a holistic learning experience. © 2005 IEEE.

关键词： Engineering education

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Design of array processors for 2-D Discrete Fourier Transform

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IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS 1997年第4期E80D卷 455-465页

作者： Peng, ST Sedukhin, I Sedukhin, S Department of Computer Software Distributed Parallel Processing Laboratory University of Aizu Aizu-Wakamatsu-shi. 965 -80 Japan RandD Group Hiwada Electronic Corporation (Pioneer Group) Fukushima-ken 969-13 Japan

In this paper the design of systolic array processors for computing 2-dimensional Discrete Fourier Transform (2-D DFT) is considered. We investigated three different computational schemes for designing systolic array processors using systematic approach. The systematic approach guarantees to find optimal systolic array processors from a large solution space in terms of the number of processing elements and I/O channels, the processing time, topology, pipeline period, etc. The optimal systolic array processors are scalable, modular and suitable for VLSI implementation. An application of the designed systolic array processors to the prime-factor DFT is also presented.

关键词： algorithm mapping 2-dimensional discrete Fourier transform parallelprocessing systolic array processors VLSI architectures

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A Novel network request scheduler for a large scale storage system

A Novel network request scheduler for a large scale storage ...

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作者： Qian, Yingjin Barton, Eric Wang, Tom Puntambekar, Nirant Dilger, Andreas National Laboratory for Parallel and Distributed Processing Changsha China Sun Microsystems Inc Lustre Group PH United States

This paper presents a novel Network Request Scheduler (NRS) for a large-scale, LustreTM storage system. It proposes a quantum-based, Object Based Round Robin (OBRR) NRS algorithm that reorders the execution of I/O requests per data object, presenting a workload to backend storage that can be optimized more easily. According to the drawback of static deadlines in large-scale workloads, it proposes a novel two-level deadline setting strategy that not only avoids starvation, but also guarantees that urgent I/O requests are serviced in a specified time period. Via a series of simulation experiments using a Lustre simulator, it demonstrates that I/O performance increases as much as 40% when using the OBRR NRS algorithm, and the two-level deadline setting strategy can avoid starvation and ensure that urgent I/O requests are serviced in the required time. © 2009 Springer-Verlag.

关键词： Scheduling

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DMSS: A dynamic memory scheduling system in server consolidation environments

DMSS: A dynamic memory scheduling system in server consolida...

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作者： Liu, Lanzheng Chu, Rui Zhu, Yongchun Zhang, Pengfei Wang, Liufeng National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha China Systems and Technology Group IBM China Beijing China

ISBN: (纸本)9780769546698

As the foundation of cloud computing, Server consolidation allows multiple computer infrastructures running as virtual machines in a single physical node. It improves the utilization of most kinds of resource but memory under x86 architecture. Because of inaccurate memory usage estimate and the lack of memory resource management, there is much service performance degradation in data centers, even though they have occupied a large amount of memory. Furthermore, memory becomes insufficient for a physical server when a lot of virtual machines depend on it. In order to improve this, we present a dynamic memory scheduling system called DMSS, which can manage memory resources in server consolidation environments and allocate memory among virtual machines on demand. We have designed and implemented the corresponding memory scheduling policy based on Xen virtualization platform to enhance memory efficiency and achieve service level agreement. The benchmark shows that DMSS can make an accurate and rapid response to memory changes and save more than 30% physical memory with less than 5% performance degradation. DMSS actually brings in economic benefits to cloud service providers because more virtual machines can be accommodated at lower costs. © 2012 IEEE.

关键词： Virtual machine

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Efficient queue and GSI security management framework for mobile desktop grid

Efficient queue and GSI security management framework for mo...

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International Conference on distributed Framework and Applications, DFmA

作者： Muhammad Imran Sarwar Mohamad Azam Osman Parallel and Distributed Processing Research Group School ofComputer Sciences Universiti Sains Malaysia Penang Malaysia

This research proposes job request management system (JRMS) which is robust against network coverage and battery power failure and manages the request messages on the local storage media while mobile disconnection or battery power failure. Password-based authentication system and lightweight Blowfish cryptography are used for secure data request transmission between the mobile device and the grid proxy server. We justify our work on the basis of quantitative and qualitative research evaluation which proves that our framework is effective as well as efficient for high-end mobile devices.

关键词： Security Mobile computing Grid computing Power system management Computer architecture Elliptic curve cryptography Battery management systems Energy management Network servers Robustness

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Succinct representations in collaborative filtering: A case study using wavelet tree on 1,000 cores 20

Succinct representations in collaborative filtering: A case ...

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20th International Conference on parallel and distributed Computing, Applications and Technologies, PDCAT 2019

作者： Peng, Xiangjun Wang, Qingfeng Sun, Xu Gong, Chunye Wang, Yaohua User-Centric Computing Group University of Nottingham Ningbo China China Department of Computer Science and Technology National University of Defense Technology China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology China

ISBN: (纸本)9781728126166

User-Item (U-I) matrix has been used as the dominant data infrastructure of Collaborative Filtering (CF). To reduce space consumption in runtime and storage, caused by data sparsity and growing need to accommodate side information in CF design, one needs to go beyond the U-I Matrix. In this paper, we took a case study of Succinct Representations in Collaborative Filtering, rather than using a U-I Matrix. Our key insight is to introduce Succinct Data Structures as a new infrastructure of CF. Towards this, we implemented a User-based K-Nearest-Neighbor CF prototype via Wavelet Tree, by first designing a Accessible Compressed Documents (ACD) to compress U-I data in Wavelet Tree, which is efficient in both storage and runtime. Then, we showed that ACD can be applied to develop an efficient intersection algorithm without decompression, by taking advantage of ACD's characteristics. We evaluated our design on 1,000 cores of Tianhe-II supercomputer, with one of the largest public data set ml-20m. The results showed that our prototype could achieve 3.7 minutes on average to deliver the results. © 2019 IEEE.

关键词： Collaborative filtering

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A High-Throughput Multi-Cluster NoC Architecture

A High-Throughput Multi-Cluster NoC Architecture

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11th IEEE International Conference on Computational Science and Engineering (CSE 2008)

作者： Henrique C. Freitas Philippe O. A. Navaux Parallel and Distributed Processing Group Graduate Program in Computer Science Universidade Federal do Rio Grande do Sul Brazil

During the last years a large number of research works has focused on problems related to multi-core processors. Due to the possibilities of many cores, the number of opportunities in High Performance Computing (HPC) has grown a lot. In fact, new fields related to HPC and processor architecture increase the future possibilities of a Grid-on-Chip (GoC). The goal of this paper is to show a high-throughput MCNoC (Multi-Cluster Network-on-Chip) as an alternative architecture to support clusters of cores and Grid features. In this new scenario data throughput, flexibility, and scalability are very important. The results verify that MCNoC has a similar area occupation and a better data throughput than a traditional Network-on-Chip.

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DMSS: A Dynamic Memory Scheduling System in Server Consolidation Environments

DMSS: A Dynamic Memory Scheduling System in Server Consolida...

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IEEE International Symposium on Object/Component/Service-Oriented Real-Time distributed Computing Workshops (ISORCW)

作者： Lanzheng Liu Rui Chu Yongchun Zhu Pengfei Zhang Liufeng Wang National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha China Systems and Technology Group IBM China Beijing China

关键词： Memory management Virtual machine monitors Monitoring Resource management Servers Dynamic scheduling Degradation

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Succinct Representations in Collaborative Filtering: A Case Study using Wavelet Tree on 1,000 Cores

Succinct Representations in Collaborative Filtering: A Case ...

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IEEE International Conference on parallel and distributed Computing, Applications and Technologies (PDCAT)

作者： Xiangjun Peng Qingfeng Wang Xu Sun Chunye Gong Yaohua Wang User-Centric Computing Group University of Nottingham Ningbo China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology

ISBN: (数字)9781728126166

ISBN: (纸本)9781728126173

关键词： Vegetation Collaboration Filtering Data structures Runtime Indexes Time complexity

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