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Journal of Software 2009年第3期4卷 240-246页

作者： Lu, Pingjing Che, Yonggang Wang, Zhenghua National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha 410073 China

The performance gap for high performance applications has been widening over time. High level program transformations are critical to improve applications' performance, many of which concern the determination of optimal values for transformation parameters, such as loop unrolling and blocking. Static approaches achieve these values based on analytical models that are hard to achieve because of increasing architecture complexity and code structures. Recent iterative compilation approaches achieve it by executing different versions of the program on actual platforms and select the one that renders best performance, outperforming static compilation approaches significantly. But the expensive compilation cost has limited their application scope to embedded applications and a small group of math kernels. This paper proposes a combinative approach--Combining Model and Iterative Compilation for Program Performance Optimization (CMIC). Such an approach first constructs a program optimization transformation model based on hardware performance counters to decide how and when to apply transformations, and then selects the optimal transformation parameters using Nelder-Mead simplex algorithm. Experimental results show that our approach can effectively improve programs' floating-point performance, reducing programs' runtime, therefore, lessening the performance gap for high-performance applications. © 2009 ACADEMY PUBLISHER.

关键词： Digital arithmetic

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Fast garment simulation with aid of hybrid bones

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Journal of Central South University 2015年第6期22卷 2218-2226页

作者：吴博陈寅徐凯程志全熊岳山 College of Computer National University of Defense Technology Science and Technology on Parallel and Distributed Processing Laboratory (National University of Defense Technology) Avatar Science Company

A data-driven method was proposed to realistically animate garments on human poses in reduced space. Firstly, a gradient based method was extended to generate motion sequences and garments were simulated on the sequences as our training data. Based on the examples, the proposed method can fast output realistic garments on new poses. Our framework can be mainly divided into offline phase and online phase. During the offline phase, based on linear blend skinning(LBS), rigid bones and flex bones were estimated for human bodies and garments, respectively. Then, rigid bone weight maps on garment vertices were learned from examples. In the online phase, new human poses were treated as input to estimate rigid bone transformations. Then, both rigid bones and flex bones were used to drive garments to fit the new poses. Finally, a novel formulation was also proposed to efficiently deal with garment-body penetration. Experiments manifest that our method is fast and accurate. The intersection artifacts are fast removed and final garment results are quite realistic.

关键词： data-driven linear blend skinning hybrid bones interactive

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Superscalar communication: A runtime optimization for distributed applications

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Science China(Information Sciences) 2010年第10期53卷 1931-1946页

作者： LI HuiBa , LIU ShengYun, PENG YuXing, LI DongSheng, ZHOU HangJun & LU XiCheng National laboratory for parallel and distributed processing, National University of Defense Technology, Changsha 410073, China 1. National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha 410073 China

Building distributed applications is difficult mostly because of concurrency management. Existing approaches primarily include events and threads. Researchers and developers have been debating for decades to prove which is superior. Although the conclusion is far from obvious, this long debate clearly shows that neither of them is perfect. One of the problems is that they are both complex and error-prone. Both events and threads need the programmers to explicitly manage concurrencies, and we believe it is just the source of difficulties. In this paper, we propose a novel approach—superscalar communication, in which concurrencies are automatically managed by the runtime system. It dynamically analyzes the programs to discover potential concurrency opportunities; and it dynamically schedules the communication and the computation tasks, resulting in automatic concurrent execution. This approach is inspired by the idea of superscalar technology in modern microprocessors, which dynamically exploits instruction-level parallelism. However, hardware superscalar algorithms do not fit software in many aspects, thus we have to design a new scheme completely from scratch. Superscalar communication is a runtime extension with no modification to the language, compiler or byte code, so it is good at backward compatibility. Superscalar communication is likely to begin a brand new research area in systems software, which is characterized by dynamic optimization for networking programs.

关键词： network programming concurrency event thread superscalar

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Game-based software errors detection

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Advances in Information Sciences and Service Sciences 2012年第15期4卷 426-433页

作者： Chen, Jie National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha 410073 China

Software security is one of the most important aspects of software quality, but errors in programs are still inevitable. Despite the development of static and dynamic analysis, the useful but costly manual analysis is still heavily used. In this paper, we propose a human computation game based software error detection mechanism. The purpose of our mechanism is to improve the effectiveness and efficiency of manual error detection. The framework includes four main steps: 1) get all suspicious error locations by static tools according to different security properties;2) slice the programs from each error location;3) construct games for each slice and show them to players;4) collect game information and generate the final error report. We evaluate our approach by instantiating it for detecting errors of buffer overflow. The results show that our technique is successful in practice.

关键词： Error detection

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MPtostream:an OpenMP compiler for CPU-GPU heterogeneous parallel systems

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Science China(Information Sciences) 2012年第9期55卷 1961-1971页

作者： YANG XueJun,TANG Tao ,WANG GuiBin,JIA Jia & XU XinHai National laboratory for parallel and distributed processing,National University of Defense Technology,Changsha 410073,China 1. National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha 410073 China

In light of GPUs’ powerful floating-point operation capacity,heterogeneous parallel systems incorporating general purpose CPUs and GPUs have become a highlight in the research field of high performance computing(HPC).However,due to the complexity of programming on GPUs,porting a large number of existing scientific computing applications to the heterogeneous parallel systems remains a big *** OpenMP programming interface is widely adopted on multi-core CPUs in the field of scientific *** effectively inherit existing OpenMP applications and reduce the transplant cost,we extend OpenMP with a group of compiler directives,which explicitly divide tasks among the CPU and the GPU,and map time-consuming computing fragments to run on the GPU,thus dramatically simplifying the *** have designed and implemented MPtoStream,a compiler of the extended OpenMP for AMD’s stream processing *** experimental results show that programming with the extended directives deviates from programming with OpenMP by less than 11% modification and achieves significant speedup ranging from 3.1 to 17.3 on a heterogeneous system,incorporating an Intel Xeon E5405 CPU and an AMD FireStream 9250 GPU,over the execution on the Xeon CPU alone.

关键词： GPGPU stream OpenMP compiler

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Comparison of heavy-ion induced SEU for D- and TMR-flip-flop designs in 65-nm bulk CMOS technology

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Science China(Information Sciences) 2014年第10期57卷 223-229页

作者： HE YiBai CHEN ShuMing School of Computer Science National University of Defense Technology Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology

Heavy ion experiments were performed on D flip-flop(DFF) and TMR flip-flop(TMRFF) fabricated in a 65-nm bulk CMOS process. The experiment results show that TMRFF has about 92% decrease in SEU crosssection compared to the standard DFF design in static test mode. In dynamic test mode, TMRFF shows much stronger frequency dependency than the DFF design, which reduces its advantage over DFF at higher operation frequency. At 160 MHz, the TMRFF is only 3.2× harder than the standard DFF. Such small improvement in the SEU performance of the TMR design may warrant reconsideration for its use in hardening design.

关键词： SEU flip-flop TMR heavy-ion frequency

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Heterogeneity-aware Peak Power Management for Accelerator-based Systems

Heterogeneity-aware Peak Power Management for Accelerator-ba...

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17th IEEE International Conference on parallel and distributed Systems (ICPADS)

作者： Wang, Guibin Lin, Yisong National Laboratory for Parallel and Distributed Processing National University of Defense Technology China

ISBN: (纸本)9780769545769

Power management has become one of the first-order considerations in high performance computing field. Many recent studies focus on optimizing the performance of a computer system within a given power budget. However, most existing solutions adopt fixed period control mechanism and are transparent to the running applications. Although the application-transparent control mechanism has relatively good portability, it exhibits low efficiency in accelerator-based heterogeneous parallel systems. In typical accelerator-based parallel systems, different processing units have largely different processing speeds and power consumption. Under a given power constraint, how to choose the processor to be slowed down and how to schedule a parallel task onto different processors for the maximum performance are different from those in homogeneous systems and have not been well studied. From the motivating example in this paper, we could find that in order to efficiently harness the heterogeneous parallel processing, one should not only perform dynamic voltage/frequency scaling (DVFS) to meet the power budget, but also tune the parallel task scheduling to adapt to the changes. In this paper, we propose a heterogeneity-aware peak power management, which extends existing application-transparent power controller with an application-aware power controller. Firstly, we theoretically analyze the conditions for the maximum performance given a power budget for heterogeneous systems. Based on this result, we provide a power-constrained parallel task partition algorithm, which coordinates parallel task partition and voltage scaling for heterogeneous processing units to achieve the optimal performance given a system power budget. Finally, we evaluate the proposed method on a typical CPU-GPU heterogeneous system, and validate the superiority of application-aware power controller over the existing method.

关键词： Accelerator-based Systems Peak Power Management GPU

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A fast successive over-relaxation algorithm for force-directed network graph drawing

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Science China(Information Sciences) 2012年第3期55卷 677-688页

作者： WANG YongXian & WANG ZhengHua National Key laboratory for parallel and distributed processing, National University of Defense Technology, Changsha 410073, China 1. National Key Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha 410073 China

Force-directed approach is one of the most widely used methods in graph drawing research. There are two main problems with the traditional force-directed algorithms. First, there is no mature theory to ensure the convergence of iteration sequence used in the algorithm and further, it is hard to estimate the rate of convergence even if the convergence is satisfied. Second, the running time cost is increased intolerablely in drawing largescale graphs, and therefore the advantages of the force-directed approach are limited in practice. This paper is focused on these problems and presents a sufficient condition for ensuring the convergence of iterations. We then develop a practical heuristic algorithm for speeding up the iteration in force-directed approach using a successive over-relaxation (SOR) strategy. The results of computational tests on the several benchmark graph datasets used widely in graph drawing research show that our algorithm can dramatically improve the performance of force-directed approach by decreasing both the number of iterations and running time, and is 1.5 times faster than the latter on average.

关键词： graph drawing graph layout successive over-relaxation force-directed algorithm

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Mobility of internet-based virtual computing environment

Mobility of internet-based virtual computing environment

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15th International Conference on parallel and distributed Systems, ICPADS '09

作者： Shen, Siqi Wang, Ji Shen, Rui Zhang, Shengdong Fan, Pei National Laboratory for Parallel and Distributed Processing Changsha 410073 China

ISBN: (纸本)9780769539003

The Internet-based Virtual Computing Environment (iVCE) provides on-demand aggregation and autonomic collaboration mechanisms to facilitate the utilization of autonomous and dynamic Internet resources. Load balancing and fault tolerance are important issues when scheduling those transient resources. In this paper, we propose a mobility mechanism for the migration of various roles of agents in the iVCE platform. The mobility mechanism involves two parts of the iVCE platform: role container layer and event service layer. At the role container layer, a novel approach is proposed to handle the code and data mobility issue. At the event service layer, an efficient routing reconfiguration protocol is proposed based on a publish/subscribe system over DHTs to facilitate task migrations. Certain conditions must be satisfied before the migration of an agent to ensure the correctness of the whole process. Experiments are conducted to evaluate the performance of the mobility mechanism, and the experimental results show that it is suitable for implementing load balancing and fault tolerance in the iVCE. © 2009 IEEE.

关键词： Fault tolerance

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PS-SIM: An Execution-Driven Performance Simulation Technology Based on Process-Switch

PS-SIM: An Execution-Driven Performance Simulation Technolog...

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International Conference on Advances in Computer Science, Environment, Ecoinformatics, and Education

作者： Guo, Xiaowei Lin, Yufei Xu, Xinhai Zhang, Xin National Laboratory for Parallel and Distributed Processing National University of Defense Technology China

ISBN: (纸本)9783642233234

Nowadays, the performance of large-scale parallel computer system improves continuously, and the system scale becomes extremely large. Performance prediction has become an important approach to guide system design, implementation and optimization. Simulation method is the most widely used performance prediction technology for large-scale parallel computer system. In this paper, after analyzing the extant problems, we proposed a novel execution-driven performance simulation technology based on process-switch. We designed a simulation framework named PS-SIM, and implemented a prototype system based on MPICH2. Finally, we verified the proposed approach by experiments. Experimental results show that the approach has high accuracy and simulation performance.

关键词： Performance Prediction Large-Scale parallel Computer System Execution-Driven Simulation MPICH

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