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IEEE International Symposium on Information (IT) in Medicine and Education, ITME

作者： Qinglin Wang Jie Liu Peizhen Xie Chunye Gong Yuan Li Zuocheng Xing School of Computer Science National University of Defense Technology Changsha China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China

Monte Carlo (MC) simulation plays an important part in dose calculation for radiotherapy treatment planning. Since the accuracy of MC simulation relies on the number of simulated particles histories, it's very time-consuming. The Intel Many Integrated Core (MIC) architecture, which consists of more than 50 cores and supports many parallel programming models, provides an efficient alternative for accelerating MC dose calculation. This paper implements the OpenMP-based MC Dose Planning Method (DPM) for radiotherapy treatment problems on the Intel MIC architecture. The implementation has been verified on the target MIC coprocessor including 57 cores. The results demonstrate that the OpenMP-based DPM implementation exhibits very accurate results and achieves the maximum speedup of 10.53 times in comparison to the original DPM one on a Xeon E5-2670 CPU. Additionally, speedup and efficiency of the implementation running on the different number of cores in MIC are also reported.

关键词： Microwave integrated circuits Instruction sets computer architecture Photonics Computational modeling History Interpolation

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HybridSwap: A scalable and synthetic framework for guest swapping on virtualization platform

HybridSwap: A scalable and synthetic framework for guest swa...

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IEEE Annual Joint Conference: INFOCOM, IEEE computer and Communications Societies

作者： Pengfei Zhang Xi Li Rui Chu Huaimin Wang National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha China School of Information Science and Engineering Central South University Changsha China

In IaaS cloud environments, peak memory demand caused by hotspot applications in Virtual Machine (VM) often results in performance degradation within and outside of this VM. Some solutions such as host swapping and ballooning for memory consolidation and overcommitment have been proposed. These solutions, however, have no help for addressing guest swapping issues inside VM. Even though host holds sufficient memory pages, guest OS is unable to utilize free pages in host directly due to the semantic gap between VMM and it. Our goal is to alleviate the performance degradation by decreasing disk I/O operations generated by guest swapping. Based on the insight analysis of behavioral features of guest swapping, we design HybridSwap, a distributed scalable framework which organize surplus memory in all hosts within data center into virtual pools for swapping. This framework builds up a synthetic swapping mechanism in a peer-to-peer way, which VM can adaptively choose suitable pools for swapping. We implement the prototype of HybridSwap and evaluate it with different benchmarks. The results demonstrate that our solution has the ability to promote the guest swapping efficiency indeed. Even in some cases, it shows 2-5 times of performance promotion compared with the baseline setup.

关键词： Benchmark testing Virtualization Semantics Servers Operating systems Degradation Instruction sets

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Memory Access Analysis of Many-core System with Abundant Bandwidth

Memory Access Analysis of Many-core System with Abundant Ban...

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IEEE International Symposium on Embedded Multicore Socs (MCSoC)

作者： Chuan Tang Dan Liu Zuocheng Xing Peng Yang Zhe Wang Jiang Xu Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China Department of Electronic and Computer Engineering Hong Kong University of Science and Technology Hong Kong China

ISBN: (纸本)9781479986712

Many-core system is main architecture trend currently. One of the dominating challenges for on-chip manycore system is the memory wall. However traditional research primarily focus on the limited bandwidth. To solve this problem, many-core system is aided with large cache, and a lot of complex approaches about memory and cache are adopted aiming at relaxing the pressure of bandwidth and improving the efficiency of cache. All these methods generate much cost of area and power. In this paper, we are motivated by the feature of abundant bandwidth and low latency of optical interconnect. We analyze the characteristics of memory access on 64 cores system under the case of high bandwidth which can be assumed to benefit from optical interconnect, considering the sensibility with bandwidth and cache for different benchmarks. Finally, we discuss about promising basic frameworks suitable for manycore system with optical interconnect.

关键词： Bandwidth Benchmark testing Optical interconnections Random access memory Delays Hidden Markov models computers

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Design and Implementation of a Highly Efficient DGEMM for 64-Bit ARMv8 Multi-core Processors

Design and Implementation of a Highly Efficient DGEMM for 64...

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International Conference on parallel processing (ICPP)

作者： Feng Wang Hao Jiang Ke Zuo Xing Su Jingling Xue Canqun Yang School of Computer Science National University of Defense Technology Changsha China School of Computer Science and Engineering University of New South Wales NSW Australia Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China

This paper presents the design and implementation of a highly efficient Double-precision General Matrix Multiplication (DGEMM) based on Open BLAS for 64-bit ARMv8 eight-core processors. We adopt a theory-guided approach by first developing a performance model for this architecture and then using it to guide our exploration. The key enabler for a highly efficient DGEMM is a highly-optimized inner kernel GEBP developed in assembly language. We have obtained GEBP by (1) maximizing its compute-to-memory access ratios across all levels of the memory hierarchy in the ARMv8 architecture with its performance-critical block sizes being determined analytically, and (2) optimizing its computations through exploiting loop unrolling, instruction scheduling and software-implemented register rotation and taking advantage of A64 instructions to support efficient FMA operations, data transfers and prefetching. We have compared our DGEMM implemented in Open BLAS with another implemented in ATLAS (also in terms of a highly-optimized GEBP in assembly). Our implementation outperforms the one in ALTAS by improving the peak performance (efficiency) of DGEMM from 3.88 Gflops (80.9%) to 4.19 Gflops (87.2%) on one core and from 30.4 Gflops (79.2%) to 32.7 Gflops (85.3%) on eight cores. These results translate into substantial performance (efficiency) improvements by 7.79% on one core and 7.70% on eight cores. In addition, the efficiency of our implementation on one core is very close to the theoretical upper bound 91.5% obtained from micro-benchmarking. Our parallel implementation achieves good performance and scalability under varying thread counts across a range of matrix sizes evaluated.

关键词： Registers Kernel Computational modeling Program processors Assembly Memory management

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Completion time-a ware flow scheduling in heterogenous networks 1

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15th International Conference on Algorithms and Architectures for parallel processing, ICA3PP 2015

作者： He, Shiming Xie, Kun Zhang, Dafang Hunan Provincial Key Laboratory of Intelligent Processing of Big Data on Transportation School of Computer and Communication Engineering Hunan Province Engineering Research Center of Electric Transportation and Smart Distributed Network Changsha University of Science and Technology Changsha410114 China College of Computer Science and Electronics Engineering Hunan University Changsha410082 China Department of Electrical and Computer Engineering State University of New York at Stony Brook NY United States

ISBN: (数字)9783319271194

ISBN: (纸本)9783319271187

In China, the expressway isn’t free. When a vehicle exits, the exit toll station needs to calculate the toll according to the vehicle trajectory obtained by sending a trajectory query task to the trajectory center remotely. For the accurate of toll and keep the exit smoothly, transmitting the trajectory result reliably and in time is a key issue. There are three heterogenous networks in expressway, Fibernet, Telecommunications Network and 3G. We concurrently exploit three heterogenous networks by allocating the trajectory result into three sub-flows where each sub-flow is transmitted in one kind of networks. But existing multipath transfer solution(FMTCP) doesn’t consider the difference of completed time among all sub-flows and can’t make sure the completed time in time. Therefore, we formulate the sub-flows schedule as a integer programming problem, which is proved to be NP-hard problem, and propose a Completion time-aware Flow Scheduling scheme (CaFS) which calculates the size of sub-flows. For the reliably, it exploits generation-based network coding. For the transmission in time, CaFS allocates the size of sub-flow into suitable generation and scheduling the generations. The simulation results demonstrate that, comparing with the FMTCP, CaFS improves 31. 9% in completion time and 30% in task finished rate. © Springer International Publishing Switzerland 2015.

关键词： Network coding

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Fast image matching algorithm based on affine invariants

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Journal of Central South University 2014年第5期21卷 1907-1918页

作者：张毅卢凯高颖慧 National Laboratory for Parallel and Distributed Processing(National University of Defense Technology) College of Computer National University of Defense Technology College of Electronic Science and Engineering National University of Defense Technology

Feature-based image matching algorithms play an indispensable role in automatic target recognition （ATR）. In this work, a fast image matching algorithm （FIMA） is proposed which utilizes the geometry feature of extended centroid （EC） to build affine invariants. Based on at-fine invariants of the length ratio of two parallel line segments, FIMA overcomes the invalidation problem of the state-of-the-art algorithms based on affine geometry features, and increases the feature diversity of different targets, thus reducing misjudgment rate during recognizing targets. However, it is found that FIMA suffers from the parallelogram contour problem and the coincidence invalidation. An advanced FIMA is designed to cope with these problems. Experiments prove that the proposed algorithms have better robustness for Gaussian noise, gray-scale change, contrast change, illumination and small three-dimensional rotation. Compared with the latest fast image matching algorithms based on geometry features, FIMA reaches the speedup of approximate 1.75 times. Thus, FIMA would be more suitable for actual ATR applications.

关键词： affine invariants image matching extended centroid robustness performance

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An Efficient Identity-Based Key Agreement Protocol in a Multiple PKG Environment

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Wuhan University Journal of Natural Sciences 2014年第5期19卷 455-460页

作者： ZHOU Huan WANG Xiaofeng SU Jinshu School of Computer National University of Defense Technology National Laboratory for Parallel and Distributed Processing National University of Defense Technology

Identity-based key agreement protocol affords a natural way to combine the participant＇s identity with its public key. However, most of them just consider the key agreement in a single private key generator （PKG） environment. In addition, the existing key agreement protocols have a great computing overhead for mobile computing which is more and more popular today. This paper proposes a new identity based key agreement protocol. With the help of mathematical tools, we make our protocol applied in multiple PKG environment. It also satisfies all the security properties which is set for key agreement protocol. Moreover, some of its time-consuming operations can be delivered to untrusted public computation resources, so its computing complexity can be greatly reduced.

关键词： key agreement identity based public computation multiple PKG environment

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Accelerating FDTD simulation of microwave pulse coupling into narrow slots on the Intel MIC architecture

Accelerating FDTD simulation of microwave pulse coupling int...

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IEEE Pacific Rim Conference on Communications, computers and Signal processing

作者： Qinglin Wang Jie Liu Xiantao Cui Guitao Fu Chunye Gong Zuocheng Xing School of Computer Science National University of Defense Technology Changsha China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China Beijing Satellite Navigation Center Beijing China

ISBN: (纸本)9781467377898

The coupling of microwaves into apertures plays an important part in many electromagnetic physics and engineering fields. When the width of apertures is very small, Finite Difference Time Domain (FDTD) simulation of the coupling is very time-consuming. As a many-core architecture, the Intel's Many Integrated Core (MIC) architecture owns 512-bit vector units and more than 200 threads. In this paper, we parallelize FDTD simulation of microwave pulse coupling into narrow slots on the Intel MIC architecture. In the implementation, the parallel programming model OpenMP is used to exploit thread parallelism while loop unrolling and SIMD intrinsic functions are utilized to accomplish vectorization. Compared with the serial version on Intel Xeon E5-2670 CPU, the implementation on the MIC coprocessor including 57 cores obtains a speedup of 11.57 times. The experiment results also demonstrate that the parallelization has good scalability in performance. Additionally, how binding relationship between OpenMP threads and hardware threads in MIC influences performance is also reported.

关键词： Microwave integrated circuits Finite difference methods Time-domain analysis Chlorine Hardware

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DREAMS: Dynamic resource allocation for MapReduce with data skew

DREAMS: Dynamic resource allocation for MapReduce with data ...

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IFIP/IEEE International Symposium on Integrated Network Management

作者： Zhihong Liu Qi Zhang Mohamed Faten Zhani Raouf Boutaba Yaping Liu Zhenghu Gong College of Computer National University of Defense Technology Changsha China David R. Cheriton School of Computer Science University of Waterloo Waterloo ON Canada Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha Hunan China

ISBN: (纸本)9781479982424

MapReduce has become a popular model for large-scale data processing in recent years. However, existing MapRe-duce schedulers still suffer from an issue known as partitioning skew, where the output of map tasks is unevenly distributed among reduce tasks. In this paper, we present DREAMS, a framework that provides run-time partitioning skew mitigation. Unlike previous approaches that try to balance the workload of reducers by repartitioning the intermediate data assigned to each reduce task, in DREAMS we cope with partitioning skew by adjusting task run-time resource allocation. We show that our approach allows DREAMS to eliminate the overhead of data repartitioning. Through experiments using both real and synthetic workloads running on a 11-node virtual virtualised Hadoop cluster, we show that DREAMS can effectively mitigate negative impact of partitioning skew, thereby improving job performance by up to 20.3%.

关键词： Resource management Containers Predictive models Mathematical model Monitoring Biomedical monitoring Yarn

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Privacy preserving for network coding in smart grid 15th

Privacy preserving for network coding in smart grid

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15th International Conference on Algorithms and Architectures for parallel processing, ICA3PP 2015

作者： He, Shiming Zeng, Weini Xie, Kun Hunan Provincial Key Laboratory of Intelligent Processing of Big Data on Transportation School of Computer and Communication Engineering Hunan Province Engineering Research Center of Electric Transportation and Smart Distributed Network Changsha University of Science and Technology Changsha410114 China The 716th Research Institute China Shipbuilding Industry Corporation Lianyungang222061 China College of Computer Science and Electronics Engineering Hunan University Changsha410082 China Department of Electrical and Computer Engineering State University of New York at Stony Brook New York United States

ISBN: (纸本)9783319271361

In smart grid, privacy implications to individuals and their family is an important issue, due to the fine-grained usage data collection. Wireless communications are considered by many utility companies to obtain information. Network coding is exploited in smart grids, to enhance network performance in terms of throughput, delay, robustness, and energy consumption. However, Network Coding introduces new challenge for privacy preserving due to the encoding of packet in forwarder nodes. We propose a distributed privacy preserving scheme for network coding in smart grid, which considers the converged flows character of smart grid and exploits a homomorphic encryption function to decrease the complex in forwarder node. The message content of packet is encrypted and the tag of packet is encrypted by homomorphic encryption function. Then the forwarder node linear random codes the encrypted message contents and directly processes the tags cryptotext based on the homomorphism feature. It offers message content confidentiality privacy preserving feature, which can efficiently thwart traffic analysis. Extensive security analysis and performance evaluations demonstrate the validity and efficiency of the proposed scheme. © Springer International Publishing Switzerland 2015.

关键词： Smart power grids

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