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检索条件"机构=Parallel and Distributed Processing Laboratory School of Computer Engineering"

共 458 条记录，以下是311-320 订阅

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Kernel Fusion: An Effective Method for Better Power Efficiency on Multithreaded GPU

Kernel Fusion: An Effective Method for Better Power Efficien...

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IEEE/ACM Int'l Conference on & Int'l Conference on Cyber, Physical and Social Computing (CPSCom) Green Computing and Communications (GreenCom)

作者： Guibin Wang YiSong Lin Wei Yi National Laboratory of Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha Hunan China

ISBN: (纸本)9781424497799

As one of the most popular accelerators, Graphics processing Unit (GPU) has demonstrated high computing power in several application fields. On the other hand, GPU also produces high power consumption and has been one of the most largest power consumers in desktop and supercomputer systems. However, software power optimization method targeted for GPU has not been well studied. In this work, we propose kernel fusion method to reduce energy consumption and improve power efficiency on GPU architecture. Through fusing two or more independent kernels, kernel fusion method achieves higher utilization and much more balanced demand for hardware resources, which provides much more potential for power optimization, such as dynamic voltage and frequency scaling (DVFS). Basing on the CUDA programming model, this paper also gives several different fusion methods targeted for different situations. In order to make judicious fusion strategy, we deduce the process of fusing multiple independent kernels as a dynamic programming problem, which could be well solved with many existing tools and be simply embedded into compiler or runtime system. To reduce the overhead introduced by kernel fusion, we also propose effective method to reduce the usage of shared memory and coordinate the thread space of the kernels to be fused. Detailed experimental evaluation validates that the proposed kernel fusion method could reduce energy consumption without performance loss for several typical kernels.

关键词： Kernel Instruction sets Graphics processing unit Energy consumption Hardware Mathematical model Dynamic programming

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Power-Efficient Work Distribution Method for CPU-GPU Heterogeneous System

Power-Efficient Work Distribution Method for CPU-GPU Heterog...

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International Symposium on parallel and distributed processing with Applications, ISPA

作者： Guibin Wang Xiaoguang Ren National Laboratory of Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha Hunan China

As the system scales up continuously, the problem of power consumption for high performance computing (HPC) system becomes more severe. Heterogeneous system integrating two or more kinds of processors, could be better adapted to heterogeneity in applications and provide much higher energy efficiency in theory. Many studies have shown heterogeneous system is preferable on energy consumption to homogeneous system in a multi-programmed computing environment. However, how to exploit energy efficiency (Flops/Watt) of heterogeneous system for a single application or even for a single phase in an application has not been well studied. This paper proposes a power-efficient work distribution method for single application on a CPU-GPU heterogeneous system. The proposed method could coordinate inter-processor work distribution and per-processor's frequency scaling to minimize energy consumption under a given scheduling length constraint. We conduct our experiment on a real system, which equips with a multi-core CPU and a multi-threaded GPU. Experimental results show that, with reasonably distributing work over CPU and GPU, the method achieves 14% reduction in energy consumption than static mappings for several typical benchmarks. We also demonstrate that our method could adapt to changes in scheduling length constraint and hardware configurations.

关键词： Graphics processing unit Energy consumption Power demand Processor scheduling Benchmark testing Power measurement

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Conflict graph based hardware transactional memory

Conflict graph based hardware transactional memory

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International Conference on computer Science and Information Technology (CSIT)

作者： Kun Zeng National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha Hunan China

This paper proposes a novel transactional memory design: conflict graph based hardware transactional memory. It allows two conflicting transactions both to commit if they do not violate the condition of serializability. Simulation results show that conflict graph based hardware transactional memory outperforms the state-of-art transactional memory system.

关键词： Protocols

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SemanticCast: Content-Based Data Distribution over Self-Organizing Semantic Overlay Networks

SemanticCast: Content-Based Data Distribution over Self-Orga...

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IEEE International Conference on parallel and distributed Computing, Applications and Technologies (PDCAT)

作者： Zhong Zheng Yijie Wang National Key Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

Many applications demand distributing data with different contents efficiently in the network environment with unreliable links and a high node churn. Existing approaches mostly focus on optimizing either efficiency or robustness of data distribution, and fail to ensure both of them simultaneously. In this paper, we propose Semantic Cast - a content-based data distribution approach over self-organizing semantic overlay networks. Semantic Cast maintains a self-organizing semantic overlay based on view exchange (called Crowd). In Crowd, each node seeks neighbors with more similar interests by periodically exchanging its neighbor list (called view) with a chosen neighbor. Through these nodes' self-organizing behavior, various interest communities emerge in the overlay. For data distribution over Crowd, Semantic Cast adopts random walk to route data between interest communities, and adopts flooding to disseminate data inside the interested communities. The experimental results show that compared to existing approaches, Semantic Cast can support efficient content-based data distribution in the unreliable and highly dynamic network environment.

关键词： Semantics Peer to peer computing Communities Routing Robustness Convergence Subscriptions

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Metal interference analysis and design rules of on-chip antennas for wireless interconnect

Metal interference analysis and design rules of on-chip ante...

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URSI International Symposium on Signals, Systems, and Electronics (ISSSE)

作者： Xiaowei He Minxuan Zhang Jinwen Li Shaoqing Li National Laboratory of Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha Hunan China

The influence of on-chip metal interconnections, power grids, heat sink together with packaging, and metal dummy fills on the transmission characteristics of a 2mm-long integrated dipole antenna pair has been investigated in this paper. These metal structures and placements have been classified and particular simulations are performed to explore the interference effects of neighboring various metal structures on transmission gain, phase, impedance and radiation pattern for on-chip dipole antenna pair. By virtue of the experimental results and analyses, several experiential linear expressions for antenna pair gain and phase in interference circumstances are obtained using numerical fit. A set of design rules is concluded accordingly for guiding on-chip antenna layout and design targeting wireless interconnect.

关键词： Metals System-on-a-chip Transmitting antennas Dipole antennas Silicon

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Notice of Retraction: parallel block multigrid preconditioner for 3D Navier-Stokes equations on unstructured grids

Notice of Retraction: Parallel block multigrid preconditione...

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International Conference on computer Application and System Modeling (ICCASM)

作者： Zongzhe Li Lu Yao Wei Cao Yongxian Wang Zhenghua Wang School of Computer Science Parallel and Distributed Processing for National Laboratory National University of Defense Technology Changsha Hunan China

This article has been retracted by the publisher.

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A Simulated Annealing Technique for Optimizing Time Warp Simulation

A Simulated Annealing Technique for Optimizing Time Warp Sim...

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International Conference on computer Modeling and Simulation, ICCMS

作者： Wei Zhang Sina Meraji Jun Wang Carl Tropper National Laboratory of Parallel and Distributed Processing School of Computer Science National University of Defense Technology ChangSha China School of Computer Science McGill University Montreal Canada

According to Moore's law the complexity of VLSI circuits has doubled approximately every two years, resulting in simulation becoming the major bottleneck in the circuit design process. parallel and distributed simulations can be applied as fast, cost effective approaches to the simulation of large, complex circuits. In this paper, a simple yet effective simulated annealing-based approach is proposed to optimize the choice of a time window for optimistic parallel simulation. We chose gate level circuits simulations as our experimental vehicle. Our results show up to a 52% improvement in the simulation time using our simulated annealing algorithm. To the best of our knowledge, this is the first time that SA has been applied to optimize the performance of time warp simulations.

关键词： Time warp simulation Simulated annealing Circuit simulation Computational modeling Hardware design languages Discrete event simulation computer simulation Voltage control Concurrent computing computer science

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Reuse-aware modulo scheduling for stream processors 10

Reuse-aware modulo scheduling for stream processors

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Design, Automation and Test in Europe Conference and Exhibition

作者： Li Wang Jingling Xue Xuejun Yang National Laboratory of Parallel and Distributed Processing School of Computer National University of Defense Technology China Programing Languages & Compilers Group School of Computer Science and Engineering University of New South Wales Australia

ISBN: (纸本)9783981080162

This paper presents reuse-aware modulo scheduling to maximizing stream reuse and improving concurrency for stream-level loops running on stream processors. The novelty lies in the development of a new representation for an unrolled and software-pipelined stream-level loop using a set of reuse equations, resulting in simultaneous optimization of two performance objectives for the loop, reuse and concurrency, in a unified framework. We have implemented this work in the compiler developed for our 64-bit FT64 stream processor. Our experimental results obtained on FT64 and by simulation using nine representative stream applications demonstrate the effectiveness of the proposed approach.

关键词： Processor scheduling Concurrent computing Streaming media Kernel Delay Equations Pipeline processing Laboratories Program processors distributed processing

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Reducing cache contention in a multi-core processor via a scheduler

Reducing cache contention in a multi-core processor via a sc...

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International Conference on Advanced computer Theory and engineering, ICACTE

作者： S.Kazem Shekofteh Hossein Deldari Maryam Baradaran Khalkhali Parallel and Distributed Processing Laboratory Department of Computer Engineering Ferdowsi University of Mashhad Mashhad Iran Department of Computer Engineering Mashhad Branch Islamic Azad University Mashhad Iran

Multi-core architectures, which have multiple processing units on a single chip, are widely viewed as a way to achieve higher processor performance. Well scheduling of running threads on these processors will result in achieving higher performance. Modern multi-core systems are designed to allow clusters of cores to share various hardware structures, such as last-level caches, memory controllers, and interconnections, as well as prefetching hardware. Without considering these shared resources, scheduling the threads will cause serious degradation in overall performance of the system. In this paper we propose a novel algorithm to schedule the threads that considers these potential contentions to keep away from. The simulation results showed that the proposed scheduler would avoid from lots of contentions between threads on various resources especially on shared caches.

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Versatile Stack Management for Multitasking Sensor Networks

Versatile Stack Management for Multitasking Sensor Networks

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IEEE International Conference on distributed Computing Systems

作者： Rui Chu Lin Gu Yunhao Liu Mo Li Xicheng Lu National Laboratory for Parallel and Distributed Processing National University of Defense Technology Department of Computer Science and Engineering Hong Kong University of Science and Technology

ISBN: (纸本)9781424472611;9780769540597

The networked application environment has motivated the development of multitasking operating systems for sensor networks and other low-power electronic devices, but their multitasking capability is severely limited because traditional stack management techniques perform poorly on small-memory systems. In this paper, we show that combining binary translation and a new kernel runtime can lead to efficient OS designs on resource-constrained platforms. We introduce SenSmart, a multitasking OS for sensor networks, and present new OS design techniques for supporting preemptive multi-task scheduling, memory isolation, and versatile stack management. We have implemented SenSmart on MICA2/MICAz motes. Evaluation shows that SenSmart performs efficient binary translation and demonstrates a significantly better capability in managing concurrent tasks than other sensornet operating systems.

关键词： parallel processing (computerS) Sensor networks Electron devices Furnace conveyors Cache Memory System Operating systems osmium

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