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3rd IEEE International NanoElectronics Conference (INEC)/Symposium on Nanoscience and Nanotechnology in China

作者： Sui, Bingcai Chi, Yaqing Fang, Liang National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Hunan 410073 China National University of Defense Technology China

ISBN: (纸本)9781424435432

Single-electronic transistors (SETs) are considered as the attractive candidates for post-COMS VLSI due to their ultra-small size and low power consumption. Because SETs with single island can not work at room temperature normally, more and more researchers begin to make research on the SETs with 1-dimension multi-islands. A new simulation method-nSET, is introduced in this paper Compared with other methods, nSET can simulate the SET device with 1-Dimension multiple islands with high speed and accuracy. Through the comparison, it can be get that nSET is accurate and fast compared with the classical Monte Carlo(MC) simulator, and is very useful for the ASIC design of SET devices.

关键词： Monte Carlo simulation single-electron tunneling device single-electron transistor multiple islands

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Stigmergic collaboration: A sign-based perspective of stigmergy

Stigmergic collaboration: A sign-based perspective of stigme...

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2010 International Conference on Intelligent Computation Technology and Automation, ICICTA 2010

作者： Ren, Chuanjun Huang, Hongbing Jin, Shiyao National Laboratory for Parallel and Distributed Processing College of Computer Science National University of Defense Technology Changsha 410073 China

ISBN: (纸本)9780769540771

Insects build architecturally complex nests and search for remote food by collaboration work despite their limited sensors, minimal individual intelligence and the lack of a central control system. Insets' collaborations emerge as a response of the individual insects to Stigmergy. A sign-based model of Stigmergy to discuss collaboration is proposed in this paper where we picked up "sign" as a key notion to understand it. Therefore, sign is the link of all the components in a Stigmergic complex adaptive system. Based on this understanding, we propose a definition that reveals the nature of signs and exploit the significations and relationships carried by the notion of sign. Then, a sign-based model of Stigmergy is consequently reached, which captures the essentials of Stigmergy. A basic architecture of Stigmergy as well as its constituents are presented and discussed. At last, some applications of the model are discussed. © 2010 Crown Copyright.

关键词： CAS Collaboration Emergence Sign Stigmergy Emergence Volatile Oils Insecta central control system

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Metal interference analysis and design rules of on chip antennas for wireless interconnect

Metal interference analysis and design rules of on chip ante...

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International Symposium on Signals, Systems and Electronics

作者： He, Xiaowei Zhang, Minxuan Li, Jinwen Li, Shaoqing National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha Hunan 410073 China

ISBN: (纸本)9781424463558

The influence of on-chip metal interconnections, power grids, heat sink together with packaging, and metal dummy fills on the transmission characteristics of a 2mm-long integrated dipole antenna pair has been investigated in this paper. These metal structures and placements have been classified and particular simulations are performed to explore the interference effects of neighboring various metal structures on transmission gain, phase, impedance and radiation pattern for on-chip dipole antenna pair. By virtue of the experimental results and analyses, several experiential linear expressions for antenna pair gain and phase in interference circumstances are obtained using numerical fit. A set of design rules is concluded accordingly for guiding on-chip antenna layout and design targeting wireless interconnect. © 2010 IEEE.

关键词： Dipole antennas

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RETRACTED ARTICLE: parallel block multigrid preconditioner for 3D navier-stokes equations on unstructured grids

RETRACTED ARTICLE: Parallel block multigrid preconditioner f...

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作者： Li, Zongzhe Lu, Yao Cao, Wei Wang, Yongxian Wang, Zhenghua Parallel and Distributed Processing for National Laboratory School of Computer Science National University of Defence Lechnology Changsha Hunan 410073 China

ISBN: (纸本)9781424472369

In this paper, we explore a parallel block multigrid preconditioner based on factorization of the coefficient matrix generated in three-dimensional unstructured grids system. This preconditioner is robust with respect to the magnitude of the mesh size and the coefficient complexity, apply smoothed aggregation algebraic multigrid which using block lower-upper symmetric Gauss-Seidel(BLU-SGS) as smoother to accelerate convergent rate. We focus on this method to three-dimensional, unstructured, large-scale, parallel and NS equations' steady-state simulations. The numerical results which conducted on NACA0012 airfoil indicate that nearly optimal convergence rates and computational complexity for parallel solutions, this method also provide high speedup and efficiency for a series of processors. © 2010 IEEE.

关键词： Navier Stokes equations

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Software prepromotion for non-uniform cache architecture

Journal of Software

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Journal of Software 2010年第1期5卷 11-19页

作者： Wu, Junjie Pan, Xiaohui Yang, Xuejun National laboratory for parallel and distributed processing Changsha China

As a solution to growing global wire delay, non-uniform cache architecture (NUCA) has already been a trend in large cache designs. The access time of NUCA is determined by the distance between the cache bank containing the required data and the processor. Thus, one of the important NUCA researches focuses on how to place data to be used into cache banks close to the processor. This paper proposes software prepromotion technique, which prepromote data using prepromotion instructions as similar as software prefetching does. Besides the basic software prepromotion, this paper also proposes smart multihop software prepromotion (SMSP), very long software prepromotion (VLSP) and their combination technique. SMSP intelligently chooses cache banks which the prepromoted data most ideally suit to being moved into. And VLSP prepromote multiple data using one instruction. Finally, we evaluate our approaches by testing 7 kernel benchmarks on a full-system simulator. The basic software prepromotion gets an average improvement of 2.6893% in IPC. The SMSP improves IPC by 7.0928% averagely. And the VLSP gets an IPC improvement of 7.2194% averagely. Lastly, after combining the SMSP and VLSP, the average improvement in IPC achieves 11.8650%. © 2010 ACADEMY PUBLISHER.

关键词： Artificial intelligence

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High performance and memory efficient implementation of matrix multiplication on FPGAs

High performance and memory efficient implementation of matr...

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2010 International Conference on Field-Programmable Technology, FPT'10

作者： Wu, Guiming Dou, Yong Wang, Miao National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha 410073 China Jiangnan Institute of Computing Technology Wuxi 214083 China

ISBN: (纸本)9781424489817

We present a high performance and memory efficient hardware implementation of matrix multiplication for dense matrices of any size on the FPGA devices. By applying a series of transformations and optimizations on the original serial algorithm, we can obtain an I/O and memory optimized block algorithm for matrix multiplication on FPGAs. A linear array of processing elements (PEs) is proposed to implement this block algorithm. We show significant reduction in hardware resources consuming compared to the related work while increasing clock frequency. Moreover, the memory requirement can be reduced to O(S) from O(S 2), where S is the block size. Therefore, more PEs can be integrated into the same FPGA devices. © 2010 IEEE.

关键词： Field programmable gate arrays (FPGA)

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Automatic synthesis of processor arrays with local memories on FPGAs

Automatic synthesis of processor arrays with local memories ...

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2010 International Conference on Field-Programmable Technology, FPT'10

ISBN: (纸本)9781424489817

In this paper, we present an automatic synthesis framework to map loop nests to processor arrays with local memories on FPGAs. An affine transformation approach is firstly proposed to address space-time mapping problem. Then a data-driven architecture model is introduced to enable automatic generation of processor arrays by extracting this data-driven architecture model from transformed loop nests. Some techniques including memory allocation, communication generation and control generation are presented. Synthesizable RTL codes can be easily generated from the architecture model built by these techniques. A preliminary synthesis tool is implemented based on PLUTO, an automatic polyhedral source-to-source transformation and parallelization framework. © 2010 IEEE.

关键词： Field programmable gate arrays (FPGA)

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Window memory accesses method in alternate row/column matrix access systems

Window memory accesses method in alternate row/column matrix...

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2010 2nd International Conference on Computer Engineering and Technology, ICCET 2010

作者： Jie, Zhou Dou, Yong Lei, Yuanwu Dong, Yazhuo National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha China Unit 91655 People's Republic of China Beijing China

ISBN: (纸本)9781424463503

Many systems, such as Synthetic Aperture Radar (SAR) processing, two-dimensional image processing, 2d-FFT calculation, need access the row and column data of their matrix alternately. The DRAM memory should be used due to huge data in these systems. To improve the usage of memory bandwidth in such systems, this paper theoretically analyses the optimal window size to minimize the total number of opening/closing pages when performing in such instances by balancing the number of handling physical pages between row and column accesses. This paper presents a window-based optimal memory access method, and we implemented an FPGA-based SDRAM controller with eight simple ports, which is based on window accessing mechanism and supports commercialized SDARM. The experimental results show that the effective I/O bandwidth of external SDRAM using our window layout approach increases from 114.2MB/s of naive implementation to 730.2MB/s with over 6X speedup. In addition, we implemented two SAR processing systems with four FFT processing elements using our window-based SDRAM controller and Corner Turn method separately in FPGA chip. Results show window-based method can achieve a speedup of 2.6 compared to Corner Turn method. © 2010 IEEE.

关键词： Fast Fourier transforms

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A distributed Approach to Consistent Order Delivery of Concurrent Events in Asynchronous DVEs

A Distributed Approach to Consistent Order Delivery of Concu...

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2010 2nd International Conference on Education Technology and Computer(第二届IEEE教育技术与计算机国际会议 ICETC 2010)

作者： Hangjun Zhou Wei Zhang Yuxing Peng Sikun Li Key Laboratory of Science and Technology for National Defence of Parallel and Distributed Processing Key Laboratory of Science and Technology for National Defence of Parallel and Distributed Processing

ISBN: (纸本)9781424463671;9781424463688;9781424463701

In large-scale asynchronous distributed virtual environments(DVEs), one of the difficult problems is to deliver the concurrent events in a consistent order at each node. Generally, the previous consistency control approaches can be classified into two categories: causal order and time stamped order. However, causal order approaches can merely preserve the cause-effect relation of events and time stamped order approaches seem intrinsically complex to be used in serverless large-scale asynchronous DVEs. In this paper, we proposed a novel distributed algorithm to identify the concurrent events and preserve the consistent order delivery of them at different nodes. Simulation studies are also carried out to compare the performance of this algorithm with that of the previous ones. The results show that the new algorithm can effectively deliver the concurrent events in consistent order at each node and is more efficient than the previous algorithms in large-scale asynchronous DVEs.

关键词： distributed virtual environments concurrent events distributed consistency algorithm

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Implementation of encrypted data for outsourced database

Implementation of encrypted data for outsourced database

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2010 2nd International Conference on Computational Intelligence and Natural Computing, CINC 2010

作者： Wang, Zheng-Fei Tang, Ai-Guo Department of Computer Hunan Business College Changsha 410205 China National Key Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha 410073 China

ISBN: (纸本)9781424477036

Encryption technology has become an important mechanism of securing data stored in the outsourced database. However, it is a difficulty to query efficiently the encrypted data and many researchers take it into consideration. To solve the problem, an encrypted schema, based on the Postgresql DBMS, is proposed Through the security dictionary and the extended SQL, the approach implements the encrypted storage and efficiently query over the encrypted data in the outsourced databases. Results of experiments validate the efficiency and feasibility of our approach. ©2010 IEEE.

关键词： Cryptography

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