This panel paper presents the views of six researchers and practitioners of simulation modeling, Collectively we attempt to address a range of key future challenges to modeling methodology. It is hoped that the views ...
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This panel paper presents the views of six researchers and practitioners of simulation modeling, Collectively we attempt to address a range of key future challenges to modeling methodology. It is hoped that the views of this paper, and the presentations made by the panelists at the 2004 Winter Simulation Conference will raise awareness and stimulate further discussion on the future of modeling methodology in areas such as modeling problems in business applications, human factors and geographically dispersed networks;rapid model development and maintenance;legacy modeling approaches;markup languages;virtual interactive process design and simulation;standards;and Grid computing.
This paper proposes a novel real-time adaptive admission control (AAC) scheme with a desired quality of service (QoS) guarantee and high network utilization in high speed networks. The QoS is given in terms of service...
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This paper proposes a novel real-time adaptive admission control (AAC) scheme with a desired quality of service (QoS) guarantee and high network utilization in high speed networks. The QoS is given in terms of service delay, which is defined as the time it takes for a source to get admitted into the network after it initiates its intended request, packet/cell losses, and transmission delay (time taken to complete transmission from its initiation). AAC uses the following information - the available capacity from a novel adaptive bandwidth estimation scheme, a congestion indicator derived from a congestion controller, peak cell rate estimate from new sources, along with the desired QoS metrics, and outputs an 'admit' or 'reject' decision signal to the new sources while guaranteeing QoS and network utilization. Simulation results are presented by streaming ON/OFF and video data into the network. Results show that the proposed AAC admits significantly more traffic compared to other available admission control schemes thereby guaranteeing high network utilization while maintaining the desired QoS.
We develop a new software layer called the Automatic parallel Detection Layer (APDL) for the automatic transformation from sequential to parallel code. The main interest, in this research, is the parallelism at loop l...
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We develop a new software layer called the Automatic parallel Detection Layer (APDL) for the automatic transformation from sequential to parallel code. The main interest, in this research, is the parallelism at loop level, because significant parallelism in programs almost invariably occurs in loops. The proposed APDL has five processes for code transformation: the sequential source code parser, data dependence analysis of this code, partitioning, scheduling both task and data, and generating parallel source code. Many cases have been studied to evaluate the performance of the developed layer. The performance is evaluated depending on the execution time of: the sequential code, the parallel programmer code, and the code output from APDL for the same case study. Performance results show that APDL greatly improves the execution time with respect to sequential execution time, and saves on the high cost of a parallel programmer.
In the recovery of failed processes in a distributed program, causal logging schemes offer several benefits. These benefits include no rollback of unfailed processes and simple approaches to output commit. Unfortunate...
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In the recovery of failed processes in a distributed program, causal logging schemes offer several benefits. These benefits include no rollback of unfailed processes and simple approaches to output commit. Unfortunately, previous approaches to the recovery of multiple simultaneous failures require that the distributed execution be blocked or that recovering processes coordinate. The latter requires assumptions which are not satisfactory. In this paper we present a solution that has neither of these drawbacks.
The domain of a global function is the set of all global states of an execution of a distributed program, We show how to monitor a program in order to determine if there exists a global state in which the sum x(1) + x...
The domain of a global function is the set of all global states of an execution of a distributed program, We show how to monitor a program in order to determine if there exists a global state in which the sum x(1) + x(2) +...+ x(N), exceeds some constant K, where x(i) is defined in process i. We examine the cases where x(i) is an integer variable for N = 2 and where x(i) is a boolean variable for general N, For both cases we provide algorithms, prove their correctness, and analyze their complexity. (C) 1997 Academic Press.
A system for specification and proof of distributed programs is presented. The method is based directly on the partial order of local states (poset) and avoids the notions of time and simultaneity. Programs are specif...
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A system for specification and proof of distributed programs is presented. The method is based directly on the partial order of local states (poset) and avoids the notions of time and simultaneity. Programs are specified by documenting the relationship between local states which are adjacent to each other in the poset. Program properties are defined by stating properties of the poset. Many program properties can be expressed succinctly and elegantly using this method because poset properties inherently account for varying processor execution speeds. The system utilizes a proof technique which uses induction on the complement of the causally precedes relation and is shown to be useful in proving poset properties. We demonstrate the system on three example algorithms: vector clocks, mutual exclusion, and direct dependency clocks.
A heterogeneous environment for hardware/software cosimulation is described. This environment permits a portion of an application's subsystems to be simulated using reconfigurable hardware while the remainder of t...
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A heterogeneous environment for hardware/software cosimulation is described. This environment permits a portion of an application's subsystems to be simulated using reconfigurable hardware while the remainder of the subsystems are simulated using software. An Aptix FPCB populated with Xilinx FPGAs serves as the hardware simulation platform while an IBM-compatible PC serves as the software simulation platform. The two platforms are connected using an Altera reconfigurable logic board which allows the development of a high-speed interface for communication. This paper focuses on the difficulties associated with designing and interfacing simulation entities in this heterogeneous environment. Strategies for designing hardware and software simulation entities are introduced. These strategies reduce the impact of size and performance constraints imposed by the cosimulation environment while addressing the issues of time management and synchronization. A simple queueing application is used to illustrate a design methodology which incorporates these design strategies.
We analyze the scheduling aspects of database queries submitted to an abstract model of a very large distributed system. The essential elements of this model are: (a) a finite number of identical processing nodes with...
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We show that the problem of predicate detection in distributedsystems is NP-complete. We introduce a class of predicates, linear predicates, such that for any linear predicate B there exists an efficient detection of...
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Designing and debugging distributedsystems requires the detection of conditions across the entire system. As an illustration, monitoring the status of an application requires detection of termination, and using virtu...
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Designing and debugging distributedsystems requires the detection of conditions across the entire system. As an illustration, monitoring the status of an application requires detection of termination, and using virtual time requires the periodic calculation of the global virtual time. The generalized conjunctive predicate (GCP) detector offers a method to derive detection algorithms for these and other problems based on optimizing the base algorithm.
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