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1998 ACM Symposium on Applied Computing, SAC 1998

作者： Merkle, Laurence D. Gates, George H. Lament, Gary B. Center for Plasma Theory and Computation Air Force Research Laboratory Kirtland AFBOH87117 United States Air Force Research Laboratory WL HPC Technical Focal Point Wright-Patterson AFBOH45433 United States Department of Electrical and Computer Engineering Graduate School of Engineering Air Force Institute of Technology Wright-Patterson AFBOH45433 United States

ISBN: (纸本)0897919696

The fast messy genetic algorithm (fmGA) belongs to a class of algorithms inspired by the principles of evolution, known appropriately as "evolutionary algorithms" (EAs). These techniques operate by applying biologically-inspired operators, such as recombination, mutation, and selection, to a population of individuals. EAs are frequently applied as optimum seeking techniques, by way of analogy to the principle of "survival of the fittest." In contrast to many EAs, the fmGA consists of several evolutionary phases, each with distinct characteristics of local/global computation. These are explained in the paper. Previous scalability analyses of island-model EAs have been based on either fixed global population size or fixed subpopulation size. Recently developed population sizing theory enables scalability analysis based on fixed expected solution quality. Parallel computational experiments are performed to determine the effectiveness and efficiency of an MPI-based fmGA using eeich of these scaling techniques. The optimization problem for these experiments is the minimization of the CHARMM energy model of the pen-tapeptide [Met]-Enkephalin. © 1998 ACM.

关键词： Computation theory

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Benchmarking the task graph scheduling algorithms

Benchmarking the task graph scheduling algorithms

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International Symposium on Parallel processing

作者： Y.-K. Kwok I. Ahmad Parallel Processing Laboratory School of Electrical and Computer Engineering Purdue University West Lafayette IN USA Department of Computer Science Hong Kong University of Science and Technology Hong Kong China

The problem of scheduling a weighted directed acyclic graph (DAG) to a set of homogeneous processors to minimize the completion time has been extensively studied. The NP-completeness of the problem has instigated researchers to propose a myriad of heuristic algorithms. While these algorithms are individually reported to be efficient, it is not clear how effective they are and how well they compare against each other. A comprehensive performance evaluation and comparison of these algorithms entails addressing a number of difficult issues. One of the issues is that a large number of scheduling algorithms are based upon radically different assumptions, making their comparison on a unified basis a rather intricate task. Another issue is that there is no standard set of benchmarks that can be used to evaluate and compare these algorithms. Furthermore, most algorithms are evaluated using small problem sizes, and it is not clear how their performance scales with the problem size. The authors first provide a taxonomy for classifying various algorithms into different categories according to their assumptions and functionalities. They then propose a set of benchmarks which are of diverse structures without being biased towards a particular scheduling technique and still allow variations in important parameters. They have evaluated 15 scheduling algorithms, and compared them using the proposed benchmarks. Based upon the design philosophies and principles behind these algorithms, they interpret the results and discuss why some algorithms perform better than the others.

关键词： Scheduling algorithm Processor scheduling Parallel processing Concurrent computing Heuristic algorithms Laboratories computer science Taxonomy Algorithm design and analysis Scalability

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Optimal and near-optimal allocation of precedence-constrained tasks to parallel processors: defying the high complexity using effective search techniques

Optimal and near-optimal allocation of precedence-constraine...

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International Conference on Parallel processing (ICPP)

作者： I. Ahmad Yu-Kwong Kwok Department of Computer Science Hong Kong University of Science and Technology Hong Kong China Parallel Processing Laboratory School of Electrical and Computer Engineering Purdue University West Lafayette IN USA

Obtaining an optimal schedule for a set of precedence-constrained tasks with arbitrary costs is a well-known NP-complete problem. However, optimal solutions are desired in many situations. In this paper we propose search-based algorithms for determining optimal schedules for moderately large problem sizes. The first algorithm which is based on the A* search technique uses a computationally efficient cost function for guiding the search with reduced complexity. We propose a number of state-pruning techniques to reduce the size of the search space. For further lowering the complexity, we parallelize the search. The parallel version is based on reduced interprocessor communication and is guided by static and dynamic load-balancing schemes to evenly distribute the search states to the processors. We also propose an approximate algorithm that guarantees a bounded deviation from the optimal solution but takes considerably shorter time. Based on an extensive experimental evaluation of the algorithms, we conclude that the parallel algorithm with pruning techniques is an efficient scheme for generating optimal solutions for medium to moderately large problems while the approximate algorithm is a useful alternative if slightly degraded solutions are acceptable.

关键词： Optimal scheduling Processor scheduling Computational efficiency Costs Concurrent computing Network topology Scheduling algorithm computer science Laboratories Multiprocessor interconnection networks

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Video segmentation of MPEG compressed data

Video segmentation of MPEG compressed data

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IEEE International Conference on Electronics, Circuits and Systems (ICECS)

作者： I. Koprinska S. Carrato Indian Institute of Technology Bangalore Sofia Bulgaria Department of Electrical Engineering and Computer Science (D.E.E.I.) Image Processing Laboratory University of Trieste Trieste Italy

An approach for parsing MPEG compressed video into shots and sub-shots based only on the macroblock (MB) and motion vector (MV) information is presented. The system follows a two-pass scheme and has a hybrid rule-based/neural structure. A rough scan over the P frames locates the potential shot boundaries and the solution is then refined by a precise scan over the B frames of the respective neighborhoods. The "simpler" boundaries are recognized by the rule-based module, while the decisions for the "complex" ones are refined by the neural part. The latter is also used to distinguish dissolves from object and camera motions and to break the shots into sub-shots. The experiments demonstrate high speed and accuracy in shot detection and their characterization.

关键词： Video compression Transform coding Cameras Image coding Image reconstruction Image segmentation Gunshot detection systems Histograms Image processing Laboratories

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A Region-Based Representation of Images in MARS

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Journal of VLSI Signal processing Systems for Signal, Image, and Video technology 1998年第1-2期20卷 137-150页

作者： Servetto, Sergio D. Rui, Yong Ramchandran, Kannan Huang, Thomas S. Beckman Inst. Adv. Sci. and Technol. Univ. Illinois at Urbana-Champaign Urbana IL 61801 United States Universidad Nacional de La Plata Argentina Univ. Illinois at Urbana-Champaign United States Comp. Res. Adv. Applications Group IBM Argentina Argentina Image Formation and Processing Group Beckman Institute UIUC United States Department of Computer Science UNLP Argentina Dept. of Elec. and Comp. Engineering UIUC United States Multimedia Commun. Res. Department Bell Laboratories Murray Hill NJ United States Info. Sciences Research Department AT and T Labs. Florham Park NJ United States Department of Computer Science UIUC United States Southeast University China Tsinghua University China University of Illinois Urbana-Champaign IL United States Image Formation and Processing Group Beckman Inst. Advance Sci. Technol. UIUC United States Vis. Technol. Grp. of Microsoft Res. Redmond WA United States City College of New York United States Columbia University United States AT and T Bell Labs. United States Ctr. for Telecommunications Research Columbia University United States Elec. and Comp. Eng. Department United States Beckman Institute Coordinated Science Laboratory IL United States IEEE Signal Processing Society United States IEEE IMDSP Technical Committee United States IEEE Transactions on Image Proc. United States National Taiwan University Taipei Taiwan Massachusetts Inst. of Technology Cambridge MA United States Department of Electrical Engineering MIT United States School of Electrical Engineering United States Lab. for Info. and Signal Processing Purdue University United States Dept. of Elec. and Comp. Engineering United States Coordinated Science Laboratory United States Image Formation and Processing Group Beckman Inst. Adv. Sci. and Technol. United States MIT Lincoln Laboratory IBM Thomas J. Watson Research Center Rheinishes Landes Museum Bonn Germany Swiss Institutes of Technology Zurich Switzerland Swiss Institutes of Technology Lausanne S

We study the problem of representing images within a multimedia Database Management System (DBMS), in order to support fast retrieval operations without compromising storage efficiency. To achieve this goal, we propose new image coding techniques which combine a wavelet representation, embedded coding of the wavelet coefficients, and segmentation of image-domain regions in the wavelet domain. A bitstream is generated in which each image region is encoded independently of other regions, without having to explicitly store information describing the regions. Simulation results show that our proposed algorithms achieve coding performance which compares favorably, both perceptually and objectively, to that achieved using state-of-the-art image/video coding techniques while additionally providing region-based support.

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A simulator construction methodology for the Shiva multiprocessor system 3

A simulator construction methodology for the Shiva multiproc...

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3rd International Conference on Algorithms and Architectures for Parallel processing, ICA3PP 1997

作者： Slomka, S. Sterzl, K.F. Lakshmi Narasimhan, V. Speech Research Laboratory Signal Processing Research Center Queensland University of Technology GPO Box 2434 BrisbaneQLD4001 Australia PA SE Research Laboratory Department of Electrical and Computer Engineering University of Queensland St. LuciaQLD4072 Australia Information Management Group ITD DSTO SalisburySA5108 Australia

ISBN: (纸本)0780342291

This paper describes a simulator for the Shiva multiprocessor system and the simulator construction methodology (SCM) used in its creation. The SCM, based on the active functional unit (AFU) construct, is a modern SCM which is flexible, accurate, fast, easy to use, capable of dynamic reconfigurability at run-time, and most of all simple and capable of quick simulator construction. The AFU SCM is capable of all these things through the use of object-oriented software techniques. The Shiva simulator constructed using the AFU SCM is program-driven and capable of micro and macro architectural simulation. © 1997 IEEE.

关键词： Multiprocessing systems

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Robustness of delta operator based cellular neural networks

Robustness of delta operator based cellular neural networks

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： B. Mirzai H.C. Reddy G.S. Moschytz Signal and Information Processing Laboratory Swiss Federal Institute of Technology Zurich Switzerland Department of Electrical and Computer Engineering University of California Irvine CA USA Department of Electrical Engineering California State University Long Beach CA USA

The delta operator approach to continuous-time cellular neural networks (CT-CNNs) is investigated in terms of a robust realization. It is shown that earlier results concerning the robustness of CT-CNNs can be obtained as a limiting case of this approach, while at the same time, this allows us to formulate robustness considerations for discrete-time CNNs.

关键词： Robustness Cellular neural networks Sampling methods Signal processing Limiting Nonlinear equations Information processing Laboratories computer networks Image processing

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A simulator construction methodology for the Shiva multiprocessor system

A simulator construction methodology for the Shiva multiproc...

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IEEE International Conference on Algorithms and Architectures for Parallel processing (ICAP)

作者： S. Slomka K.F. Sterzl V. Lakshmi Narasimhan The Speech Research Laboratory Signal Processing Research Center Queensland University of Technology Brisbane QLD Australia The PA SE Research Laboratory Department of Electrical and Computer Engineering University of Queensland Saint Lucia QLD Australia Information Management Group ITD DSTO Salisbury SA Australia

关键词： Multiprocessing systems Computational modeling Object oriented modeling Signal generators Laboratories computer simulation Discrete event simulation Speech processing Signal processing Information management

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plasma immersion ion implantation with dielectric substrates

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IEEE TRANSACTIONS ON plasma SCIENCE 1996年第6期24卷 1383-1388页

作者： Linder, BP Cheung, NW Plasma Assisted Materials Processing Laboratory Department of Electrical Engineering and Computer Science University of California Berkeley CA USA

plasma immersion ion implantation (Pm) is a novel implantation technique for high-dose/high-current implants. Using the SPICE circuit simulator to model the PIII process, the sheath voltage and ion energy distribution are examined. Implanting into a dielectric substrate results in a significant voltage buildup in the wafer, reducing the effective implant energy. Increasing the pulse voltage raises the dose/pulse, but at the cost of an expanded implant energy spread. Increasing the plasma ion density also raises the dose/pulse, but at the cost of a wider implant energy spread and a lower coupling efficiency. Increasing the substrate thickness reduces both the coupling efficiency and dose/pulse while broadening the energy spread. The large voltage generated across the dielectric substrate decreases the charge neutralization time significantly, reducing the possibility of gate oxide damage.

关键词： plasma immersion ion implantation gate oxide Implants and Prostheses circuit simulator Dielectric substrates Shock voltage Ion energy distribution ion densities

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plasma immersion ion implantation for semiconductor processing

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MATERIALS CHEMISTRY AND PHYSICS 1996年第2-3期46卷 132-139页

作者： Cheung, NW Plasma Assisted Materials Processing Laboratory Department of Electrical Engineering and Computer Sciences University of California Berkeley CA 94720 USA

plasma immersion ion implantation (PIII) is a technique which promises high dose rate implantation and compatibility with large-area processing. When a large negative bias is applied to the substrate which is immersed inside a high ion-density plasma, all ion species present will be implanted without ion mass selection, Innovations of this techniques include: implantation time independent of implantation area, capability to perform concomitant deposition and implantation, and simplicity of machine design and maintenance. This paper reports the modeling of PIII plasma dynamics and several demonstrated semiconductor processing applications such as plasma doping, subsurface material synthesis, ion beam mixing, microcavity engineering, and surface modifications. Several processing issues such as substrate charging and dosimetry will also be discussed.

关键词： ion implantation plasma immersion ion implantation shallow junctions SIMOX

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