A number of experiments show that helium plasma constructs filament (fuzz) structures whose diameter is in nanometer-scale on the tungsten material under the suitable experimental condition. In this paper, binary-coll...
A number of experiments show that helium plasma constructs filament (fuzz) structures whose diameter is in nanometer-scale on the tungsten material under the suitable experimental condition. In this paper, binary-collision-approximation-based simulation is performed to reveal the mechanism and the conditions of fuzz formation of tungsten material under plasma irradiation. The irradiation of the plasma of hydrogen, deuterium, and tritium, and also the plasma of noble gas such as helium, neon, and argon atoms are investigated. The possibility of fuzz formation is discussed on the simulation result of penetration depth of the incident atoms.
Strained-Si based Field Effect Transistors (FETs) have enabled improvement of carrier transport in Metal Oxide Semiconductor (MOS)-based devices, both in the ON state of the device and in the sub-threshold region. Thi...
Strained-Si based Field Effect Transistors (FETs) have enabled improvement of carrier transport in Metal Oxide Semiconductor (MOS)-based devices, both in the ON state of the device and in the sub-threshold region. This leads to devices with higher ratios of on-to-off current, improvements in the device sub-threshold slope, lower voltage operation, and carrier mobility enhancement. However, in order to understand the fundamental physics of these devices, it is important to address the stress conditions of the strained-Si channel layers after device processing, particularly after the ion-implantation process. In this work, we have studied Si+ self ion-implantation and thermally annealed strained-Si channel layers in n-MOSFETs. It has been observed that the density of defects in the strained-Si layer depends upon implant dose as well as thermal treatment. Using energy dispersive spectroscopy (EDS) spectra, it is found that Ge is present in the strained Si layer when analyzed after Si+ implantation and rapid thermal annealing. The presence of Ge in the strained Si channel layer causes relaxation of strain. This is verified by Convergent Beam Electron Diffraction (CBED) by measuring the lattice constant of the strained channel. It is concluded that electron mobility enhancements can be degraded in n- MOSFETs due to presence of both Ge up-diffusion and defects.
The detection of photons underpins imaging, spectroscopy, fibre-optic communications and time-gated distance measurements. Nanostructured materials are attractive for detection applications because they can be integra...
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The detection of photons underpins imaging, spectroscopy, fibre-optic communications and time-gated distance measurements. Nanostructured materials are attractive for detection applications because they can be integrated with conventional silicon electronics and flexible, large-area substrates, and can be processed from the solution phase using established techniques such as spin casting, spray coating and layer-by-layer deposition. In addition, their performance has improved rapidly in recent years. Here we review progress in light sensing using nanostructured materials, focusing on solution-processed materials such as colloidal quantum dots and metal nanoparticles. These devices exhibit phenomena such as absorption of ultraviolet light, plasmonic enhancement of absorption, size-based spectral tuning, multiexciton generation, and charge carrier storage in surface and interface traps.
SerDes (Serializer/DeSerializer) is widely used in gigabit Ethernet systems, fiber-optic communication systems, and storage applications for high-speed data transmission between different ASICs (application-specific i...
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ISBN:
(纸本)9781424463053
SerDes (Serializer/DeSerializer) is widely used in gigabit Ethernet systems, fiber-optic communication systems, and storage applications for high-speed data transmission between different ASICs (application-specific integrated circuit) with the significant advantage of saving package pin numbers. The channel connecting the Serializer/DeSerializer in two different ASICs on a PCB (Printed Circuit Board) is the SerDes channel defined in the paper. Since DC biases in different ASICs are usually different for their Serializer/DeSerializer circuits, DC blocking capacitors are then necessary to block the DC path for signal transmission through the SerDes channel. It is known that the trace impedance on a PCB can be well controlled in manufacturing while it is difficult for a DC blocking via structure. Therefore, the blocking via structure is the main discontinuity contributor of the SerDes channel. In this paper, two different DC blocking via structures are studied. The performances of the two structures are compared and correlated up to 20 GHz with full-wave modelling and measurements. This study reveals the advantages/disadvantages of the two via blocking structures. A via optimization tool, which is based on the cavity resonance algorithm to speed up the optimization, is used to obtain the optimized parameters for the two blocking via structures, and the following full-wave simulations give further performance explorations of the two via structures.
Temperature variations of radiative recombination rates of electron-hole pairs responsible for photoluminescence in a-Si:H films have been analysed from the intensity, I , and the characteristic value of the lifetime,...
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