The contribution of this paper is fourfold. First, we sketch an architecture of agent-enabled business process management that cleanly separates between agent capabilities, business process modeling, and the modeling ...
详细信息
We propose a lexicalized formulation of dependency grammar that addresses both immediate dependence and linear precedence. Our approach distinguishes two orthogonal, yet mutually constraining dependency trees: an ID t...
We propose a lexicalized formulation of dependency grammar that addresses both immediate dependence and linear precedence. Our approach distinguishes two orthogonal, yet mutually constraining dependency trees: an ID tree of syntactic dependencies and a LP tree of topological dependencies. The ID tree is non-ordered, non-projective and its edges are labeled by grammatical functions. The LP tree is ordered and projective and expresses licensed linearizations; its edges are labeled by topological fields. The LP tree can be regarded as deriving from the ID tree through a process of emancipation controlled by lexicalized constraints and principles. In the present article, we formalize valid ID/LP analyses and show how they can be characterized as the solutions of a constraint satisfaction problem. The latter can be solved by constraint programming and forms the basis of our implementation.
The emerging hardware support for thread-level speculation opens new opportunities to parallelize sequential programs beyond the traditional limits. By speculating that many data dependences are unlikely during runtim...
详细信息
The emerging hardware support for thread-level speculation opens new opportunities to parallelize sequential programs beyond the traditional limits. By speculating that many data dependences are unlikely during runtime, consecutive iterations of a sequential loop can be executed speculatively in parallel. Runtime parallelism is obtained when the speculation is correct. To take full advantage of this new execution model, a program needs to be programmed or compiled in such a way that it exhibits high degree of speculative thread-level parallelism. We propose a comprehensive cost-driven compilation framework to perform speculative parallelization. Based on a misspeculation cost model, the compiler aggressively transforms loops into optimal speculative parallel loops and selects only those loops whose speculative parallel execution is likely to improve program performance. The framework also supports and uses enabling techniques such as loop unrolling, software value prediction and dependence profiling to expose more speculative parallelism. The proposed framework was implemented on the ORC compiler. Our evaluation showed that the cost-driven speculative parallelization was effective. Our compiler was able to generate good speculative parallel loops in ten Spec2000Int benchmarks, which currently achieve an average 8% speedup. We anticipate an average 15.6% speedup when all enabling techniques are in place.
Summary form only given. The panel moderated by Bernhard Steffen (University of Dortmund) reviews this development, discusses the perspectives, and establishes recommendations for future directions of software enginee...
详细信息
Summary form only given. The panel moderated by Bernhard Steffen (University of Dortmund) reviews this development, discusses the perspectives, and establishes recommendations for future directions of software engineering, and, in particular, for the future role of formal methods in this area.
We describe a method to automatically discover translation collocations from a bilingual corpus and how these improve a machine translation system. The process of inference of collocations is iterative: An alignment i...
详细信息
ISBN:
(纸本)9781586034528
We describe a method to automatically discover translation collocations from a bilingual corpus and how these improve a machine translation system. The process of inference of collocations is iterative: An alignment is used to derive an initial set of collocations, these are used in turn to improve the alignment and this new alignment is used to generate new collocations. This process is repeated until no more collocations are found. The final alignment and the set of collocations are used to train a translation model. We use a model that is based on finite state transducers and word clusters and has been modified to work with collocations in addition to single words. We present experiments in which we show that automatic collocations improve translation quality without prior linguistic information.
We combine state-of-the-art techniques from computational linguisticsand theorem proving to build an engine for playing text adventures,computer games with which the player interacts purely through naturallanguage. Th...
We combine state-of-the-art techniques from computational linguisticsand theorem proving to build an engine for playing text adventures,computer games with which the player interacts purely through naturallanguage. The system employs a parser for dependency grammar and ageneration system based on TAG, and has components for resolving andgenerating referring expressions. Most of these modules make heavy useof inferences offered by a modern theorem prover for descriptionlogic. Our game engine solves some problems inherent in classical textadventures, and is an interesting test case for the interactionbetween natural language processing and inference.
Rapid single flux quantum (RSFQ) logic is a digital circuit technology that in recent years has presented itself as an alternative to semiconductors in the application of ultra high speed, very low power applications....
详细信息
Rapid single flux quantum (RSFQ) logic is a digital circuit technology that in recent years has presented itself as an alternative to semiconductors in the application of ultra high speed, very low power applications. The optimal timing of digital circuits operating at hundreds of GHz is still a complex problem for both RSFQ and semiconductor technologies. The fact that most RSFQ gates require a clock signal to function makes this even more complex. Various RSFQ timing schemes have been adapted from semiconductor design methodologies, and some have been designed specifically for RSFQ. Currently, synchronous clocking schemes outperform other schemes, but with the scale of RSFQ circuits ever increasing, the proper use of timing schemes are becoming more crucial. This paper describes a new asynchronous self-timing scheme where the details of clock distribution and clocking are built into the logic gates. Tests were done on the newly developed asynchronous logic gates and an asynchronous full adder was implemented and tested
The structure and application of a universal communication architecture for high-dynamic robot systems were presented. The architecture consists of a middleware for robotic and process control applications - extended ...
详细信息
ISBN:
(纸本)0780386531
The structure and application of a universal communication architecture for high-dynamic robot systems were presented. The architecture consists of a middleware for robotic and process control applications - extended (MiRPA-X) and a communication protocol Industrial Automation Protocol (IAP) based on the IEEE1394 communication standard. Both are implemented with ANSI C under the real-time operating system QNX Neutrino. IAP provides network management functions to control participant states and global object directory to virtually unite all participant paremeters.
In the presence of side-constraints and optimization criteria, round robin tournament problems are hard combinatorial problems, commonly tackled with tree search and branch-and-bound optimization. Recent results indic...
详细信息
Using Genetic programming difficult optimization problems can be solved, even if the candidate solutions are complex objects. In such cases, it is a costly procedure to correct or replace the invalid individuals that ...
详细信息
暂无评论