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Modeling semantic web services using UML 2

Modeling semantic web services using UML 2

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3rd International Workshop on Model-Driven Enterprise Information systems - MDEIS 2007;In Conjunction with ICEIS 2007

作者： Lautenbacher, Florian Bauer, Bemhard Programming Distributed Systems Lab. Institute of Computer Science University of Augsburg Germany

ISBN: (纸本)9789898111005

The development of web services and especially semantic web services is a tremendous task for people who are not familiar with all language constructs. Especially with the growing mass of several semantic web service approaches a language-independent service development is needed. This gap can be filled by using model-driven software development. Therefore, in this paper we introduce a meta-model for semantic web services and show the benefits of automatic code generation on the basis of a small example.

关键词： Web services

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Thread scheduling for multi-core platforms 11

Thread scheduling for multi-core platforms

引用

11th Workshop on Hot Topics in Operating systems, HotOS 2007

作者： Rajagopalan, Mohan Lewis, Brian T. Anderson, Todd A. Programming Systems Lab Intel Corporation Santa ClaraCA94054 United States

As multi-core processors with tens or hundreds of cores begin to proliferate, system optimization issues once faced only by the high-performance computing (HPC) community will become important to all programmers. However, unlike with HPC, the focus of the multi-core programmer will be on programming productivity and portability as much as performance. We introduce in this paper a novel scheduling framework for multi-core processors that strikes a balance between control over the system and the level of abstraction. Our framework uses high-level information supplied by the user to guide thread scheduling and also, where necessary, gives the programmer fine control over thread placement. © HotOS 2007.

关键词： Scheduling

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Transactional programming in a multi-core environment 07

Transactional programming in a multi-core environment

引用

2007 ACM SIGPLAN Symposium on Principles and Practice of Parallel programming, PPoPP'07

作者： Adl-Tabatabai, Ali-Reza Kozyrakis, Christos Saha, Bratin Programming Systems Lab. Microprocessor Technology Lab. Intel Corporation Computer Systems Lab. Electrical Engineering Department Stanford University

ISBN: (纸本)1595936025

With single thread performance starting to plateau, HW architects have turned to chip level multiprocessing (CMP) to increase processing power. All major microprocessor companies are aggressively shipping multi-core products in the mainstream computing market. Moore's law will largely be used to increase HW thread-level parallelism through higher core counts in a CMP environment. CMPs bring new challenges into the design of the software system stack. In this tutorial, we talk about the shift to multi-core processors and the programming implications. In particular, we focus on transactional programming. Transactions have emerged as a promising alternative to lock-based synchronization that eliminates many of the problems associated with lock-based synchronization. We discuss the design of both hardware and software transactional memory and quantify the tradeoffs between the different design points. We show how to extend the Java and C languages with transactional constructs, and how to integrate transactions with compiler optimizations and the language runtime (e.g., memory manager and garbage collection).

关键词： Computer programming

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From locks to correct and efficient transactional memory

From locks to correct and efficient transactional memory

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作者： Wang, Cheng Wu, Youfeng Programming Systems Lab Microprocessor and Programming Research Intel Labs 2200 Mission College Blvd. Santa Clara CA 95052 United States

Transactional memory addresses a number of important issues in lock-based parallel programs. Unfortunately, the semantics of transactions are different from those of critical sections defined by locks. The semantic differences make it difficult to correctly port existing lock-based programs to transaction-based programs. Experienced programmers accustomed to lock-based programming can easily make mistakes in transaction-based programming as parallel programs running correctly using locks can run incorrectly when critical sections are converted to using transactions. This problem becomes even more severe in porting lock-based programs to use the efficient software transactional memory. In this paper, we first identify three necessary properties in a program for the program execution using transactions to be equivalent to the program execution using locks. Assuming that the input lock-based program satisfies the necessary properties (i.e., a well-behaved parallel program), we next present a correctness condition to verify the transactional memory implementation in order for the program execution using transactions to be equivalent to the program execution using locks. Finally, we develop a correct and efficient software transactional memory implementation that satisfies the correctness condition so that locks in the well-behaved parallel programs can be converted to use the efficient software transactional memory easily and correctly. © 2012 World Scientific Publishing Company.

关键词： Locks (fasteners)

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Resource-oriented consistency analysis of engineering processes

Resource-oriented consistency analysis of engineering proces...

引用

14th International Conference on Enterprise Information systems, ICEIS 2012

作者： Bauer, Bernhard Eisenbarth, Thomas Frenzel, Christoph Honke, Benjamin Programming Distributed Systems Lab. Institute of Computer Science University of Augsburg Augsburg Germany

ISBN: (纸本)9789898565105

A number of popular engineering processes and methodologies emerged over the past years which attracted interest in research and industry. For process enactment, enterprises have to match requirements of engineering processes with existing resources. Therefore, it has to be analyzed if employees have sufficient skills or if infrastructure has sufficient capabilities to match the requirements of a situational process. Both, maintaining a skill and resource database and matching requirements against this database are an enormously challenging and time-consuming task. Additionally, this matching has to be carried out regularly as employees join and leave the company and skills change over time. Based upon a formal, logical base, we present an approach that combines ontological and metamodeling technical spaces and enables an automatic analysis of engineering processes regarding the existence of necessary resources.

关键词： Ontology

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From lock to correct and efficient software transactional memory

From lock to correct and efficient software transactional me...

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2010 Workshop on Interaction between Compilers and Computer Architecture, INTERACT-14

作者： Wang, Cheng Wu, Youfeng Programming Systems Lab. Microprocessor and Programming Research Intel Labs. 2200 Mission College Blvd Santa Clara CA 95053 United States

ISBN: (纸本)9781605589213

Transactional memory solves many problems in lock-based parallel programs. Unfortunately, the semantics of transactions are different from those of critical sections defined by locks. The semantic differences make it difficult to correctly port existing lock-based programs to transaction-based programs. Experienced programmers accustomed to lock-based programming can easily make mistakes in transaction-based programming as parallel programs running correctly using locks can run incorrectly when converted to using transactions. This problem becomes even more severe in the efficient software transactional memory implementing weak isolation, optimistic read concurrency management and eager version management. In this paper, we first identify three necessary properties in a program for the program execution using transactions to be equivalent to the program execution using locks. Assuming that the input lock-based program satisfies the necessary properties (i.e. well-behaved parallel programs), we next present a correctness condition for the program execution using transactions to be equivalent to the program execution using locks. Finally, we develop a correct and efficient software transactional memory implementation that satisfies the correctness condition so that locks in the well behaved parallel programs can be converted to use efficient software transactional memory easily and correctly. Copyright © 2010 ACM.

关键词： Locks (fasteners)

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Modeling and performance evaluation of TSO-preserving binary optimization

Modeling and performance evaluation of TSO-preserving binary...

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20th International Conference on Parallel Architectures and Compilation Techniques, PACT 2011

作者： Wang, Cheng Wu, Youfeng Programming Systems Lab. Microprocessor and Programming Research Intel Labs. 2200 Mission College Blvd. Santa Clara CA 95052 United States

ISBN: (纸本)9780769545660

Program optimization on multi-core systems must preserve the program memory consistency. This paper studies TSO-preserving binary optimization. We introduce a novel approach to formally model TSO-preserving binary optimization based on the formal TSO memory model. The major contribution of the modeling is a sound and complete algorithm to verify TSO-preserving binary optimization with O(N2) complexity. We also developed a dynamic binary optimization system to evaluate the performance impact of TSO-preserving optimization. We show in our experiments that, dynamic binary optimization without memory optimizations can improve performance by 8.1%. TSOpreserving optimizations can further improve the performance by 4.8% to a total 12.9%. Without considering the restriction for TSO-preserving optimizations, the dynamic binary optimization can improve the overall performance to 20.4%. © 2011 IEEE.

关键词： Binary Optimization Heuristic algorithms Instruction sets Load modeling Memory management Optimization TSO-preserving binary optimization TSO-preserving optimization Total Store Ordering dynamic binary optimization formal TSO memory model multicore system

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Mildly non-projective dependency structures 21

Mildly non-projective dependency structures

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21st International Conference on Computational Linguistics and 44th Annual Meeting of the Association for Computational Linguistics, COLING/ACL 2006

作者： Kuhlmann, Marco Nivre, Joakim Programming Systems Lab Saarland University Germany Växjö University Sweden Uppsala University Sweden

Syntactic parsing requires a fine balance between expressivity and complexity, so that naturally occurring structures can be accurately parsed without compromising efficiency. In dependency-based parsing, several constraints have been proposed that restrict the class of permissible structures, such as projectivity, planarity, multi-planarity, well-nestedness, gap degree, and edge degree. While projectivity is generally taken to be too restrictive for natural language syntax, it is not clear which of the other proposals strikes the best balance between expressivity and complexity. In this paper, we review and compare the different constraints theoretically, and provide an experimental evaluation using data from two treebanks, investigating how large a proportion of the structures found in the treebanks are permitted under different constraints. The results indicate that a combination of the well-nestedness constraint and a parametric constraint on discontinuity gives a very good fit with the linguistic data. © 2006 Association for Computational Linguistics

关键词： Forestry

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Software transactional memory validation - Time and space considerations

Software transactional memory validation - Time and space co...

引用

作者： Welc, Adam Saha, Bratin Programming Systems Lab Intel Corporation Santa Clara CA 95054 United States

ISBN: (纸本)9783642245671

With single thread performance hitting the power wall, hardware architects have turned to chip-level multiprocessing to increase processor performance. As a result, issues related to the construction of scalable and reliable multi-threaded applications have become increasingly important. One of the most pressing problems in concurrent programming has been synchronizing accesses to shared data among multiple concurrent threads. Traditionally, accesses to shared memory have been synchronized using lock-based techniques resulting in scalability, composability and safety problems. Recently, transactional memory has been shown to eliminate many problems associated with lock-based synchronization, and transactional constructs have been added to languages to facilitate programming with transactions. Hardware transactional memory (HTM) is at this point readily available only in the simulated environments. Furthermore, some of the TM systems relying on the hardware support are hybrid solutions that require TM operations to be supported in software as well. Therefore, providing an efficient software transactional memory (STM) implementation has been an important area of research. One of the largest overheads in an STM implementation is incurred in the validation procedure (that is, in ensuring correctness of transactional read operations). This paper presents novel solutions to reduce the validation overhead in an STM. We first present a validation algorithm that is linear in the number of read operations executed by a transaction, and yet does not add any overhead to transactional reads and writes. We then present an algorithm that uses bitmaps to encode information about transactional operations and further reduces both the time and space overheads related to validation. We evaluate the effectiveness of both algorithms in the context of a state-of-the-art STM implementation. © 2011 Springer-Verlag Berlin Heidelberg.

关键词： Locks (fasteners)

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Multi-dimensional dependency grammar as multigraph description

Multi-dimensional dependency grammar as multigraph descripti...

引用

FLAIRS 2006 - 19th International Florida Artificial Intelligence Research Society Conference

作者： Debusmann, Ralph Smolka, Gert Programming Systems Lab Universität des Saarlandes Postfach 15 11 50 66041 Saarbrücken Germany

Extensible Dependency Grammar (XDG) is new, modular grammar formalism for natural language. An XDG analysis is a multi-dimensional dependency graph, where each dimension represents a different aspect of natural language, e.g. syntactic function, predicate-argument structure, information structure etc. Thus, XDG brings together two recent trends in computational linguistics: the increased application of ideas from dependency grammar and the idea of multi-layered linguistic description. In this paper, we tackle one of the stumbling blocks of XDG so far - its incomplete formalization. We present the first complete formalization of XDG, as a description language for multigraphs based on simply typed lambda calculus. Copyright © 2006, American Association for Artificial Intelligence (***). All rights reserved.

关键词： Context sensitive grammars

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