We investigated the process of unsupervised generative learning and the structure of informative generative representations of images of handwritten digits (MNIST dataset). Learning models with the architecture of spa...
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The efficient use of future MPSoCs with f 000 or more processor cores requires new means of resource-aware programming to deal with increasing imperfections such as process variation, fault rates, aging effects, and p...
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The paper formulates an algorithm for searching the optimal temperature regime of the catalytic process in an ideal mixing reactor. The problem of optimal control of the catalytic process is formulated in a general fo...
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We investigate split and ST bisimulation semantics, in particular the deadlock behaviour of processes in these semantics. We define and axiomatise a variant of ACP, where atomic actions and durational actions coexist,...
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With single thread performance starting to plateau, HW architects have turned to chip level multiprocessing (CMP) to increase processing power. All major microprocessor companies are aggressively shipping multi-core p...
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ISBN:
(纸本)1595936025
With single thread performance starting to plateau, HW architects have turned to chip level multiprocessing (CMP) to increase processing power. All major microprocessor companies are aggressively shipping multi-core products in the mainstream computing market. Moore's law will largely be used to increase HW thread-level parallelism through higher core counts in a CMP environment. CMPs bring new challenges into the design of the software system stack. In this tutorial, we talk about the shift to multi-core processors and the programming implications. In particular, we focus on transactional programming. Transactions have emerged as a promising alternative to lock-based synchronization that eliminates many of the problems associated with lock-based synchronization. We discuss the design of both hardware and software transactional memory and quantify the tradeoffs between the different design points. We show how to extend the Java and C languages with transactional constructs, and how to integrate transactions with compiler optimizations and the language runtime (e.g., memory manager and garbage collection).
The diagnosis of possible faults in railway signaling systems is an important issue to provide safe travel and transportation in railways. Signaling system designers have to consider the possible faults which may occu...
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In this paper, we present the LearnLib, a library of tools for automata learning, which is explicitly designed for the systematic experimental analysis of the profile of available learning algorithms and corresponding...
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In the advent of ambient intelligence, introducing ubiquitous mobile systems and services in general and mobile code in particular, network latency becomes a critical factor, especially in wireless, low-bandwidth envi...
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Maternal treatment with dexamethasone during lactation alters reproductive functions and increases serum corticosterone in the male offspring. Excess corticosterone may induce oxidative stress. This study was designed...
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We describe an axiom system ACPp that incorporates real timed actions. Many examples are provided in order to explain the intuitive contents of the notation. ACPp is a generalisation of ACP. This implies that some of ...
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