作者：
Y. WakasaY. YamamotoDept. of Applied Analysis and Complex Dynamical Systems
Graduate School of Informatics Kyoto University Kyoto Japan. Yuji Wakasa was born in Okayama
Japan in 1968. He received the B.S. and M.S. degrees in engineering from Kyoto university Japan in 1992 and 1994 respectively. From 1994 to 1998 he was a Research Associate in the Department of Information Technology Okayama University. Since April 1998 he has been a Research Associate in the Graduate School of Informatics Kyoto University. His current research interests include robust control and control system design via mathematical programming. Yutaka Yamamoto received his B.S. and M.S. degrees in engineering from Kyoto University
Kyoto Japan in 1972 and 1974 respectively and the M.S. and Ph.D. degree in mathematics from the University of Florida in 1976 and 1978 respectively. From 1978 to 1987 he was with Department of Applied Mathematics and Physics Kyoto University and from 1987 to 1997 with Department of Applied System Science. Since 1998 he is a professor at the current position. His current research interests include realization and robust control of distributed parameter systems learning control sampled-data systems and digital signal processing. Dr. Yamamoto is a receipient of the Sawaragi memorial paper award (1985) the Outstanding Paper Award of SICE (1987) Best Author Award of SICE (1990) the George Axelby Outstanding Paper Award of IEEE CSS in 1996 Takeda Paper Prize of SICE in 1997. He is a Fellow of IEEE. He was an associate editor of Automatica. He is currently an associate editor of IEEE Transactions on Automatic Control Systems and Control Letters and Mathematics of Control Signals and Systems. He is a member of the IEEE the Society of Instrument and Control Engineers (SICE) and the Institute of Systems Control and Information Engineers.
This paper presents a design method of control systems such that a designer can flexibly take account of tradeoffs between evaluated uncertainty ranges and the level of control performance. The problem is reduced to a...
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This paper presents a design method of control systems such that a designer can flexibly take account of tradeoffs between evaluated uncertainty ranges and the level of control performance. The problem is reduced to a BMI problem and approximately solved by LMIs. The convergence of the proposed approximation is proved in a modified sense. A numerical example shows the effectiveness of the proposed method in comparison with the standard robust control.
Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardware, OS time-interrupts, or static-com...
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Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardware, OS time-interrupts, or static-compiler techniques. However, substantially greater gains can be realized when control opportunities are also explored in a dynamic compilation environment. There are several advantages to deploying DVFS and managing energy/performance tradeoffs through the use of a dynamic compiler. Most importantly, dynamic compiler driven DVFS is fine-grained, code-aware, and adaptive to the current microarchitecture environment. This paper presents a design framework of the run-time DVFS optimizer in a general dynamic compilation system. A prototype of the DVFS optimizer is implemented and integrated into an industrial-strength dynamic compilation system. The obtained optimization system is deployed in a real hardware platform that directly measures CPU voltage and current for accurate power and energy readings. Experimental results, based on physical measurements for over 40 SPEC or Olden benchmarks, show that significant energy savings are achieved with little performance degradation. SPEC2K FP benchmarks benefit with energy savings of up to 70% (with 0.5% performance loss). In addition, SPEC2K INT show up to 44% energy savings (with 5% performance loss), SPEC95 FP save up to 64% (with 4.9% performance loss), and Olden save up to 61% (with 4.5% performance loss). On average, the technique leads to an energy delay product (EDP) improvement that is 3times-5times better than static voltage scaling, and is more than 2times (22% vs. 9%) better than the reported DVFS results of prior static compiler work. While the proposed technique is an effective method for microprocessor voltage and frequency control, the design framework and methodology described in this paper have broader potential to address other energy and power issues such as di/dt and thermal control
Rapid single flux quantum (RSFQ) logic is a digital circuit technology that in recent years has presented itself as an alternative to semiconductors in the application of ultra high speed, very low power applications....
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Rapid single flux quantum (RSFQ) logic is a digital circuit technology that in recent years has presented itself as an alternative to semiconductors in the application of ultra high speed, very low power applications. The optimal timing of digital circuits operating at hundreds of GHz is still a complex problem for both RSFQ and semiconductor technologies. The fact that most RSFQ gates require a clock signal to function makes this even more complex. Various RSFQ timing schemes have been adapted from semiconductor design methodologies, and some have been designed specifically for RSFQ. Currently, synchronous clocking schemes outperform other schemes, but with the scale of RSFQ circuits ever increasing, the proper use of timing schemes are becoming more crucial. This paper describes a new asynchronous self-timing scheme where the details of clock distribution and clocking are built into the logic gates. Tests were done on the newly developed asynchronous logic gates and an asynchronous full adder was implemented and tested
Surgical planning as a treatment for vascular diseases re- quires fast blood ow simulations that are eÆcient in handling changing geometry. It is, for example, necessary to try diþerent paths of a planned by...
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作者：
Gupta, GopalPontelli, EnricoApplied Logic
Programming Languages and Systems Lab. Department of Computer Science University of Texas at Dallas Richardson TX 95083 United States Laboratory for Logic
Databases and Advanced Programming Department of Computer Science New Mexico State University Las Cruces NM 88003 United States
Domain Specific Languages (DSLs) are high level languages designed for solving problems in a particular domain, and have been suggested as means for developing reliable software systems. We present a (constraint) logi...
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Recent developments in the theory of artificial intelligence and the advent of the expert systems made it possible to actually produce intelligent systems for computer-aided learning (CAL). A major component of such a...
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