As one of typical paravirtualization hypervisors, Xen has received widespread attentions especially its scaling capability under some kinds of workload. In this paper, we focus on the problem that the most CPU resourc...
详细信息
As one of typical paravirtualization hypervisors, Xen has received widespread attentions especially its scaling capability under some kinds of workload. In this paper, we focus on the problem that the most CPU resources are occupied by frequent interrupt from the NIC(Network Interface Card) and it will cause bottleneck of the system for Xen. To alleviate this problem, this paper proposes an adaptive interrupt latency scheduling mechanism based on XEN, which use the polling or interrupt method in accordance with the queue length of virtual buffer without supplementing any additional processing unit. Also, the method can guarantee different quality of service to some extent by means of the definition of the two types of priority virtual buffers. Simulation results show that the mechanism can reduce CPU overhead significantly and improve system performance effectively.
In this paper, a fast fixed-point simulation technology is proposed for a multi-channel synthetic aperture radar (SAR) imaging system. The overall computations in the SAR imaging algorithm is explicitly analysed. FFT ...
详细信息
ISBN:
(纸本)9781510822023
In this paper, a fast fixed-point simulation technology is proposed for a multi-channel synthetic aperture radar (SAR) imaging system. The overall computations in the SAR imaging algorithm is explicitly analysed. FFT operations account for most memory consumption in the imaging flow. Accordingly, a fixed-point FFT algorithm is adopted due to the trade-off between precision and memory occupation of the FPGA implementation. Furthermore, this paper describes an optimized word-length configuration method based on theoretical analysis of architecture of Radix-22 FFT. This methodology is verified in a SystemC development environment due to its superiority of fast and bit-accurate system-level simulation capability. Finally, the proposed SystemC based fixed-point imaging algorithm and the Matlab based floating-point imaging algorithm are both conducted to process point array target raw data. Peak side-lobe ratio (PSLR) and integrated side-lobe ratio (ISLR) is evaluated. Experimental results indicate that profiles in the two cases do not differ greatly, which validates that the proposed fixedpoint algorithm with less resources occupation has comparable accuracy and can meet system requirements.
In this paper, we proposed a hybrid image data hiding method used for watermarking applications in order to make sure the hidden dual watermarks survive after the image manipulation and enhancement processes. To achie...
详细信息
In order to well solve the phase-only reconfigurable arrays synthesis problems, we introduce an adaptive strategy in invasive weed optimization (IWO), and integrate the adaptive IWO (AIWO) into the framework of MOEA/D...
详细信息
In this paper a new No-Reference (NR) image quality assessment (IQA) method based on the point wise statistics of local normalized luminance signals using region of interest (ROI) processing is proposed. This algorith...
详细信息
With the rapid development of the Internet, the application of data mining in the Internet is becoming more and more extensive. However, the data source’s complex feature redundancy leads that data mining process bec...
详细信息
Center nodes have a bigger load and burden with lots of routing in an Ad Hoc Network Model. Congestion of the nodes' packets has a great impact on network performance, especially in wireless networks. This paper p...
详细信息
In order to verify the network traffic decline because by node breakdown, this paper proposes a new type of prediction algorithm (Prediction algorithm based on Discrete-Queue for FARIMA model, PDF). At first, the math...
详细信息
Traditional Naive Bayesian classification model does not consider the feature redundancy in intrusion forensics and neglects the difference between data attributes in different intrusion actions. This paper proposed a...
详细信息
Traditional Naive Bayesian classification model does not consider the feature redundancy in intrusion forensics and neglects the difference between data attributes in different intrusion actions. This paper proposed a Naive Bayesian network intrusion detection algorithm based on the principal component analysis, it calculate the characteristic value of the original network attack data, then extract the main properties through the principal component analysis. Take the main properties as the new attribute set and the corresponding principal component contribution rate as weights to improve traditional Naive Bayesian classification algorithm. The experimental results showed that the algorithm can effectively reduce the data dimension and improve the efficiency of detection.
Universal-filtered multi-carrier (UFMC) technique is considered as a potential candidate for future communication systems due to its robustness against inter-carrier interference (ICI), suitability for non-contiguous ...
详细信息
ISBN:
(纸本)9781479953455
Universal-filtered multi-carrier (UFMC) technique is considered as a potential candidate for future communication systems due to its robustness against inter-carrier interference (ICI), suitability for non-contiguous fragmented available spectrum resources and low latency scenario in 5G network. In this paper, we present a novel pulse shaping approach in UFMC to reduce the spectral leakage into nearby subbands used for same or other users with low complexity and high throughput. In the new scheme, we apply Bohman filter-based pulse shaping with combination of antipodal symbol-pairs to the edge-subcarriers of the subbands, and consequently reduce the out-of-band radiation. This scheme outperforms the current state-of-the art and offers better signal-to-interference ratio (SIR) to improve the robustness against carrier frequency offset (CFO) for energy saving in loosely synchronized scenario. We further validate the proposed scheme on field programmable gate array (FPGA) hardware prototype.
暂无评论