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2024 Energy Conversion Congress and Expo Europe, ECCE Europe 2024

作者： derix, david Blaum, Christian Kruschel, Wolfram Heer, daniel Hensel, Andreas Pfeiffer, Jonas Mier, Ainhoa Puyadena Mena Carrillo, Juan Thoma, Jurgen drexler, Christoph Schmidhuber, Michael Friedrichs, Peter Power Electronics and Grid Integration Fraunhofer Institute for Solar Energy Systems Freiburg Germany Advance R&d Sumida Components & Modules GmbH Germany Power Module Development Infineon Technologies Ag Warstein Germany Technical Marketing Infineon Technologies Ag Warstein Germany Business Excellence Infineon Technologies Ag Munich Germany Technology Development Infineon Technologies Ag Erlangen Germany

ISBN: (纸本)9798350364446

In this project, the power electronic system technology for future high-performance charging systems along highways or large inner-city electric charging stations with several MVA system sizes with reduced material demand is presented. The concept is based on a dC bus with 1.5 kV and corresponding high efficient power electronics to connect the vehicles to the dC grid. This approach leads to a cost-efficient system. Key components are an electrically isolated dC converter based on 2 kV SiC power modules and an inductive transformer with switching frequencies up to 50 kHz and an output power of 175 kW. © 2024 IEEE.

关键词： Fast charging (Batteries)

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High-voltage converter with 2 kV SiC MOSFETs for electric fast charging stations

High-voltage converter with 2 kV SiC MOSFETs for electric fa...

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European Conference on Power Electronics and Applications

作者： david derix Christian Blaum Wolfram Kruschel daniel Heer Andreas Hensel Jonas Pfeiffer Ainhoa Puyadena Mier Juan Mena Carrillo Jürgen Thoma Christoph drexler Michael Schmidhuber Peter Friedrichs Power Electronics and Grid Integration Fraunhofer Institute for Solar Energy Systems Freiburg Germany Advance R&D SUMIDA Components & Modules GmbH Germany Power Module Development Infineon Technologies AG Warstein Germany Technical Marketing Infineon Technologies AG Warstein Germany Business Excellence Infineon Technologies AG Munich Germany Technology Development Infineon Technologies AG Erlangen Germany

ISBN: (数字)9798350364446

ISBN: (纸本)9798350364453

关键词： road transportation MOSFET Silicon carbide Switching frequency Europe Multichip modules High-voltage techniques Transformers Power electronics Power generation

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60 GHz On-Chip BiCMOS Bow-Tie Antenna

60 GHz On-Chip BiCMOS Bow-Tie Antenna

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IEEE-APS Conference on Antennas and Propagation for Wireless Communications

作者： Andreas Bronner Felix Schwarze Frank Ellinger R&D - Advance Development WIKA Alexander Wiegand SE & Co.KG Klingenberg Germany Chair for Circuit Design and Network Theory Technische Universitä t Dresden Dresden Germany

A fully integrated bow-tie antenna for the frequency range around 60 GHz is proposed which is designed for passive millimeter wave wireless sensor systems on-chip. Fabricated instandard bulk semiconductor technology, the radiation efficiency at 60 GHz is 20.9\% while thegain of the antenna is 0.2 dBi (gain in decibels with respect to an isotropic radiator). The return loss is higher than 13 dB, with a measured bandwidth including matching to 50 Ω of 2.5 GHz around 60 GHz making the antenna well suitable for low data rate sensors. The occupied chip size is 2.56 mm 2 . Furthermore, the influence of the ma- terial properties of the semiconductor, like the substrate height, substrate resistivity and permittivity on the antenna performance are discussed.

关键词： Substrates dipole antennas Antenna measurements System-on-chip Conductivity Millimeter wave technology

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24 GHz BiCMOS Single-Stage rectifier

24 GHz BiCMOS Single-Stage Rectifier

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IEEE-APS Conference on Antennas and Propagation for Wireless Communications

作者： Andreas Brönner Paulius Sakalas Frank Ellinger R&D - Advance Development WIKA Alexander Wiegand SE & Co. KG Klingenberg Germany Semiconductor Physics Institute Center for Physical Sciences and Technology Vilnius Lithuania Chair for Circuit Design and Network Theory Technische Universität Dresden Dresden Germany

This paper presents a fully integrated 24 GHz single-stage rectifier which is designed for passive millimeter wave wireless systems on-chip. The rectifier is converting the rF power captured by the antenna into dC power necessary to supply the active components of a passive radio-frequency identification (rFId)-tag. By increasing the sensitivity of the rectifier, the read range of a passive rFId tag is maximized. The sensitivity is defined as the minimum input power necessary to achieve the output voltage with a given load. In the proposed work we target an output voltage of 1 V, a load of 200 kΩ and achieved a sensitivity of -14 dBm using a single-stage rectifier. The occupied chip size is 0.09 mm 2 , fabricated in a 130 nm BiCMOS technology. Furthermore, the used source pull technique is discussed, which is used to characterize the nonlinear time-variant rectifier in simulation and measurement.

关键词： Sensitivity radio frequency Voltage measurement Millimeter wave technology Impedance Tuners BiCMOS integrated circuits

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dynamic parameter for selecting a cloud service

Dynamic parameter for selecting a cloud service

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International Conference on Computation of Power, Energy, Information and Communication (ICCPEIC)

作者： rizwana A.r. Shaikh M. Sasikumar Computer Engineering NMIMS Nerul Navi Mumbai India Director of Research R&D Center of Development and Advance Computing Karghar Navi Mumbai India

Cloud computing has captured a substantial market share since the past few years. Changing need and demands of cloud computing services is increasing till date. Cloud computing technology has given a very competitive opportunity to enhance the existing business and generate good revenue out of it. Various cloud computing services available with various specifications. It becomes difficult for new users who want to select a particular service from a reputed vendor. Here we have identified some parameters that can be used as a checklist to evaluate and select a particular cloud service and service provider. Also based on these parameter the reputation of a cloud service provider can also be determined.

关键词： Irrigation Media History

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robust process integration of 0.78 /spl mu/m/sup 2/ embedded SrAM with NiSi gate and low-K Cu interconnect for 90 nm SoC applications

Robust process integration of 0.78 /spl mu/m/sup 2/ embedded...

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Symposium on VLSI Technology

作者： Y.W. Kim J.H. Ahn T.S. Park C.B. Oh K.T. Lee H.S. Kang d.H. Lee Y.G. Ko K.S. Cheong J.W. Jun S.H. Liu J. Kim J.L. Nam S.r. Ha J.B. Park S.A. Song K.P. Suh Technology Development System LSI division Samsung Electronics Company Limited Yongin si Kyunggi South Korea R&D Center Memory division Samsung Electronics Company Limited Yongin si Kyunggi South Korea Memory division R&D Center K1 Business Samsung Electronics Samsung Advance Institute of Technology AE Center Yongin si Kyunggi South Korea

The smallest high density embedded 0.78 /spl mu/m/sup 2/ 6T-SrAM cell for high performance 90 nm SoC applications was successively integrated by using leading edge technologies such as 193 nm ArF lithography, 1.2 nm gate oxide, 50 nm transistor and Cu dual damascene with low-K dielectric. Fully working for SrAM shows the SNM value above 200 mV. device current of 870 /spl mu/A//spl mu/m and 390 /spl mu/A//spl mu/m for NMOS and PMOS respectively is achieved at 1.0 V operation. reliability life time on hot carrier immunity shows more than 10 years.

关键词： robustness random access memory Lithography Hot carriers Logic devices Implants Etching Large scale integration MOS devices Nickel

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Process integration of Cu metallization and ultra low k (k=2.2)

Process integration of Cu metallization and ultra low k (k=2...

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IEEE International Conference on Interconnect Technology

作者： Chuan-cheng Cheng Wei-jen Hsia J. Pallinti S. Neumann J. Koh P. Li Mei Zhu M. Lu Hao Cui T. Fujimoto W. Catabay P. Wright Process Technology Department. Process R&D LSI Logic Corporation Santa Clara CA USA Process Module Development and Advance Research LSI Logic Corporation Gresham OR USA

The first process integration of Cu metallization and next generation CVd ultra low k (Trikon Orion ULK, k=2.2) is presented. The current process condition for a 130 nm node Cu/lowk (k=2.9) process is applied to Cu/ULK and found to be suitable without major modifications. The comparison of post CMP measurement (dishing, erosion, peeling, and scratch) show no significant variation between control (k=2.9) and ULK. The electrical data indicates the successful integration of Cu and ULK. The interconnect capacitance is expected to reduce 20% at 0.1 /spl mu/m technology node using the ULK film.

关键词： Metallization Etching Silicon carbide Chemistry Large scale integration Logic delay dielectric materials dielectric constant Inspection

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AN advanced METHOdOLOGY FOr PrELIMINArY HULL FOrM development

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NAVAL ENGINEErS JOUrNAL 1984年第4期96卷 147-161页

作者： LIN, WC dAY, WG HOUGH, JJ KEANE, rG WALdEN, dA KOH, IY Wen-Chin Lin:heads the Ship Powering Division at the David Taylor Naval Ship R&D Center (DTNSRDC). Dr. Lin received his B.S. degree in mechanical engineering from the National Taiwan University in 1957. He was awarded his M.S. degree in naval architecture and Ph.D. in engineering science from the University of California at Berkeley in 1963 and 1966 respectively. From 1966 to 1969 he was employed by ESSO Research and Engineering Company to conduct marine hydrodynamic research for oil tankers and offshore structures. Since joining DTNSRDC in 1969 he has actively conducted and directed hydrodynamic research to advance naval ship design technology and improve ship performance. Active in national and international symposia on ship hydrodynamic research he is recognized for contributions to the ship research community. For the past six years he has been a member of the Performance Committee of the ITTC and currently serves as secretary of the committee. He is a member of SNAME and the Society of Naval Architects of Japan. William G. Day Jr:. has been employed as a naval architect at the David Taylor Naval Ship R&D Center since receiving a B.E.S. degree from the Johns Hopkins University in 1966. He obtained an M.S. E. degree from George Washington University in 1971. As Head Design Evaluation Branch of the Ship Performance Department he is responsible for model experiments to evaluate the hydrodynamic performance of ships and propulsors. He is a member of ASNE and SNAME. In-Young Koh:received his B.S. and M.S. degrees in electrical engineering from Lowell University in 1969 and 1971 respectively and his Ph.D. in applied mechanics from Rensselaer Polytechnic Institute in 1976. Dr. Koh joined DTNSRDC as an electronic engineer specializing in the application of advanced instrumentation and computer techniques to ship research and design. He is currently engaged in research and development of active control systems for naval ship applications. Dr. Koh is a member of ASNE SNAME and IEEE. David Andrew Walden:is

A ship design methodology is presented for developing hull forms that attain improved performance in both seakeeping and resistance. Contrary to traditional practice, the methodology starts with developing a seakeeping-optimized hull form without making concessions to other performance considerations, such as resistance. The seakeeping-optimized hull is then modified to improve other performance characteristics without degrading the seakeeping. Presented is a point-design example produced by this methodology. Merits of the methodology and the point design are assessed on the basis of theoretical calculations and model experiments. This methodology is an integral part of the Hull Form design System (HFdS) being developed for computer-supported naval ship design. The modularized character of HFdS and its application to hull form development are discussed.

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