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Effect of Selenium doping on GeSb for Phase Change Memory Applications

ECS Meeting Abstracts 2014年第42期MA2014-02卷

作者： dae Hong Ko Jeong Hoon Kim dae-Seoup Byeon Jeong hee Park Department of Materials Science and Engineering Yonsei University Process Development team semiconductor R&D Division Samsung Electronics Co. Ltd

Phase change memory(PCM) has been focused as the alternative for next generation memory since it shows several advantages such as low fabrication cost, a scalability below 20nm design rule, large endurance cycles, and compatibility with semiconductor process. However, there still exist essential problems that are mainly determined by the properties of a phase change material. For example, the PCM cells composed of GeSbTe alloy relatively show low crystallization temperature, slow operation speed, and narrow resistance margin between reset and set state in respect of commercialization of PCM. In our study, the GeSb film was selected as phase change material due to its fast crystallization speed and selenium was employed doping element for increasing thermal stability and the margin between high and low resistance. When the selenium was incorporated into GeSb film up to 8 at %, the crystallization temperature increased from 150oC to 225oC and the amorphous sheet resistance was elevated more than 13 times compared with undoped GeSb film. In addition, the resistance margin of the film significantly increased more 2 order of magnitude than that of GeSbTe film. The phase separation was found in the GeSb film doped with selenium over 8 at % and this was proved by Xrd and XPS analyses. As a consequence, Selenium doped GeSb film was strongly demonstrated as phase change material of PCM cell due to its thermal stability and large resistance margin including high crystallization speed.

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Enhancement of switching margin by utilizing superior pinned layer stability for sub-20nm perpendicular STT-MrAM

Enhancement of switching margin by utilizing superior pinned...

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Symposium on VLSI Technology

作者： Woo Chang Lim Y. J. Lee J. M. Lee W. K. Kim J. H. Kim K. W. Kim K. S. Kim Y. S. Park H. J. Shin Process Development Team Semiconductor R&D Center Samsung Electronics Co. Ltd.

ISBN: (纸本)9781479916238

We report enhanced switching margin in perpendicular MTJ cells at 20nm node. By introducing a novel structure with superior pinned layer stability, stable magnetization switching without magnetostatic interference has been achieved. Wide switching field margins over 40σhave been secured for reproducible STT switching as well as a tightly controlled H_(offset) below 100Oe. Switching voltage margin of the novel structure are also wide enough to show definite STT switching.

关键词： MrAM Switching margin Pinned layer stability

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Vibrations in steel strips: effects on flatness measurement and filtering

Vibrations in steel strips: effects on flatness measurement ...

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IEEE Industry Applications Society Annual Meeting

作者： ruben Usamentiaga daniel F. Garcia Julio Molleda Francisco G. Bulnes Gabriel Bonet Department of Computer Science and Engineering University of Oviedo ArcelorMittal R&D Process Management Technological Development Center

ISBN: (纸本)9781467352031

Vibrations are periodic or random motion from an equilibrium position. In the steel industry, vibrations are an undesirable phenomenon, as they waste energy and create unwanted noise. For example, vibrations affect steel strips during rolling and transportation, producing random or periodic vertical movements of the strips as they move forward along a roll path. The consequences of these vibrations are particularly harmful for 3d reconstruction and flatness measurement based on non-contact techniques. Vibrations corrupt the height profiles, causing an erroneous reconstruction of the 3d surface. The flatness measurement is also distorted because the estimated lengths of the strip fibers with vibrations are different. This paper analyzes how vibrations in steel strips affect flatness measurement, and proposes methods to remove or reduce these effects. The shape of steel strips is firstly modeled including the two most common flatness defects: wavy edges and center buckle. Then, different types of vibrations are added to the strip models, and their effects on the resulting flatness measurement are analyzed. The method proposed to reduce the effects of vibrations is a combination of a low-pass filter and geometric transformations. Finally, these methods are applied to data from real strips.

关键词： Vibrations Flatness measurement Steel rolling

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Temperature tracking system for sinter material in a rotatory cooler based on infrared thermography

Temperature tracking system for sinter material in a rotator...

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IEEE Industry Applications Society Annual Meeting

作者： ruben Usamentiaga daniel F. Garcia Julio Molleda Francisco G. Bulnes Virgilio G. Orgeira Department of Computer Science and Engineering University of Oviedo ArcelorMittal R&D Process Management Technological Development Center

ISBN: (纸本)9781467352031

Sintering is an industrial process used in the steel industry to transform fine particles of iron ore into coarse grained iron known as sinter. during the process, iron ore fines are mixed with other products such as coke fines and fired at a temperature below the melting point of the material. A rotatory cooler is later used to reduce the temperature of the resulting sinter. Temperature control is very important in the sintering process, since the chemical reactions that occur in the sintering mixture rely heavily upon the temperature. Temperature also dictates the cooler running speed and the air flow of the fans. This work presents a system to measure the temperature of sinter during cooling based on infrared thermography. The system detects the position of the cooler automatically. It applies image registration techniques to track the temperature in the same zones of the sinter material in different images. This procedure makes it possible to control the temperature decay curve of the sinter.

关键词： Infrared thermography Temperature control Sintering

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reliable Integration of robust Porous Ultra Low-k (ULK) for the Advanced BEOL Interconnect

Reliable Integration of Robust Porous Ultra Low-k (ULK) for ...

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IEEE International Interconnect Technology Conference

作者： Kyu-Hee Han Seungwook Choi Tae Jin Yim Seunghyuk Choi Jongmin Baek Sang Hoon Ahn Nae-In Lee Siyoung Choi Ho-Kyu Kang ES Jung Process Development Team Semiconductor R&D Center Samsung Electronics Banwol-Dong Hwasung-City Gyeonggi-Do Korea

ISBN: (纸本)9781479904372

In order to address the increasing rC and reliability challenges at the advanced technology nodes, a new robust ULK was developed that incorporates the bridging carbon atoms (Si-[CH_2]_x-Si) in p-SiOCH matrix. Its elastic modulus and plasma damage resistance were improved more than 40% at the same dielectric constant than the commercially available ULK. These improvements are attributed to 80% higher atoms that exist in both Si-[CH_2]_x-Si and Si-CH_3 structures with its pore size 23% smaller. Furthermore, its superb properties resulted in 3-4% capacitance reduction, and improvement of TddB and EM TTF (time to failure) by 2 order and 2~3 times, respectively, on an advanced BEOL vehicle.

关键词： Integration Ultra BEOL

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Keltan ACETM technology, a radical breakthrough

Keltan ACETM technology, a radical breakthrough

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Asian Polyolefin Workshop (APO2013)2013亚洲聚烯烃研讨会

作者： Gerard van doremaele LANXESS Elastomers B.V.Director Catalyst and Process Development Global R&D 6160 BC GeleenThe Netherlands

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Surface Inspection of Cu-Cu Non-Thermal Compression Bonding for Wafer-to-Wafer 3d Stacking

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ECS Transactions 2014年第5期64卷

作者： doowon Kwon Young-Uk Song Pilkyu Kang Taeseok Oh Chang-rok Moon duckhyung Lee LSI Technology Development Team System LSI Division Samsung Electronics Co. Ltd. LSI Technology Development Team System LSI Division Samsung Electronics Co.Ltd Process Development Team Semiconductor R&D CenterSamsung Electronics Co. Ltd LSI Technology Development Team System LSI Division Samsung Electronics Co. Ltd

A new monitoring system combining SPd (Surface Potential difference) imaging technique and Xrd analysis has shown to be effective in understanding of plasma influence and monitoring plasma process in wafer bonding. This work will give a way to improve bonding yield in the hybrid Cu-Cu non-thermal compression bonding process through monitoring and optimizing plasma process conditions.

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Surface Inspection of Cu-Cu Non-Thermal Compression Bonding for Wafer-to-Wafer 3d Stacking

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ECS Meeting Abstracts 2014年第34期MA2014-02卷

Backside illuminated CMOS image sensors with a 3d stacked architecture, where the pixel array is attached on top of the logic circuit, was introduced and have just come to the market. Image sensor featuring 3d stacking was realized by connection between the interconnect layers of the top and bottom parts using vertical type through-silicon via (TSV).1 Cu bonding technology for 3d integration has been studied and widely applied.2As Wafer-to-wafer bonding process is now being used widely and matured through the production of Backside illuminated CMOS image sensors, Copper-copper bonding provides an attractive route to 3d stacked image sensor since it creates a strong metal bond and enables vertically electrical connection during the bonding process. Specific pre-bonding surface conditioning is necessary to insure high bonding quality of patterned Cu wafers using Cu-Cu non-thermo compression bonding for wafer-to-wafer 3d stacking. Surface preparations for the hybrid fusion bonding such as removal of Cu oxide, Cu surface protection and optimized CMP planarization patterned Cu surfaces have been studied,3 but the study on plasma condition for hybrid fusion bonding is relatively a few. The work described here is investigating of the plasma-related Cu patterned hybrid surface preparation under different plasma conditions. The main physical mechanisms about Cu-Cu non thermal compression bonding are spontaneous adhesion of hydrophilic surfaces followed by Cu diffusion across the bonding interface when Cu-Cu contact is reached (diffusion bonding) have been previously reported.4 The property of Cu dielectric diffusion barriers used in ULSI is hydrophobic. For the efficient bonding of hydrophobic-hydrophobic layers, surface conversion process is introduced.5 In the case of Cu-patterned hybrid bonding in typical Cu metallization layer in ULSI, Trade-off between dielectric diffusion barrier and Cu cannot be avoidable by surface conversion process. during the Cu-patterned hybrid b

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A practical Si nanowire technology with nanowire-on-insulator structure for beyond 10nm logic technologies

A practical Si nanowire technology with nanowire-on-insulato...

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International Electron devices Meeting (IEdM)

作者： Sung-Gi Hur Jung-Gil Yang Sang-Su Kim dong-Kyu Lee Taehyun An Kab-Jin Nam Seong-Je Kim Zhenhua Wu Wonsok Lee Uihui Kwon Keun-Ho Lee Youngkwan Park Wouns Yang Jungdal Choi Ho-Kyu Kang EunSung Jung Semiconductor R&D center Samsung Electronics Co Hwasung-city Gyeonggi-do Korea Process Development Team CAE Team Hwasung-city Gyeonggi-do Korea

This paper reports the design and fabrication of a practical Si nanowire (NW) transistor for beyond 10 nm logic devices application. The dependency of the dC and AC performances of Si NW MOSFETs on NW diameter (d NW ) and gate oxide thickness has been investigated. A Si NW device with the scaled d NW of 9 nm and thin equivalent oxide thickness (EOT) of 0.9 nm improved both on-current and electrostatic characteristics. Finally, a Nanowire-On-Insulator (NOI) structure has been proposed to enhance the AC performance of a multiple-stacked NWs structure, which improves dC performance but has the issue of high parasitic capacitance. As a result, the simulated AC performance of a triple-NOI structure was improved by around 20% compared to conventional triple NW structure.

关键词： Silicon Logic gates Performance evaluation Silicon germanium Capacitance Nanostructures FinFETs

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Efficient and Modular Synthesis of New Structurally diverse Functionalized [n]Paracyclophanes by a ring‐distortion Strategy†

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Angewandte Chemie 2014年第33期126卷

作者： Jean‐Philippe Krieger Gino ricci dominique Lesuisse Christophe Meyer Janine Cossy Laboratory of Organic Chemistry ESPCI ParisTech CNRS 10 rue Vauquelin 75231 Paris Cedex 05 (France) Sanofi Process Development 45 Chemin de Mételine BP15 04210 Sisteron Cedex (France) R&D Sanofi 1 Avenue Pierre Brossolette 91385 Chilly‐Mazarin Cedex (France)

With the goal of synthesizing new [ n ]paracyclophanes, the expansion of the scope of a strategy originally disclosed by Winterfeldt et al., was investigated. This approach involves sequential diels–Alder/retro‐diels–Alder reactions, the applications of which have been constrained so far to steroid derivatives. An efficient access to new functionalized [9]‐, [10]‐, and [16]paracyclophanes, including original cage architectures, was developed from readily available building blocks using thermal electrocyclization and a cycloaddition/cycloreversion sequence as the key steps.

关键词： diels‐Alder‐reaktionen Elektrocyclische reaktionen Makrocyclen Molekulare diversität Paracyclophane

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