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IEEE Electron Devices technology and Manufacturing Conference (EDTM)

作者： Mingyuan Gu Jiafei Yao Yufeng Guo Maolin Zhang Qicong Liang Jiayi Wu Jincheng Liu Dongxiang Xu National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing China Nanjing University of Posts and Telecommunications Nanjing China

In this work, a novel structure of FDSOI Negative Capacitance FET (NCFET) with Stepped Thickness Ferroelectric Layer (STFL) is proposed. The STFL forms an ununiform electrostatic potential distribution on the gate oxide, which modulates the electric characteristics of NCFET. The capacitances, transfer characteristics, output characteristics, and Sub-threshold Swing (SS) are investigated. The SS of STFL FDSOI NCFET can be reduced to 49mV/dec, shows a better performance when compared to the conventional FDSOI NCFET with equal ferroelectric layer.

关键词： Electric potential Simulation Capacitance-voltage characteristics Field effect transistors Silicon-on-insulator Logic gates Tools

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Circularly Polarized Leaky Wave Antenna Based on Compound Left-Right-Hand Structure

Circularly Polarized Leaky Wave Antenna Based on Compound Le...

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International Conference on microwave and Millimeter Wave technology Proceedings

作者： Huanyu Yin Pinyan Li Leilei Liu National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology College of Electronic and Optical Engineering Nanjing University of Posts and Telecommunications Nanjing China

ISBN: (数字)9781665434379

ISBN: (纸本)9781665434386

In this paper, a circularly polarized leaky wave antenna based on compound left-right-hand structure (CRLH) is proposed. In this design, the equivalent series capacitance is realized by the annular groove on the metal microstrip, and the parallel inductance is realized by the metal through hole. The antenna can realize frequency beam scanning in 14-18GHz and circular polarization in 15.5-18GHz.

关键词： microwave antennas Polarization microwave technology microwave integrated circuits Millimeter wave technology Metals Leaky wave antennas

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Laser-induced forward transferred silver nanomembrane with controllable light absorption

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Journal of Central South University 2022年第10期29卷 3399-3409页

作者： LI Ruo-zhou GUO Lyu-jiu YANG Ming-qing QU Ke YAN Jing College of Integrated Circuit Science and Engineering Nanjing University of Posts and TelecommunicationsNanjing 210023China National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing University of Posts and TelecommunicationsNanjing 210023China College of Electronic and Optical Engineering Nanjing University of Posts and TelecommunicationsNanjing 210023China

Laser processing provides highly-controlled modification and on-demand fabrication of plasmon metal nanostructures for light absorption and photothermal *** present the laser-induced forward tansfer(LIFT)fabrication of silver nanomembranes in control of light *** varying the hatch distance,different morphologies of randomly distributed plasmon silver nanostructures were produced,leading to well-controlled light absorption levels from 11%to 81%over *** anti-reflection features were maintained below 17%.Equilibrated and plain absorptions were obtained throughout all absorption levels with a maximum intensity fluctuation of±8.5%for the 225μJ *** 45μJ pulse energy can offer a highly equilibrated absorption at a 60%absorption level with an intensity fluctuation of±1%.Pattern transfer was also achieved on a thin tape *** laser-transferred characters and patterns demonstrate a localized temperature rise.A rapid temperature rising of roughly 15℃can be achieved within 1 *** LIFT process is highly efficiently fabricated with a typical speed value of 10^(3)to 10^(5)cm^(2)/*** results indicated that LIFT is a well-controlled and efficient method for the production of optical films with specific absorption levels.

关键词： laser-induced forward transfer silver nanomembrane controllable light absorption laser printing

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A 3D Crystal plasticity finite element model for a 3D package under drop impact

A 3D Crystal plasticity finite element model for a 3D packag...

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International Conference on (ICEPT) Electronic Packaging technology

作者： Shijiao Liu Yujie Cheng Linhai Gan Shanwen Hu Zhikuang Cai Lu Liu The College of International Circuit Science and Engineering National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing University of Posts and Telecommunications Nanjing China

As one of the most vulnerable positions in the microelectronic package structure, the defect of the solder joint may result in the breakdown of the entire electronic package. Researching the deformation behavior of solder joints in various kinds of loads is significant. The micron-sized solder joints may only contain one or several grains, the traditional macroscopic phenomenology constitutive model cannot reasonably reflect the grain deformation caused by crystalline sliding. A 3D crystal plastic finite element (CPFE) model of 40 Oriented Grains is set up to study the deformation behavior of Sn-3.0Ag-0.5Cu (SAC305) at various strain rates of 1%s -1 , 0.1s -1 , 0.01%s -1 and different temperatures of 298K, 348K, and 398K. Using the Crystal Plasticity Theory, the deformation behavior of every grain, and the mean stress and strain relation of the structure is achieved by means of homogenization. The model is used to simulate monoaxial tension testing of SAC305 solders under various strain rates of 1%s -1 , 0.1s -1 , and 0.01%s -1 , and different temperatures of 298K, 348K, and 398K. Based on the stress and strain relation of experiment data, the relative parameters of the model were adjusted. The results show that the Proper Precision of the SAC305 solder joints under various loading conditions can be used to describe the stress and strain behavior. On this basis, a 3D package finite element model with two chips is established to calculate the stress and non-elastic strain under the impact of dropping, and the sub-model analysis of solder joints in the package is carried out by using the constitutive model and a study was made on the deformed state of the solder joints. By analyzing the influence of different dropping heights (1m, 10m, 20m) and dropping gestures (face-down, right-side-up, and vertical-fall) on the deformation of the electronic package structure, the most vulnerable position of the package structure can be found out, which can provide suggestions for

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A SAR ADC-based Temperature Sensor in BCS O.18μm technology 14

A SAR ADC-based Temperature Sensor in BCS O.18μm Technology

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14th International Conference on microwave and Millimeter Wave technology, ICMMT 2022

作者： Liu, Yihua Wang, Yang Guo, Yufeng Gao, Hao Zhang, Yi Nanjing University of Posts and Telecommunications College of Integrated Circuit Science and Engineering Nanjing China National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing China State Key Laboratory of Millimeter Waves Nanjing210096 China Nanjing Vocational University of Industry Technology Nanjing China Silicon Austria Labs LinzA-4040 Austria

ISBN: (纸本)9781665467520

This paper presents a SAR ADC-based temperature sensor in 0.18μm. In order to expand the temperature measurement range, the improved TSPC register is used in the SAR logic circuit. Meanwhile, the segmented capacitor structure is adopted to reduce the chip area, while the dynamic matching technology is used to reduce the influence of component mismatch on the accuracy. The post-simulation results show that the temperature measurement range of the temperature sensor is -150 ° C-200 ° C, and the temperature measurement accuracy is -3-+4 °C. © 2022 IEEE.

关键词： Temperature sensors

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An Active Gate Driver with Controllable Gate Current for SiC MOSFETs

An Active Gate Driver with Controllable Gate Current for SiC...

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International Conference on Integrated Circuits and microsystems (ICICM)

作者： Zhengfei Jiang Jiafei Yao Yuxuan Dai Ziwei Hu Man Li Yi Zhang Zixuan Wang Zhikuang Cai Yufeng Guo National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology College of Integrated Circuit Science and Engineering Nanjing University of Posts and Telecommunications Nanjing China

ISBN: (数字)9798331509453

ISBN: (纸本)9798331520243

An active gate driver (AGD) with controllable gate current (CGC) for SiC MOSFETs is proposed to reduce voltage overshoots and current overshoots. In the CGC-AGD, the controllable current overshoot suppression circuit and voltage overshoot suppression circuit are designed to control the rate of changes in current (di/dt) and voltage (dv/dt) to effectively reduce overshoots. Meanwhile, the current conversion circuit and the push-pull amplifier circuit compensate for the current reduction resulting from the overshoot suppression. This paper simulated the current and voltage overshoot during the switching process based on a double pulse test set up with a 1200V SiC MOSFET by LTspice software. The simulation results show that the current overshoot was reduced by 60% and the voltage overshoot was reduced by 22% when compared to the conventional gate driver (CGD). While compared with the AGD circuit, the current overshoot of CGC-AGD is reduced by 26% and the voltage overshoot is reduced by 19%. These results demonstrate that the CGC-AGD has better suppress on current and voltage overshoot.

关键词： micromechanical devices Integrated circuits MOSFET Silicon carbide Simulation Switches Logic gates Gate drivers Software Voltage control

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A Review of Intelligent Design for Test Based on Machine Learning

A Review of Intelligent Design for Test Based on Machine Lea...

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Electronics Design Automation (ISEDA), International Symposium of

作者： Zeyu Zhao Zhikuang Cai National and Local Joint Engineering Laboratory of RF Integration and Micro-assembly Technology College of Integrated Circuit Science and Engineering Nanjing University of Posts and Telecommunications Nanjing China

In recent years, with the development of post-Moore era, integrated circuit architecture is complex and test cost is increasing. How to apply efficient, reliable, fast and sustainable ideas to integrated circuit design has become a research hotspot in this field. Machine Learning, by virtue of its ability to quickly process abundant data information, shines in the field of Design For Test, which aims to improve the reliability of integrated circuit products and reduce design costs. In this paper, we introduce the application of Machine Learning in scan compression, Automatic Test Pattern Generation algorithm, the Test Pattern Generator in Built-In-Self- Test and test power. In addition, we prospect the foreground application of Machine Learning application in scan test, Automatic Test Pattern Generation, Built-In-Self- Test and test power.

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12-bit 2.6 GS/s RF DAC based on return-to-zero technology

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The Journal of China Universities of Posts and Telecommunications 2019年第4期26卷 36-42页

作者： Li Xiaopeng Wang Zhigong Zhang Yi Zhang Youtao Zhang Mi Institute of RF and OE ICs Southeast UniversityNanjing 210096China Nanjing Guobo Electronics Company Limited Nanjing 210016China Nanjing Electronic Devices Institute Nanjing 210016China National and Local Joint Engineering Laboratory of RF Integration and Micro-assembly Technology Nanjing 210046China College of Microelectronics Nanjing University of Posts and TelecommunicationsNanjing 210046China State Key Laboratory of Millimeter Waves Southeast UniversityNanjing 210096China Science and Technology on Monolithic Intergrated Circuits and Modules Laboratory Nanjing 210016China

A 12-bit 2.6 GS/s radio frequency digital to analog converter(RF DAC)based on 1 um GaAs heterojunction bipolar transistor(HBT)process is *** DAC integrates a 4:1 multiplexer to reduce the data rate of input ports,which greatly facilitates the *** core adopts 4+8 segmented current steering structure.R-2R ladder network is used for 8 least significant bit(LSB)to realize binary current weighting and thermometer coding is used for 4 most significant bit(MSB).Return-to-zero(RZ)technology is used to expand the effective bandwidth of DAC output to the third Nyquist *** proposed DAC has a better output power flatness and spurious-free dynamic range(SFDR).Compared to traditional DAC,measured results demonstrate that the output power of this RZ DAC is increased by 33 dB and the SFDR is enhanced by 27 dB near the second Nyquist band.

关键词： DAC RZ Nyquist band

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A Novel microstrip Patch Antenna with Bandwidth Enhancement

A Novel Microstrip Patch Antenna with Bandwidth Enhancement

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International Symposium on Antennas and Propagation (ISAP)

作者： Wei Dai Yiming Tang Zhaojun Chu Jinpeng Xu National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology Nanjing University of Posts & Telecommunications Nanjing Jiangsu P.R. China

A novel microstrip patch antenna with bandwidth enhancement is proposed in this paper. Based on the structure of the traditional microstrip patch antenna, the proposed antenna adds an impedance matching network to broaden bandwidth and achieve lower return loss. Adding a parasitic patch near the original patch, the antenna bandwidth is further expanded and the radiation characteristics of the antenna can be improved. The simulated impedance bandwidth of 16.7% (14~16.5 GHz) can be obtained and the gain in the range of bandwidth is mostly above 6 dB. The proposed antenna enjoys good impedance matching and stable gain, which make it suitable for modern communication systems, satellite communications and some control systems.

关键词： Bandwidth microstrip antennas Patch antennas microstrip Gain Impedance matching

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A low noise SPAD pixel array with analog readout method

A low noise SPAD pixel array with analog readout method

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China Semiconductor technology International Conference (CSTIC)

作者： Ruiming Luo Yue Xu Bin Li College of electronic science & engineering Nanjing University of Posts and Telecommunications Nanjing China National and Local Joint Engineering Laboratory of RF Integration and Micro-assembly Technology Nanjing China

ISBN: (纸本)9781509066957

This paper presents a parallel readout circuit for high density single photon avalanche diode (SPAD) pixel array. Each pixel consists of analog quenching circuit and counting circuit. Column parallel readout method is adopted and every eight columns of array pixel shares one multiplexer where the analog output signals of these pixels are selected to pass it subsequently. After that, the signals will be sent to correlated double sampling (CDS) circuit for elimination of fixed pattern noise (FPN). Then the processed signals will be inputted to off-chip high speed ADC for analog to digital conversion. The shared CDS can reduce chip area without lowering performance.

关键词： Integrated optics Optical imaging Optical sensors Photonics Capacitors CMOS integrated circuits Optical switches

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