Presents a new robust TCP (Transmission Control Protocol) congestion recovery scheme to (1) handle bursty packet losses while preserving the self-clocking capability; (2) detect a TCP connection's new equilibrium ...
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ISBN:
(纸本)0769510779
Presents a new robust TCP (Transmission Control Protocol) congestion recovery scheme to (1) handle bursty packet losses while preserving the self-clocking capability; (2) detect a TCP connection's new equilibrium during congestion recovery, thus improving both link utilization and effective throughput; and (3) make the TCP behavior during congestion recovery very close to that during congestion avoidance, thus "extending" the performance model for congestion avoidance to that for TCP loss recovery. Furthermore, the new recovery scheme requires only a slight modification to the sender side of TCP implementation, thus making it widely deployable. The performance of the proposed scheme is evaluated for scenarios with many TCP flows under the drop-tail and RED (random early detection) gateways in the presence of bursty packet losses. The evaluation results show that the new scheme achieves at least as great a performance improvement as TCP SACK (Selective ACKnowledgments) and consistently outperforms TCP New-Reno. Moreover, its steady-state TCP behavior is close to the ideal TCP congestion behavior. Since the proposed scheme does not require selective acknowledgments nor receiver modifications, its implementation is much simpler than TCP SACK.
The manufacturing industry cannot stay competitive and survive in today's market without agile adaptation to rapidly changing customers' demands. This in turn requires manufacturing systems to be reconfigurabl...
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ISBN:
(纸本)0780365763
The manufacturing industry cannot stay competitive and survive in today's market without agile adaptation to rapidly changing customers' demands. This in turn requires manufacturing systems to be reconfigurable for timely introduction of new products in the market. Unfortunately, at present, the system designers cannot systematically and completely manage their design data, because manufacturing systems have gradually become too large and too complicated to manage. In order to reconfigure and reuse H/W and S/W components in manufacturing systems, and improve the engineering environment of system control design, we propose a model-based control design using state transition diagrams and a general graph description, while taking reconfiguration and reuse of design data into account. We demonstrate the utility of the proposed approach using a real application.
This paper describes an implementation and the performance evaluation of the DASA/ND best-effort scheduling algorithm [4] in the μClinux/μCsimm micro-controller system. Experimental results under synthetic workload ...
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ISBN:
(纸本)0780372301
This paper describes an implementation and the performance evaluation of the DASA/ND best-effort scheduling algorithm [4] in the μClinux/μCsimm micro-controller system. Experimental results under synthetic workload show that in some cases, the DASA/ND scheduler outperforms both the EDF (Earliest Deadline First) and the RMS (Rate Monotonic Scheduling) schedulers [7]. Meanwhile, the system performance gracefully degrades as the aggregate CPU load increases. However, the scheduling overhead, in general, is not negligible, which may lead to poorer performance than non best-effort scheduling algorithms. It is found that the scheduling overhead strongly depends on the task set properties. Using the Regression Analysis technique, we developed a statistical model accounting for the scheduling overhead. We show that this model, combined with a simulation tool can well predict the system performance.
Scaling down power supply voltage yields a quadratic reduction in dynamic power dissipation and also requires a reduction in clock frequency. In order to meet task deadlines in hard real-time systems, the delay penalt...
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ISBN:
(纸本)1581133995
Scaling down power supply voltage yields a quadratic reduction in dynamic power dissipation and also requires a reduction in clock frequency. In order to meet task deadlines in hard real-time systems, the delay penalty in voltage scaling needs to be carefully considered to achieve low power consumption. In this paper, we focus on dynamic reclaiming of early released resources in Earliest Deadline First (EDF) scheduling using voltage scaling. In addition to a static voltage assignment, we propose a new dynamic-mode assignment, which has a flexible voltage mode setting at run-time enabling much larger energy savings. Using simulation results and exploiting the interplay between power supply voltage, frequency, and circuit delay in CMOS technology, we find the optimal twolevel voltage settings that minimize energy consumption. Copyright 2001 ACM.
One of the primary tasks in the area of uniform dependence loops, is predicting the execution propagation, as well as finding an optimal time schedule. In this work, the problem of scheduling using wavefront predictio...
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ISBN:
(纸本)0769511538
One of the primary tasks in the area of uniform dependence loops, is predicting the execution propagation, as well as finding an optimal time schedule. In this work, the problem of scheduling using wavefront prediction is presented. The geometric concepts of time instance subspaces and execution pattern are introduced. A quite simple and low complexity scheduling algorithm is presented. The index space is split into geometric subspaces and any point can be located in them. Each point is then scheduled according to the subspace where it belongs.
Ada 95 is an expressive concurrent programming language, which allows building large multi-tasking applications. Much of the complexity of these applications stems from the interactions between the tasks. Design abstr...
ISBN:
(纸本)9781450373272
Ada 95 is an expressive concurrent programming language, which allows building large multi-tasking applications. Much of the complexity of these applications stems from the interactions between the tasks. Design abstractions (such as atomic actions, conversations etc.) have been proposed to deal with such complexity. This paper argues that Petri nets offer a promising, tool-supported, technique for checking the logical correctness of abstractions. The paper illustrates the effectiveness of this approach by showing the correctness of an Ada implementation of the atomic action protocol using a variety of Petri net tools.
We present the design, implementation, and evaluation of single assignment data structures and of a software controlled cache in an existing multi-threaded architecture platform – the Efficient Architecture for Runni...
We present the design, implementation, and evaluation of single assignment data structures and of a software controlled cache in an existing multi-threaded architecture platform – the Efficient Architecture for Running Threads (EARTH). The I-Structure Software-Controlled Cache (ISSC) exploits temporal and spatial locality of EARTH split-phased memory transactions for single-assignment memory references. Our experimental evaluation indicates that the caching mechanism for single-assignment storage makes the EARTH memory system more robust to variations in the latency of memory operations. As a consequence the system can be ported to a wider range of machine platforms and deliver speedup for both regular and irregular application.
In this paper, a new method, named adjustable timer resolution (ATR) is proposed to control tasks in a timely manner, with enhanced performance on real-time operating systems. It prevents useless execution of the time...
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ISBN:
(纸本)0780370902
In this paper, a new method, named adjustable timer resolution (ATR) is proposed to control tasks in a timely manner, with enhanced performance on real-time operating systems. It prevents useless execution of the timer interrupt service routine (ISR). Features of the proposed method are compared with the conventional method, and the schedulability is analyzed to estimate the performance. As an implementation model, uC/OS-II is modified and ported to a power PC processor system. The metrics and results of the model are presented and discussed.
In this paper we report new results concerning developing parallel multiprocessor scheduling algorithms working in cellular automata (CAs) - based scheduler. We consider the simplest case when a multiprocessor system ...
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