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检索条件"机构=Reliability Physics and Application Technology of Electronic Component Key Laboratory"

共 495 条记录，以下是121-130 订阅

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Analysis of Internal Atmosphere of InGaAs Detectors with Different Degassing Conditions 3

Analysis of Internal Atmosphere of InGaAs Detectors with Dif...

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3rd International Conference on System reliability and Safety Engineering, SRSE 2021

作者： Lai, Canxiong Sun, Wen Yang, Shaohua Zhou, Bin Sci. and Technology on Reliability Physics and Application of Electronic Component Laboratory CEPREI Guangzhou China Key Laboratory of Infrared Imaging Materials and Detectors Shanghai Institute of Technical Physics Shanghai China

ISBN: (纸本)9781665401609

the internal atmosphere composition of the cavity package of InGaAs detector has an important impact on its reliability. In this paper, the internal atmosphere contents of the detectors prepared at different degassing conditions are analyzed. The results show that vacuum baking at a relatively low temperature such as 45°C can reach an acceptable internal atmosphere level. Higher baking temperature °fif ((db further reduce the moisture content to about 1000ppmv, which would make the detector more reliable for long-term operation and thus be an ideal choice for degassing. Besides vacuum baking, the degassing effectiveness of nitrogen gas washing is also confirmed to be acceptable, although the moisture and oxygen contents are higher than those of vacuum baking. © 2021 IEEE.

关键词： Semiconducting indium gallium arsenide

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Fracture Analysis of QBe2.0 Beryllium Bronze Conductive Spring

Fracture Analysis of QBe2.0 Beryllium Bronze Conductive Spri...

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International Conference on reliability, Maintainability and Safety,ICRMS

作者： Ziyang Li Kun Zhang Gang Zhu Hao Zhao Yingjie Zhang Lixian Sun Reliability Research and Analysis Center China Electronic Product Reliability and Environmental Testing Research Institute Guangzhou China Science and Technology on Reliability Physics and Application of Electronic Component Laboratory China Electronic Product Reliability and Environmental Testing Research Institute Guangzhou China Guangxi Key Laboratory of Information Materials Guilin University of Electronic Technology Guilin China

ISBN: (数字)9798350329988

ISBN: (纸本)9798350329995

Beryllium bronze conductive elastic materials are widely used in aerospace electronics, and the reliability of this material is critical for aircraft equipment. A batch of conductive springs suffered from fracture failure during assembly. The fractography, chemical composition, microstructure, and microhardness of the spring were investigated, and the causes of fracture and improvement measures were discussed. The fractographs of the spring show an intergranular fracture accompanied with a dimple fracture. The chemical composition of the raw material conforms to the technical requirements. The sizes of the precipitates in the failed spring were primarily 1–2 μm, while the size of the precipitates in the un-failed spring were less than 0.5 μm. The grain boundary of the failed spring was wider, with larger particle phases distributed at the grain boundaries. Additionally, the average hardness of the fracture spring was 394.4 HV, which exceeds the technical requirements. The hardness of the un-failed spring met the requirements. According to the results of microstructure and hardness, improper aging treatment led to material embrittlement, and the spring suffered an intergranular fracture during assembly.

关键词： Grain boundaries Technical requirements Temperature Beryllium Aging Aerospace electronics Microstructure Springs Chemicals Assembly

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Failure Mechanisms Investigation of Through Glass via (TGV) Under Thermal Annealing and Shock

Failure Mechanisms Investigation of Through Glass via (TGV) ...

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International Conference on (ICEPT) electronic Packaging technology

作者： Haozhong Wang Chunchao Lai Bingxu Ma Xiaodong Jian Si Chen Hongtao Chen Laiwang Fang Xiaofeng Yang Sauvage Laboratory for Smart Materials Harbin Institute of Technology (Shenzhen) Shenzhen China The Science and Technology on Reliability Physics and Application of Electronic Component Laboratory China Electronic Product Reliability and Environmental Testing Research Institute Guangzhou China Laboratory of Science and Technology on Integrated Logistics Support National University of Defense Technology Changsha China

ISBN: (数字)9798350353808

ISBN: (纸本)9798350353815

2.5D advanced packaging technology is a promising solution for “more than Moore”. TGV interposer has attracted growing attention for the high-frequency applications in 2.5D advanced packaging due to its low dielectric constant and loss tangent, etc. Some typical failure modes of TGV structure were discussed in the previous literatures. However, there is a lack of systematic research on the failure mechanisms of TGV under annealing and thermal shock condition. This paper focused on the failure mechanisms of TGV under different thermal conditions using both experimental and simulation methods. Annealing experiment was carried on the TGV sample at 400 °C for different periods. Crack appeared in the glass at the top corner of TGV after annealed at 400 °C for 5 min. With the increasing annealing period from 5 min to 30 min at 400 °C, the protrusion height of TGV increased from $0.61\ \mu\mathrm{m}$ to $1.21\ \mu \mathrm{m}$ , and the simulated protrusion height increased from $0.50\ \mu \mathrm{m}$ to $0.89\ \mu \mathrm{m}$ . The FEA simulation result showed that stress concentration was located in the top corner of TGV, the stress was 1456.63 MPa at 400 °C for 5 min. TGV samples were subjected to 0, 300, 500 and 1000 cycles under the condition of $-55\ ^{\circ}\mathrm{C}$ to 150 °C. Glass will crack around TGV-RDL after 300 thermal shock cycles. The stress was found concentrated around TGV-RDL according to FEA, which was 370.34 MPa. Crack appeared at the bottom corner of the TGV after 1000 cycles. The equivalent plastic strain at the bottom corner of TGV increased from 1.09 to 3.64 with the cycles increased from 300 to 1000. This article analyzes failure mechanisms of TGV and provides design guidelines for the pretreatment process of TGV. The simulation result offers information for the reliability evaluation of TGV.

关键词： Annealing Simulation Thermal shock Failure analysis Glass Simulated annealing reliability

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Investigation of Off-state Stress Time-Dependent Dynamic On-resistance of Commercial High Voltage GaN HEMTs

Investigation of Off-state Stress Time-Dependent Dynamic On-...

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IEEE Conference on Industrial electronics and applications (ICIEA)

作者： Yao Li Hui Tang Ke Zhang Yiqiang Ni Liang He Zhiyuan He Yijun Shi Jun Liu School of Electrical Engineering University of South China Hengyang China Science and Technology on Reliability Physics and Application of Electronic Component Laboratory Electronic Product Reliability and Environmental Testing Research Institute Guangzhou China

The effects of off-state stress time on dynamic on-resistance are investigated in a commercial 650 V GaN power device. A modified double pulse test (DPT) circuit is used to evaluate the dynamic on-resistance degradation with various stress value and time under hard-switching conditions. Our experimental results reveal partial recovery behaviors of dynamic on-resistance with stress voltage increasing. The dynamic on-resistance degradation gets more severe as stress voltage initially increases. Then the dynamic on-resistance reaches a peak value and begins to decrease as the stress voltage further increases. Furthermore, we find that the turning point of maximum dynamic on-resistance occurs at a lower stress voltage with longer stress time. It indicates that stress time is a very important factor affecting the degree of dynamic on-resistance degradation.

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Sub-Safety Recognition and reliability Evaluation for Motor Drive System in High Speed Trains 31st

Sub-Safety Recognition and Reliability Evaluation for Motor ...

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31st European Safety and reliability Conference, ESREL 2021

作者： Meng, Linghui Zhou, Zhenwei He, Shilie China Electronic Product Reliability and Environmental Testing Research Institute Guangzhou Guangdong511370 China Science and Technology on Reliability Physics and Application of Electronic Component Laboratory Guangzhou Guangdong511370 China

ISBN: (纸本)9789811820168

The concept of sub-safety for high-speed trains is put forward for the first time. As trains run for a long time, train systems constantly age and degrade and enter a state of sub-safety. It is important to recognize the sub-safety state in a timely manner in order to implement safety control measures to prevent the system from entering a faulty state. Firstly, this paper analyzed the main faults of the devices in a high-speed train’s motor-drive system and their failure mechanisms. Secondly, a sub-health state was proposed for the main devices of the system. Then a degradation and state transition model for the devices was established based on the Markov theory. Finally, using the reliability model for the system, the reliability was evaluated and the sub-safety state was determined. © ESREL 2021. Published by Research Publishing, Singapore.

关键词： Railroads

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New Diagnostics for Inferring Multiple Fault Scenarios and Accurate Fault Localization

New Diagnostics for Inferring Multiple Fault Scenarios and A...

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IEEE Conference on Global Communications (GLOBECOM)

作者： Huisi Zhou Wei Hu Dan Zhu Liwei Wang School of Cybersecurity Northwestern Polytechnical University Xi’an China Research & Development Institute of Northwestern Polytechnical University in Shenzhen China Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory Guangzhou China

ISBN: (数字)9798350351255

ISBN: (纸本)9798350351262

For many high-tech fields such as mobile communication systems, network management, and satellite and space applications, it is vital to discover faulty components of manufactured devices in a timely manner to ensure safety. Model-based diagnosis is a crucial element in fault diagnosis. It aims to find the possible causes of the observed unexpected behaviors of a system when assuming all of its components work correctly. In this paper, we propose two diagnostics, namely, the Improved Model-Based Diagnosis (IMBD) and the Localization-Based Diagnosis (LBD), to address the research challenge that massive candidate diagnoses are needed in the traditional model-based diagnosis approach for repairing the faulty system. Our diagnostics realizes a simulator to simulate the single-fault scenarios, through which we can reason about the scenarios where multiple faults occur and find which components are more likely to fail in the multiple-fault system. Experiments using the ISCAS-85 benchmarks indicate that LBD is superior to IMBD and SAT-based approaches for accurate fault localization.

关键词： Fault diagnosis Location awareness Accuracy Satellites Benchmark testing Cognition Safety Global communication

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Analytical and Measurement-Based Method for Voltage Fault Injection of CAN Chip Security

Analytical and Measurement-Based Method for Voltage Fault In...

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International Conference on electronics technology (ICET)

作者： Naiye Wang Chenbing Qu Bo Hou Liwei Wang Chen Sun Science and Technology on Reliability Physics and Application of Electronic Component Laboratory China Electronic Product Reliability and Environmental Testing Research Institute Guangzhou China School of Computational Science and Electronics Hunan Institute of Engineering Xiangtan China

The need for CAN chip dependability is growing urgent due to the widespread use of CAN bus in numerous sectors and professions. This word presents an analytical method of voltage fault injection measurement-based CAN chip security. The automatic hardware FI test method based on the prototype system is proposed to detect the fault error in abnormal environment. The signal trigger and control module is designed to test automation process. In addition, the extended parameter model is established for shortening test time and automatic statistical analysis of a number of test data. The results show that the test circuit system CAN realize the voltage random fault test and automatic analysis in the range of $1.5 \sim 5.5\mathrm{V}$, which provides a more accurate and comprehensive basis for improving the security of CAN chip.

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The Effect of Pore Defects on the Interfacial Thermal Resistance of GaN-Diamond Heterostructure

The Effect of Pore Defects on the Interfacial Thermal Resist...

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International Conference on (ICEPT) electronic Packaging technology

作者： Chao Yang Pengfei Zhao Jian Wang Dezhi Ma Zhiyuan He Zhiwei Fu Jia-Yue Yang School of Energy and Power Engineering Shandong University Science and Technology on Reliability Physics and Application of Electronic Component Laboratory Jinan China School of Microelectronics Faculty of Electronic and Information Engineering Xi'an Jiaotong University Xi'an China Science and Technology on Reliability Physics and Application of Electronic Component Laboratory Guangzhou China School of Energy and Power Engineering Shandong University Science and Technology on Reliability Physics and Application of Electronic Component Laboratory CEPREI Guangzhou China School of Energy and Power Engineering Shandong University Optics & Thermal Radiation Research Center Institute of Frontier and Interdisciplinary Science Shandong University Jinan China

Heat transfer across the GaN-diamond interface is very important in the thermal management of GaN electronics on diamond substrates. The influence of various defects caused by manufacturing processes on the thermal resistance of the GaN-diamond interface is still unclear. In this work, we use non-equilibrium molecular dynamics simulations to investigate the effect of possible pore defects on GaN-diamond interfacial heat transport. Square pores of different sizes are introduced at the GaN-diamond interface. By changing the pore cross-sectional area, we found that the introduction of pore defects will significantly increase the interfacial thermal resistance compared with the case without defects. Pores can also cause more significant stress and strain on the edge atoms at the interface and may hinder the normal transmission of phonons. At the same time, we calculated the phonon density of states (PDOS) corresponding to different pore sizes to analyze the reason for the change in interfacial thermal resistance. PDOS calculation results show that the higher porosity leads to the enhancement of phonon scattering at the interface. The low-frequency phonons that are more easily transmitted through the interface are scattered into high-frequency phonons, increasing the thermal resistance of the interface.

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An Efficient Aged Timing Analysis Method for Digital Integrated Circuit Under NBTI Effect

An Efficient Aged Timing Analysis Method for Digital Integra...

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electronics Design Automation (ISEDA), International Symposium of

作者： Yang Zhang Zhengguang Tang Yawei Jin Hong Zhang Yongsheng Sun Chen Chen Xiaoling Lin Cong Li Hailong You School of Microelectronic Xidian University Xi'an China HiSilicon Technologies Co. Ltd Shenzhen China The Science and Technology on Reliability Physics and Application of Electronic Component Laboratory China Electronic Product Reliability and Environmental Testing Research Institute Guangzhou Guangdong Province China

ISBN: (数字)9798350352030

ISBN: (纸本)9798350352047

With the continuous development of semiconductor technology, the performance and integration of integrated circuits (ICs) have been continuously improved[1]. However, below the 65nm technology node, one of the aging effects of chips, the Negative Bias Temperature Instability (NBTI) effect, has become an important factor affecting the performance and reliability of digital integrated circuits[2]. This paper proposes an efficient aged timing analysis method for digital integrated circuit under NBTI effect. The method characterizes standard-cell aged library under a small number of typical input signal probability. Based on the established standard-cell aged library, timing model for perceiving NBTI aging is constructed through machine learning regression. The timing model established in this paper includes the mapping relationship between aged-related parameters and corresponding aged timing, with the input signal probability, input signal transition time, and output load capacitance of the cell as inputs, and the delay or output transition time of the cell as output. Based on the established timing model for perceiving NBTI effect, timing analysis of each cell in digital integrated circuits can be performed after degradation. Experimental results indicate that compared to existing methods, the approach presented in this paper reduces aged library usage by approximately 70% while only introducing small timing analysis error.

关键词： Negative bias temperature instability Thermal variables control Digital integrated circuits Machine learning Aging Predictive models Libraries

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An Investigation of Time Dependent Dielectric Breakdown (TDDB) on Carbon Nanotube Field-Effect Transistors (CNTFETs)

An Investigation of Time Dependent Dielectric Breakdown (TDD...

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International Conference on (ICEPT) electronic Packaging technology

作者： Tang Chao Rui Gao Chao Li Long Wei Yichi Zhang Zhizhe Wang Guangzhou Wide Bandgap Semiconductor Innovation Center Guangzhou Institute of Technology Xidian University Guangzhou China National Key Laboratory of Science and Technology on Reliability Physics and Application of Electronic Component The Fifth Electronics Research Institute of the Ministry of Industry and Information Technology Guangzhou China

ISBN: (数字)9798350353808

ISBN: (纸本)9798350353815

As technology nodes continue to scale down, silicon-based integrated circuits have approached physical limits. In order to sustain Moore's Law, new materials have become a major focus of research in the field of integrated circuits, with carbon-based integrated circuits considered one of the most promising new materials due to their superior electrical characteristics. Currently, reliability is a primary concern constraining the development of carbon-based integrated circuits. Time-dependent dielectric breakdown (TDDB) is a common reliability issue in field-effect transistors, and it is also prevalent in CNTFETs. This paper employs the measure-atress-measure (MSM) method to investigate the TDDB phenomenon in CNTFETs, applying 3 different constant electrical stress on multiple devices and extract the time to breakdown (tbd). Experiment results show tbd follows weibull distribution, same as silicon MOSFETs, but with a much smaller voltage accelerate factor of 16.91 compare to the typical values of silicon. It is speculated this might be due to the inferior oxide/CNT interface quality compared to silicon allows generated trap to form a leakage path under relatively low electric filed stress.

关键词： Integrated circuits MOSFET Silicon Time measurement CNTFETs Dielectric breakdown Transistors

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