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SSRN 2023年

作者： Guo, Wenbin Feng, Zhe Zou, Jianxun Tuo, Shi Wang, Zeqing Tan, Su Xu, Zuyu Zhu, Yunlai Dai, Yuehua Wu, Zuheng School of Integrated Circuits Anhui University Anhui Hefei230601 China Research Center for Intelligent Computing Hardware Zhejiang Laboratory Hangzhou311122 China

Convolutional neural networks (CNN) have been widely used in computer vision (CV), natural language processing (NLP), etc. However, CNN usually uses pooling to reduce feature size after feature extraction, which result in significant information loss and poor network robustness. Herein, an adaptive pooling network (APN) based on the memristor array is implemented, which learns the interrelationships between features to enhance the network robustness. Different coupling coefficients from the pooling layer are assigned to each feature column using the multi-level property of the memristor. A cosine similarity to simulate the biological self-feedback mechanism is used to update the coupling coefficients of the array, realizing the adaptive pooling function. Moreover, the coupling coefficient update process requires no backpropagation which is more bio-similar. The proposed APN is then firstly validated on generic dataset to evaluate its performance. The simulate results of the image classification task on MNIST dataset show an accuracy up to 99.3%. Then, a CAPTCHA dataset containing random rotations and noise is used to further explore the performance of the network. The inference results based the memristor arrays show that the APN achieved 92.6% accuracy than the traditional CNN (89.3%) for the 4-digit CAPTCHA digit recognition task. The proposed scheme provides a fresh thought to improve the performance of CNN. © 2023, The Authors. All rights reserved.

关键词： Memristors

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Darwin3: a large-scale neuromorphic chip with a novel ISA and on-chip learning

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National Science Review 2024年第5期11卷 29-45页

作者： De Ma Xiaofei Jin Shichun Sun Yitao Li Xundong Wu Youneng Hu Fangchao Yang Huajin Tang Xiaolei Zhu Peng Lin Gang Pan College of Computer Science and Technology Zhejiang University Research Center for Intelligent Computing Hardware Zhejiang Lab The State Key Lab of Brain-Machine Intelligence Zhejiang University MOE Frontier Science Center for Brain Science and Brain-machine Integration Zhejiang University College of Micro-Nano College of Micro-Nano Electronics Zhejiang University

Spiking neural networks(SNNs) are gaining increasing attention for their biological plausibility and potential for improved computational efficiency. To match the high spatial-temporal dynamics in SNNs,neuromorphic chips are highly desired to execute SNNs in hardware-based neuron and synapse circuits directly. This paper presents a large-scale neuromorphic chip named Darwin3 with a novel instruction set architecture, which comprises 10 primary instructions and a few extended instructions. It supports flexible neuron model programming and local learning rule designs. The Darwin3 chip architecture is designed in a mesh of computing nodes with an innovative routing algorithm. We used a compression mechanism to represent synaptic connections, significantly reducing memory usage. The Darwin3 chip supports up to2.35 million neurons, making it the largest of its kind on the neuron scale. The experimental results showed that the code density was improved by up to 28.3× in Darwin3, and that the neuron core fan-in and fan-out were improved by up to 4096× and 3072× by connection compression compared to the physical memory depth. Our Darwin3 chip also provided memory saving between 6.8× and 200.8× when mapping convolutional spiking neural networks onto the chip, demonstrating state-of-the-art performance in accuracy and latency compared to other neuromorphic chips.

关键词： neuromorphic computing spiking neural network instruction set architecture connectivity compression

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Formally Verifying Navigation Safety for Ground Robots

Formally Verifying Navigation Safety for Ground Robots

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IEEE International Conference on Mechatronics and Automation

作者： Manni Zhang Xinyu Zhang Shanghai Key Laboratory of Trustworthy Computing MoE Engineering Research Center for Software/Hardware Co-design Intelligent Robot Motion & Vision Laboratory East China Normal University Shanghai China

ISBN: (纸本)9781509023974

Robots' continuous physical behaviors are controlled by discrete instructions generated using complicated control algorithms. In such a robotic hybrid system, guaranteeing robot's navigation safety can be more challenging than those discrete controls alone or only the continuous robot motions. For a robotic system operating in the real world, navigation safety is critical in order to avoid potential harm for robots or their surrounding environment. We present safety guarantee and obstacle avoidance control algorithms for mobile ground robots modeled by hybrid programs. Using the verification tool KeYmaera, we formally verify that our algorithms satisfy passive or passive friendly safety properties in an environment consisting of stationary/dynamic obstacles. These algorithms allow us to check the navigation safety at the design stage of a robotic system.

关键词： motion safety collision avoidance formal methods mobile ground robot

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Efficient Wall-Corner Collision Avoidance using D-Images

Efficient Wall-Corner Collision Avoidance using D-Images

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IEEE International Conference on Mechatronics and Automation

作者： Guohe Fu Xinyu Zhang Shanghai Key Laboratory of Trustworthy Computing MoE Engineering Research Center for Software/Hardware Co-design Intelligent Robot Motion & Vision Laboratory East China Normal University Shanghai China

ISBN: (纸本)9781509023974

When an autonomous mobile robot exploring in an unstructured environment, it may often enter a wall-corner, but be stuck there. We present a wall-corner collision detection and avoidance algorithm using depth images. We first determine if a mobile robot is trapped in a wall-corner using historic alternate turnings. Then we propose a geometric approach to let the robot escape a corner. We demonstrate the efficiency of our algorithm using simulations and experimental tests. Using our algorithm, a robot can quickly detect and escape wall-corners. Moreover, we extend our algorithm to handle a very challenging scenario, Z-shaped Zigzag paths.

关键词： wall-corner collision detection avoidance algorithm mobile robot

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Towards High-accuracy and Low-latency Spiking Neural Networks with Two-Stage Optimization

arXiv

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arXiv 2022年

作者： Wang, Ziming Zhang, Yuhao Lian, Shuang Cui, Xiaoxin Yan, Rui Tang, Huajin College of Computer Science and Technology Zhejiang University Hangzhou310027 China Research Center for Intelligent Computing Hardware Zhejiang Lab Hangzhou311100 China School of Integrated Circuits Peking University Beijing100871 China College of Computer Science Zhejiang University of Technology Hangzhou310014 China State Key Laboratory of Brain-Machine Intelligence Zhejiang University Hangzhou310027 China

Spiking neural networks (SNNs) operating with asynchronous discrete events show higher energy efficiency with sparse computation. A popular approach for implementing deep SNNs is ANN-SNN conversion combining both efficient training of ANNs and efficient inference of SNNs. However, the accuracy loss is usually non-negligible, especially under few time steps, which restricts the applications of SNN on latencysensitive edge devices greatly. In this paper, we first identify that such performance degradation stems from the misrepresentation of the negative or overflow residual membrane potential in SNNs. Inspired by this, we decompose the conversion error into three parts: quantization error, clipping error, and residual membrane potential representation error. With such insights, we propose a two-stage conversion algorithm to minimize those errors respectively. Besides, We show each stage achieves significant performance gains in a complementary manner. By evaluating on challenging datasets including CIFAR-10, CIFAR- 100 and ImageNet, the proposed method demonstrates the stateof- the-art performance in terms of accuracy, latency and energy preservation. Furthermore, our method is evaluated using a more challenging object detection task, revealing notable gains in regression performance under ultra-low latency when compared to existing spike-based detection algorithms. Codes are available at https://***/Windere/snn-cvt-dual-phase. Copyright © 2022, The Authors. All rights reserved.

关键词： Object detection

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Darwin3: A large-scale neuromorphic chip with a Novel ISA and On-Chip Learning

arXiv

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arXiv 2023年

作者： Ma, De Jin, Xiaofei Sun, Shichun Li, Yitao Wu, Xundong Hu, Youneng Yang, Fangchao Tang, Huajin Zhu, Xiaolei Lin, Peng Pan, Gang College of Computer Science and Technology Zhejiang University Hangzhou310058 China Research Center for Intelligent Computing Hardware Zhejiang Lab Hangzhou311121 China The State Key Lab of Brain-Machine Intelligence Zhejiang University Hangzhou310027 China MOE Frontier Science Center for Brain Science and Brain-Machine Integration Zhejiang University Hangzhou310027 China College of Micro-Nano College of Micro-Nano Electronics Zhejiang University Hangzhou311200 China

Spiking Neural Networks (SNNs) are gaining increasing attention for their biological plausibility and potential for improved computational efficiency. To match the high spatial-temporal dynamics in SNNs, neuromorphic chips are highly desired to execute SNNs in hardware-based neuron and synapse circuits directly. This paper presents a large-scale neuromorphic chip named Darwin3 with a novel instruction set architecture(ISA), which comprises 10 primary instructions and a few extended instructions. It supports flexible neuron model programming and local learning rule designs. The Darwin3 chip architecture is designed in a mesh of computing nodes with an innovative routing algorithm. We used a compression mechanism to represent synaptic connections, significantly reducing memory usage. The Darwin3 chip supports up to 2.35 million neurons, making it the largest of its kind in neuron scale. The experimental results showed that code density was improved up to 28.3x in Darwin3, and neuron core fan-in and fan-out were improved up to 4096x and 3072x by connection compression compared to the physical memory depth. Our Darwin3 chip also provided memory saving between 6.8X and 200.8X when mapping convolutional spiking neural networks (CSNN) onto the chip, demonstrating state-of-the-art performance in accuracy and latency compared to other neuromorphic chips. © 2023, CC BY.

关键词： Neurons

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