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SUCCESS-HPON: Migrating from TDM-PON to WDM-PON

SUCCESS-HPON: Migrating from TDM-PON to WDM-PON

引用

32nd European Conference on Optical Communication (ECOC 2006),vol.2

作者： David Gutierrez Kyeong Soo Kim Fu-Tai An Leonid G. Kazovsky Photonics & Networking Research Laboratory University of Stanford Stanford CA USA Advanced System Technology STMicroelectronics Inc. San Jose CA USA

We present a summary of SUCCESS-HPON, a hybrid WDM/TDM PON architecture that enables the smooth and cost-effective migration from TDM-PONs to WDM-PONs using centralized light sources and novel scheduling algorithms to... 详细信息

关键词： Wavelength division multiplexing Time division multiplexing Passive optical networks Protection Tunable circuits and devices Photonics Laboratories Light sources Bandwidth Optical films

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Dynamic range optimization by local contrast correction and histogram image analysis

Dynamic range optimization by local contrast correction and ...

引用

IEEE International Conference on Consumer Electronics (ICCE)

作者： A. Capra A. Castrorina S. Corchs F. Gasparini R. Schettini Advanced System Technology-Catania Laboratory ST Microelectronics s.r.l. Catania Italy Contrada Blocco Torrazze Advanced System Technology - Catania Lab CATANIA Adv. Syst. Technol. STMicroelectronics srl Catania Italy Dipartimento di Informatica Sistemistica e Comunicazione Università degli studi di Milano-Bicocca Milano Italy

The original dynamic range of a scene is generally constrained into the smaller dynamic range of the acquisition system. This results in the difficulty to design a global tone correction that permits to discriminate both shadow and highlight details. In this work we present a local contrast correction algorithm that allows for simultaneous shadow and highlight adjustments, starting from a simple pixel-wise "gamma" correction, piloted by image statistics analysis

关键词： Dynamic range Histograms Image analysis Pixel Image edge detection Image processing Filters Image color analysis Layout Statistical analysis

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Block processing engine for high-throughput wireless communications

Block processing engine for high-throughput wireless communi...

引用

2nd International Symposium on Wireless Communications systems (ISWCS 2005)

作者： Lo Iacono, D Zory, J Messina, E Piazzese, N Advanced System Technology Group STMicroelectronics

ISBN: (纸本)078039206X

This paper presents the Block Processing Engine (BPE), a programmable architecture specifically suited for high-throughput wireless communications. Thanks to a high degree of parallelism and a consistent use of pipelined processing, the BPE can satisfy the stringent real-time constraints imposed by emerging technologies. Its efficiency has been proven through the implementation of a dual standard frequency domain equalizer supporting 3GPP HSDPA and IEEE 802.11a.

关键词： ASIP VLIW WLAN HSDPA FDE

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Motion-compensated frame-rate up-conversion for H.264/AVC decoders

Motion-compensated frame-rate up-conversion for H.264/AVC de...

引用

23rd Annual International Conference on Consumer Electronics (ICCE)

作者： Alfonso, D Bagni, D Moglia, D IEEE Advanced System Technology Labs. STMicroelectronics

ISBN: (纸本)0780388380

We propose a technique to perform frame-rate up-conversion in baseline H.264/AVC compliant decoders. It exploits a low-complexity motion estimation algorithm including a novel method to enhance the consistency of motion fields. The final, adaptive interpolation through median filtering provides excellent objective and subjective visual results.

关键词： Motion compensation

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A study of iterative joint synchronization for time offset and frequency offset in IEEE802.16d WirelessMAN OFDM system

A study of iterative joint synchronization for time offset a...

引用

2005 Fifth International Conference on Information, Communications and Signal Processing

作者： Ge, Yiqun Shi, Wuxian Sun, Guobin Advanced System Technology STMicroelectronics Beijing China

ISBN: (纸本)0780392833

This paper is a study of an iterative joint algorithm for frequency offset and time offset synchronizations used in 256 Orthogonal Frequency Division Multiplexing of IEEE802.16d Wireless-MAN system. As deployed in an urban area and targeted at providing a high data rate transmission, IEEE 802.16d system requires a robust synchronization mechanism to guarantee the transmission reliability. A time-domain preamble structure is provided in IEEE802.16d standard to detect and correct the synchronization errors along time and frequency dimensions. Our research focus on the study of an iterative joint algorithm for time offset and frequency offset synchronization based on the preamble. And we simulate this algorithm based on a framed Wireless-MAN 256 OFDM downlink physical layer simulation link to investigate its performance. The simulation results show that this algorithm could reduce the probability of synchronization failure below 10-4 when Es/N0 is larger than 14dB, and that it is not sensitive to channel spread delay and moving speed in a fixed broadband wireless environment. Finally, two transmission rates are simulated with this algorithm to show its application effectiveness. © 2005 IEEE.

关键词： Iterative methods

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How compilers and tools differ for embedded systems

How compilers and tools differ for embedded systems

引用

CASES 2005: International Conference on Compilers, Architecture, and Synthesis for Embedded systems

作者： Wolfe, Michael STMicroelectronics Advanced Compilers and Tools Team Advanced System Technology Division

ISBN: (纸本)159593149X

Compiler technology includes language design, parsing, analysis, optimization, resource allocation, scheduling, and code generation. Associated tools include assemblers, linkers, debuggers, profilers, 'make', IDEs, optimized libraries, and more. While much of the technology developed over the past 50 years applies directly to embedded programming, there are key differences. Some are due to the limits of the embedded system, in particular memory size and power. Some are due to specialized architectures, such as DSPs. Others arise because of the different programming community and programming style, which is partially due to the economics of the marketplace. Here we explore some of these differences at three levels: the market, the programming environment, and the compiler. The compilers and tools marketplace for high performance workstation and cluster (HPC) systems is split between programmers and groups developing applications for internal use, and ISVs developing applications for resale. The marketplace for embedded systems is almost entirely for OEM applications, and many (or most) of the actual programmers work for the compiler vendor. This affects the forces that drive compiler and tool development and improvement. The goal for an HPC compiler is faster performance;in an embedded application, speed is not the only criterion. Getting the right mix of performance and other characteristics in an embedded system is important enough that programmers are more willing to tune the application by adjusting compiler options, performing limited rewrites, and even coding essential parts in assembler. In some instances, the target system itself is variable, and can be tuned. Focusing on just the compiler, we find many of the compiler techniques for the most performance critical embedded systems bear remarkable similarity to those used 20 or 30 years ago for the highest performance supercomputers. We also look in detail at the effectiveness of whole program analysis in both

关键词： Embedded systems

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Fast method for noise level estimation and denoising

Fast method for noise level estimation and denoising

引用

23rd Annual International Conference on Consumer Electronics (ICCE)

作者： Bosco, A Bruna, A Messina, G Spampinato, G STMicroelectronics Advanced System Technology Imaging Group Catania Lab. Italy

This paper describes a novel technique for fast noise level estimation that can be used both in spatial and temporal filters to tune the filtering strength. The method has been validated by integrating it in a denoisi... 详细信息

ISBN: (纸本)0780388380

关键词： Gaussian noise (electronic)

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Serial block processing for multi-code WCDMA frequency domain equalization

Serial block processing for multi-code WCDMA frequency domai...

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IEEE Wireless Communications and Networking Conference

作者： Lo Iacono, D Messina, E Volpe, C Spalvieri, A Advanced System Technology STMicroelectronics Dipartimento di Elettronica e Informazione Politecnico di Milano Italy

ISBN: (纸本)0780389662

This paper presents an efficient implementation of a frequency domain linear equalizer for WCDMA systems. A significant complexity reduction with respect to traditional equalizers can be achieved by means of frequency domain block processing. After deriving the analytical formulation of the equalizer coefficients, it will be shown that the performance of the frequency domain equalizer (FDE) is substantially equivalent to that of the classical time domain equalizer (TDE) over a wide range of operating conditions so that no penalty has to be paid for the complexity reduction. Starting from a pure parallel implementation of the FDE, it will be shown that block processing for multi-code downlink WCDMA can be conveniently performed in a serial fashion, through properly reusing small processing elements while exploiting the pipeline in order to reduce the subsequent latency overhead.

关键词： code division multiple access 3G mobile communication frequency-domain analysis equalisers pipeline processing serial block processing multi-code WCDMA frequency domain equalization linear equalizer complexity reduction equalizer coefficients performance frequency domain equalizer FDE parallel implementation multi-code downlink pipeline latency overhead processing element reuse Frequency domain equalization frequency domain equalizer Equalizers linear equalizer Code division multiple access Pipeline processing pipeline WCDMA 3G mobile communication

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Slice header reconstruction for H.264/AVC robust decoders

Slice header reconstruction for H.264/AVC robust decoders

引用

2005 IEEE 7th Workshop on Multimedia Signal Processing, MMSP 2005

作者： Gennari, Gianluca Bagni, Daniele Borneo, Antonio Pezzoni, Luca Advanced System Technology Labs STMicroelectronics Srl 20041 Agrate Brianza MI Italy

ISBN: (纸本)0780392892

For H.264/AVC encoded video sequences, a transmission error in the bit-stream can affect either the underlying codeword or even the subsequent symbols, thus resulting in a great degradation of the received images. In this paper we present a powerful algorithm of slice-header reconstruction for H.264/AVC decoders: after having decoded the corrupted header of a slice, it can recover most of the related slice data without requiring any interaction from the encoder side. Our method exploits the redundancy available when slice partitioning is applied, that is, the repetition of the most important header parameters in every slice of a picture. The proposed approach allows to recover high quality pictures from the corrisponding corrupted slices for a wide range of Bit Error Rates (BER).

关键词： Video streaming

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Static noise margin analysis of sub-threshold SRAM cells in deep sub-micron technology

引用

15th International Workshop on Integrated Circuit and system Design: Power and Timing Modeling, Optimization and Simulation, PATMOS 2005

作者： Wellig, Armin Zory, Julien STMicroelectronics - Advanced System Technology Chemin du Champ-des-Filles 39 1228 Geneva Switzerland

ISBN: (纸本)3540290133

Reducing leakage current in memories is critical for low-power designs in deep submicron technology. A common architectural technique consists of lowering the supply voltage to operate SRAM cells in sub-threshold (Vth). This paper investigates stability aspects of sub-Vth SRAM cells, both analytically and by simulation in stmicroelectronics' 90nm CMOS technology. For the first time analytical expressions for the Static Noise Margin in sub-V th as a function of circuit parameters, operating conditions and process variations are derived. The 3G receiver case study illustrates the leakage saving potential of stable sub-Vth SRAM designs resulting into energy savings of up to 65%. © Springer-Verlag Berlin Heidelberg 2005.

关键词： Static random access storage

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